Lines Matching refs:IsStackSlot

1967     } else if (source.IsStackSlot()) {  in Move()
1996 } else if (source.IsStackSlot()) { in Move()
2002 } else if (destination.IsStackSlot()) { in Move()
2014 DCHECK(source.IsStackSlot()) << source; in Move()
2186 DCHECK(right.IsStackSlot()); in GenerateCompareTest()
2607 } else if (rhs.IsStackSlot()) { in HandleCondition()
2781 } else if (right.IsStackSlot()) { in VisitCompare()
3196 if (receiver.IsStackSlot()) { in VisitInvokeInterface()
3488 } else if (in.IsStackSlot() || in.IsDoubleStackSlot()) { in VisitTypeConversion()
3512 } else if (in.IsStackSlot() || in.IsDoubleStackSlot()) { in VisitTypeConversion()
3535 } else if (in.IsStackSlot() || in.IsDoubleStackSlot()) { in VisitTypeConversion()
3557 } else if (in.IsStackSlot() || in.IsDoubleStackSlot()) { in VisitTypeConversion()
3905 DCHECK(second.IsStackSlot()); in VisitAdd()
3996 DCHECK(second.IsStackSlot()); in VisitSub()
4080 DCHECK(second.IsStackSlot()); in VisitMul()
4119 DCHECK(second.IsStackSlot()); in VisitMul()
4149 if (source.IsStackSlot()) { in PushOntoFPStack()
4581 DCHECK(second.IsStackSlot()); in VisitDiv()
4919 } else if (value.IsStackSlot()) { in VisitDivZeroCheck()
5136 if (location.IsStackSlot()) { in VisitParameterValue()
5750 } else if (obj.IsStackSlot()) { in GenerateExplicitNullCheck()
6369 } else if (destination.IsStackSlot()) { in EmitMove()
6377 } else if (source.IsStackSlot()) { in EmitMove()
6385 DCHECK(destination.IsStackSlot()); in EmitMove()
6424 DCHECK(destination.IsStackSlot()) << destination; in EmitMove()
6441 DCHECK(destination.IsStackSlot()) << destination; in EmitMove()
6460 } else if (destination.IsStackSlot()) { in EmitMove()
6553 } else if (source.IsRegister() && destination.IsStackSlot()) { in EmitSwap()
6555 } else if (source.IsStackSlot() && destination.IsRegister()) { in EmitSwap()
6557 } else if (source.IsStackSlot() && destination.IsStackSlot()) { in EmitSwap()
6569 } else if (source.IsFpuRegister() && destination.IsStackSlot()) { in EmitSwap()
6571 } else if (source.IsStackSlot() && destination.IsFpuRegister()) { in EmitSwap()
7139 DCHECK(cls.IsStackSlot()) << cls; in VisitInstanceOf()
7180 DCHECK(cls.IsStackSlot()) << cls; in VisitInstanceOf()
7206 DCHECK(cls.IsStackSlot()) << cls; in VisitInstanceOf()
7242 DCHECK(cls.IsStackSlot()) << cls; in VisitInstanceOf()
7275 DCHECK(cls.IsStackSlot()) << cls; in VisitInstanceOf()
7480 DCHECK(cls.IsStackSlot()) << cls; in VisitCheckCast()
7515 DCHECK(cls.IsStackSlot()) << cls; in VisitCheckCast()
7535 DCHECK(cls.IsStackSlot()) << cls; in VisitCheckCast()
7568 DCHECK(cls.IsStackSlot()) << cls; in VisitCheckCast()
8328 } else if (rhs.IsStackSlot()) { in GenerateIntCompare()