Lines Matching defs:vs1
3792 void Riscv64Assembler::VAdd_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VAdd_vv()
3813 void Riscv64Assembler::VSub_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VSub_vv()
3843 void Riscv64Assembler::VMinu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMinu_vv()
3857 void Riscv64Assembler::VMin_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMin_vv()
3871 void Riscv64Assembler::VMaxu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMaxu_vv()
3885 void Riscv64Assembler::VMax_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMax_vv()
3899 void Riscv64Assembler::VAnd_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VAnd_vv()
3920 void Riscv64Assembler::VOr_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VOr_vv()
3940 void Riscv64Assembler::VXor_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VXor_vv()
3963 void Riscv64Assembler::VRgather_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VRgather_vv()
4004 void Riscv64Assembler::VRgatherei16_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VRgatherei16_vv()
4028 void Riscv64Assembler::VAdc_vvm(VRegister vd, VRegister vs2, VRegister vs1) { in VAdc_vvm()
4049 void Riscv64Assembler::VMadc_vvm(VRegister vd, VRegister vs2, VRegister vs1) { in VMadc_vvm()
4067 void Riscv64Assembler::VMadc_vv(VRegister vd, VRegister vs2, VRegister vs1) { in VMadc_vv()
4085 void Riscv64Assembler::VSbc_vvm(VRegister vd, VRegister vs2, VRegister vs1) { in VSbc_vvm()
4099 void Riscv64Assembler::VMsbc_vvm(VRegister vd, VRegister vs2, VRegister vs1) { in VMsbc_vvm()
4111 void Riscv64Assembler::VMsbc_vv(VRegister vd, VRegister vs2, VRegister vs1) { in VMsbc_vv()
4123 void Riscv64Assembler::VMerge_vvm(VRegister vd, VRegister vs2, VRegister vs1) { in VMerge_vvm()
4144 void Riscv64Assembler::VMv_vv(VRegister vd, VRegister vs1) { in VMv_vv()
4162 void Riscv64Assembler::VMseq_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMseq_vv()
4183 void Riscv64Assembler::VMsne_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMsne_vv()
4204 void Riscv64Assembler::VMsltu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMsltu_vv()
4218 void Riscv64Assembler::VMsgtu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMsgtu_vv()
4223 void Riscv64Assembler::VMslt_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMslt_vv()
4237 void Riscv64Assembler::VMsgt_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMsgt_vv()
4241 void Riscv64Assembler::VMsleu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMsleu_vv()
4262 void Riscv64Assembler::VMsgeu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMsgeu_vv()
4271 void Riscv64Assembler::VMsle_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMsle_vv()
4292 void Riscv64Assembler::VMsge_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMsge_vv()
4338 void Riscv64Assembler::VSaddu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VSaddu_vv()
4359 void Riscv64Assembler::VSadd_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VSadd_vv()
4380 void Riscv64Assembler::VSsubu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VSsubu_vv()
4394 void Riscv64Assembler::VSsub_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VSsub_vv()
4408 void Riscv64Assembler::VSll_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VSll_vv()
4429 void Riscv64Assembler::VSmul_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VSmul_vv()
4477 void Riscv64Assembler::VSrl_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VSrl_vv()
4498 void Riscv64Assembler::VSra_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VSra_vv()
4519 void Riscv64Assembler::VSsrl_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VSsrl_vv()
4540 void Riscv64Assembler::VSsra_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VSsra_vv()
4561 void Riscv64Assembler::VNsrl_wv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VNsrl_wv()
4587 void Riscv64Assembler::VNsra_wv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VNsra_wv()
4608 void Riscv64Assembler::VNclipu_wv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VNclipu_wv()
4629 void Riscv64Assembler::VNclip_wv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VNclip_wv()
4650 void Riscv64Assembler::VWredsumu_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VWredsumu_vs()
4656 void Riscv64Assembler::VWredsum_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VWredsum_vs()
4662 void Riscv64Assembler::VRedsum_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VRedsum_vs()
4668 void Riscv64Assembler::VRedand_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VRedand_vs()
4674 void Riscv64Assembler::VRedor_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VRedor_vs()
4680 void Riscv64Assembler::VRedxor_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VRedxor_vs()
4686 void Riscv64Assembler::VRedminu_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VRedminu_vs()
4692 void Riscv64Assembler::VRedmin_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VRedmin_vs()
4698 void Riscv64Assembler::VRedmaxu_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VRedmaxu_vs()
4704 void Riscv64Assembler::VRedmax_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VRedmax_vs()
4710 void Riscv64Assembler::VAaddu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VAaddu_vv()
4724 void Riscv64Assembler::VAadd_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VAadd_vv()
4738 void Riscv64Assembler::VAsubu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VAsubu_vv()
4752 void Riscv64Assembler::VAsub_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VAsub_vv()
4781 void Riscv64Assembler::VCompress_vm(VRegister vd, VRegister vs2, VRegister vs1) { in VCompress_vm()
4789 void Riscv64Assembler::VMandn_mm(VRegister vd, VRegister vs2, VRegister vs1) { in VMandn_mm()
4795 void Riscv64Assembler::VMand_mm(VRegister vd, VRegister vs2, VRegister vs1) { in VMand_mm()
4803 void Riscv64Assembler::VMor_mm(VRegister vd, VRegister vs2, VRegister vs1) { in VMor_mm()
4809 void Riscv64Assembler::VMxor_mm(VRegister vd, VRegister vs2, VRegister vs1) { in VMxor_mm()
4817 void Riscv64Assembler::VMorn_mm(VRegister vd, VRegister vs2, VRegister vs1) { in VMorn_mm()
4823 void Riscv64Assembler::VMnand_mm(VRegister vd, VRegister vs2, VRegister vs1) { in VMnand_mm()
4831 void Riscv64Assembler::VMnor_mm(VRegister vd, VRegister vs2, VRegister vs1) { in VMnor_mm()
4837 void Riscv64Assembler::VMxnor_mm(VRegister vd, VRegister vs2, VRegister vs1) { in VMxnor_mm()
4845 void Riscv64Assembler::VDivu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VDivu_vv()
4859 void Riscv64Assembler::VDiv_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VDiv_vv()
4873 void Riscv64Assembler::VRemu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VRemu_vv()
4887 void Riscv64Assembler::VRem_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VRem_vv()
4901 void Riscv64Assembler::VMulhu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMulhu_vv()
4915 void Riscv64Assembler::VMul_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMul_vv()
4929 void Riscv64Assembler::VMulhsu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMulhsu_vv()
4943 void Riscv64Assembler::VMulh_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMulh_vv()
4957 void Riscv64Assembler::VMadd_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VMadd_vv()
4971 void Riscv64Assembler::VNmsub_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VNmsub_vv()
4985 void Riscv64Assembler::VMacc_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VMacc_vv()
4999 void Riscv64Assembler::VNmsac_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VNmsac_vv()
5015 void Riscv64Assembler::VWaddu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VWaddu_vv()
5036 void Riscv64Assembler::VWadd_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VWadd_vv()
5057 void Riscv64Assembler::VWsubu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VWsubu_vv()
5074 void Riscv64Assembler::VWsub_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VWsub_vv()
5091 void Riscv64Assembler::VWaddu_wv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VWaddu_wv()
5106 void Riscv64Assembler::VWadd_wv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VWadd_wv()
5121 void Riscv64Assembler::VWsubu_wv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VWsubu_wv()
5136 void Riscv64Assembler::VWsub_wv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VWsub_wv()
5151 void Riscv64Assembler::VWmulu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VWmulu_vv()
5168 void Riscv64Assembler::VWmulsu_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VWmulsu_vv()
5185 void Riscv64Assembler::VWmul_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VWmul_vv()
5202 void Riscv64Assembler::VWmaccu_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VWmaccu_vv()
5219 void Riscv64Assembler::VWmacc_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VWmacc_vv()
5244 void Riscv64Assembler::VWmaccsu_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VWmaccsu_vv()
5261 void Riscv64Assembler::VFadd_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFadd_vv()
5275 void Riscv64Assembler::VFredusum_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFredusum_vs()
5281 void Riscv64Assembler::VFsub_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFsub_vv()
5295 void Riscv64Assembler::VFredosum_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFredosum_vs()
5301 void Riscv64Assembler::VFmin_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFmin_vv()
5315 void Riscv64Assembler::VFredmin_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFredmin_vs()
5321 void Riscv64Assembler::VFmax_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFmax_vv()
5335 void Riscv64Assembler::VFredmax_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFredmax_vs()
5341 void Riscv64Assembler::VFsgnj_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFsgnj_vv()
5355 void Riscv64Assembler::VFsgnjn_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFsgnjn_vv()
5371 void Riscv64Assembler::VFsgnjx_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFsgnjx_vv()
5415 void Riscv64Assembler::VMfeq_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMfeq_vv()
5429 void Riscv64Assembler::VMfle_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMfle_vv()
5443 void Riscv64Assembler::VMfge_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMfge_vv()
5447 void Riscv64Assembler::VMflt_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMflt_vv()
5461 void Riscv64Assembler::VMfgt_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMfgt_vv()
5465 void Riscv64Assembler::VMfne_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VMfne_vv()
5493 void Riscv64Assembler::VFdiv_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFdiv_vv()
5513 void Riscv64Assembler::VFmul_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFmul_vv()
5534 void Riscv64Assembler::VFmadd_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VFmadd_vv()
5548 void Riscv64Assembler::VFnmadd_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VFnmadd_vv()
5562 void Riscv64Assembler::VFmsub_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VFmsub_vv()
5576 void Riscv64Assembler::VFnmsub_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VFnmsub_vv()
5590 void Riscv64Assembler::VFmacc_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VFmacc_vv()
5604 void Riscv64Assembler::VFnmacc_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VFnmacc_vv()
5618 void Riscv64Assembler::VFmsac_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VFmsac_vv()
5632 void Riscv64Assembler::VFnmsac_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VFnmsac_vv()
5646 void Riscv64Assembler::VFwadd_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFwadd_vv()
5663 void Riscv64Assembler::VFwredusum_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFwredusum_vs()
5670 void Riscv64Assembler::VFwsub_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFwsub_vv()
5687 void Riscv64Assembler::VFwredosum_vs(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFwredosum_vs()
5693 void Riscv64Assembler::VFwadd_wv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFwadd_wv()
5708 void Riscv64Assembler::VFwsub_wv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFwsub_wv()
5723 void Riscv64Assembler::VFwmul_vv(VRegister vd, VRegister vs2, VRegister vs1, VM vm) { in VFwmul_vv()
5740 void Riscv64Assembler::VFwmacc_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VFwmacc_vv()
5757 void Riscv64Assembler::VFwnmacc_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VFwnmacc_vv()
5774 void Riscv64Assembler::VFwmsac_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VFwmsac_vv()
5791 void Riscv64Assembler::VFwnmsac_vv(VRegister vd, VRegister vs1, VRegister vs2, VM vm) { in VFwnmsac_vv()