118     if (rs2 == Zero && IsShortReg(rs1) && IsInt<9>(offset)) {  in Beq()
121     } else if (rs1 == Zero && IsShortReg(rs2) && IsInt<9>(offset)) {  in Beq()
132     if (rs2 == Zero && IsShortReg(rs1) && IsInt<9>(offset)) {  in Bne()
135     } else if (rs1 == Zero && IsShortReg(rs2) && IsInt<9>(offset)) {  in Bne()
171     if (IsShortReg(rd) && IsShortReg(rs1) && IsUint<2>(offset) && IsAligned<2>(offset)) {  in Lh()
187     } else if (IsShortReg(rd) && IsShortReg(rs1) && IsUint<7>(offset) && IsAligned<4>(offset)) {  in Lw()
203     } else if (IsShortReg(rd) && IsShortReg(rs1) && IsUint<8>(offset) && IsAligned<8>(offset)) {  in Ld()
216     if (IsShortReg(rd) && IsShortReg(rs1) && IsUint<2>(offset)) {  in Lbu()
229     if (IsShortReg(rd) && IsShortReg(rs1) && IsUint<2>(offset) && IsAligned<2>(offset)) {  in Lhu()
249     if (IsShortReg(rs2) && IsShortReg(rs1) && IsUint<2>(offset)) {  in Sb()
262     if (IsShortReg(rs2) && IsShortReg(rs1) && IsUint<2>(offset) && IsAligned<2>(offset)) {  in Sh()
278     } else if (IsShortReg(rs2) && IsShortReg(rs1) && IsUint<7>(offset) && IsAligned<4>(offset)) {  in Sw()
294     } else if (IsShortReg(rs2) && IsShortReg(rs1) && IsUint<8>(offset) && IsAligned<8>(offset)) {  in Sd()
322         } else if (IsShortReg(rd) && rs1 == SP && IsUint<10>(imm12) && IsAligned<4>(imm12)) {  in Addi()
349     if (rd == rs1 && IsShortReg(rd) && imm12 == -1) {  in Xori()
364     if (rd == rs1 && IsShortReg(rd) && IsInt<6>(imm12)) {  in Andi()
392     if (rd == rs1 && IsShortReg(rd) && shamt != 0) {  in Srli()
406     if (rd == rs1 && IsShortReg(rd) && shamt != 0) {  in Srai()
454     if (rd == rs1 && IsShortReg(rd) && IsShortReg(rs2)) {  in Sub()
473     if (IsShortReg(rd)) {  in Xor()
474       if (rd == rs1 && IsShortReg(rs2)) {  in Xor()
477       } else if (rd == rs2 && IsShortReg(rs1)) {  in Xor()
489     if (IsShortReg(rd)) {  in Or()
490       if (rd == rs1 && IsShortReg(rs2)) {  in Or()
493       } else if (rd == rs2 && IsShortReg(rs1)) {  in Or()
505     if (IsShortReg(rd)) {  in And()
506       if (rd == rs1 && IsShortReg(rs2)) {  in And()
509       } else if (rd == rs2 && IsShortReg(rs1)) {  in And()
568     if (IsShortReg(rd)) {  in Addw()
569       if (rd == rs1 && IsShortReg(rs2)) {  in Addw()
572       } else if (rd == rs2 && IsShortReg(rs1)) {  in Addw()
584     if (rd == rs1 && IsShortReg(rd) && IsShortReg(rs2)) {  in Subw()
652     if (IsShortReg(rd)) {  in Mul()
653       if (rd == rs1 && IsShortReg(rs2)) {  in Mul()
656       } else if (rd == rs2 && IsShortReg(rs1)) {  in Mul()
900     } else if (IsShortReg(rd) && IsShortReg(rs1) && IsUint<8>(offset) && IsAligned<8>(offset)) {  in FLd()
921     } else if (IsShortReg(rs2) && IsShortReg(rs1) && IsUint<8>(offset) && IsAligned<8>(offset)) {  in FSd()
6129     if (IsExtensionEnabled(Riscv64Extension::kZcb) && rd == rs && IsShortReg(rd)) {  in SextB()
6142     if (IsExtensionEnabled(Riscv64Extension::kZcb) && rd == rs && IsShortReg(rd)) {  in SextH()
6166   if (IsExtensionEnabled(Riscv64Extension::kZcb) && rd == rs && IsShortReg(rd)) {  in ZextB()
6175     if (IsExtensionEnabled(Riscv64Extension::kZcb) && rd == rs && IsShortReg(rd)) {  in ZextH()
6188     if (IsExtensionEnabled(Riscv64Extension::kZcb) && rd == rs && IsShortReg(rd)) {  in ZextW()
6897          ((lhs_reg_ == Zero && IsShortReg(rhs_reg_)) || (rhs_reg_ == Zero && IsShortReg(lhs_reg_)));  in IsCompressableCondition()