Lines Matching refs:Riscv64Label
6444 void Riscv64Assembler::Beqz(XRegister rs, Riscv64Label* label, bool is_bare) { in Beqz()
6448 void Riscv64Assembler::Bnez(XRegister rs, Riscv64Label* label, bool is_bare) { in Bnez()
6452 void Riscv64Assembler::Blez(XRegister rs, Riscv64Label* label, bool is_bare) { in Blez()
6456 void Riscv64Assembler::Bgez(XRegister rs, Riscv64Label* label, bool is_bare) { in Bgez()
6460 void Riscv64Assembler::Bltz(XRegister rs, Riscv64Label* label, bool is_bare) { in Bltz()
6464 void Riscv64Assembler::Bgtz(XRegister rs, Riscv64Label* label, bool is_bare) { in Bgtz()
6468 void Riscv64Assembler::Beq(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare) { in Beq()
6472 void Riscv64Assembler::Bne(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare) { in Bne()
6476 void Riscv64Assembler::Ble(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare) { in Ble()
6480 void Riscv64Assembler::Bge(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare) { in Bge()
6484 void Riscv64Assembler::Blt(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare) { in Blt()
6488 void Riscv64Assembler::Bgt(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare) { in Bgt()
6492 void Riscv64Assembler::Bleu(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare) { in Bleu()
6496 void Riscv64Assembler::Bgeu(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare) { in Bgeu()
6500 void Riscv64Assembler::Bltu(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare) { in Bltu()
6504 void Riscv64Assembler::Bgtu(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare) { in Bgtu()
6508 void Riscv64Assembler::Jal(XRegister rd, Riscv64Label* label, bool is_bare) { in Jal()
6512 void Riscv64Assembler::J(Riscv64Label* label, bool is_bare) { in J()
6516 void Riscv64Assembler::Jal(Riscv64Label* label, bool is_bare) { in Jal()
7199 void Riscv64Assembler::FinalizeLabeledBranch(Riscv64Label* label) { in FinalizeLabeledBranch()
7227 Riscv64Label* label, bool is_bare, BranchCondition condition, XRegister lhs, XRegister rhs) { in Bcond()
7249 void Riscv64Assembler::Buncond(Riscv64Label* label, XRegister rd, bool is_bare) { in Buncond()
7260 Riscv64Label* label = literal->GetLabel(); in LoadLiteral()
7276 void Riscv64Assembler::Bind(Riscv64Label* label) { in Bind()
7292 uint32_t prev_branch_id = Riscv64Label::kNoPrevBranchId; in Bind()
7302 void Riscv64Assembler::LoadLabelAddress(XRegister rd, Riscv64Label* label) { in LoadLabelAddress()
7321 JumpTable* Riscv64Assembler::CreateJumpTable(ArenaVector<Riscv64Label*>&& labels) { in CreateJumpTable()
7328 uint32_t Riscv64Assembler::GetLabelLocation(const Riscv64Label* label) const { in GetLabelLocation()
7331 if (label->prev_branch_id_ != Riscv64Label::kNoPrevBranchId) { in GetLabelLocation()
7365 Riscv64Label* label = table.GetLabel(); in ReserveJumpTableSpace()
7503 Riscv64Label* table_label = table.GetLabel(); in EmitJumpTables()
7507 for (Riscv64Label* target : table.GetData()) { in EmitJumpTables()
7522 Riscv64Label* label = literal.GetLabel(); in EmitLiterals()
7536 Riscv64Label* label = literal.GetLabel(); in EmitLiterals()