Lines Matching refs:frm
933 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMAddS() argument
935 EmitR4(rs3, 0x0, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x43); in FMAddS()
939 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMAddD() argument
941 EmitR4(rs3, 0x1, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x43); in FMAddD()
945 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMSubS() argument
947 EmitR4(rs3, 0x0, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x47); in FMSubS()
951 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMSubD() argument
953 EmitR4(rs3, 0x1, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x47); in FMSubD()
957 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMSubS() argument
959 EmitR4(rs3, 0x0, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x4b); in FNMSubS()
963 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMSubD() argument
965 EmitR4(rs3, 0x1, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x4b); in FNMSubD()
969 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMAddS() argument
971 EmitR4(rs3, 0x0, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x4f); in FNMAddS()
975 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMAddD() argument
977 EmitR4(rs3, 0x1, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x4f); in FNMAddD()
982 void Riscv64Assembler::FAddS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FAddS() argument
984 EmitR(0x0, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FAddS()
987 void Riscv64Assembler::FAddD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FAddD() argument
989 EmitR(0x1, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FAddD()
992 void Riscv64Assembler::FSubS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FSubS() argument
994 EmitR(0x4, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FSubS()
997 void Riscv64Assembler::FSubD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FSubD() argument
999 EmitR(0x5, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FSubD()
1002 void Riscv64Assembler::FMulS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FMulS() argument
1004 EmitR(0x8, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FMulS()
1007 void Riscv64Assembler::FMulD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FMulD() argument
1009 EmitR(0x9, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FMulD()
1012 void Riscv64Assembler::FDivS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FDivS() argument
1014 EmitR(0xc, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FDivS()
1017 void Riscv64Assembler::FDivD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FDivD() argument
1019 EmitR(0xd, rs2, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FDivD()
1022 void Riscv64Assembler::FSqrtS(FRegister rd, FRegister rs1, FPRoundingMode frm) { in FSqrtS() argument
1024 EmitR(0x2c, 0x0, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FSqrtS()
1027 void Riscv64Assembler::FSqrtD(FRegister rd, FRegister rs1, FPRoundingMode frm) { in FSqrtD() argument
1029 EmitR(0x2d, 0x0, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FSqrtD()
1082 void Riscv64Assembler::FCvtSD(FRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtSD() argument
1084 EmitR(0x20, 0x1, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtSD()
1087 void Riscv64Assembler::FCvtDS(FRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtDS() argument
1090 EmitR(0x21, 0x0, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtDS()
1127 void Riscv64Assembler::FCvtWS(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtWS() argument
1129 EmitR(0x60, 0x0, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtWS()
1132 void Riscv64Assembler::FCvtWD(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtWD() argument
1134 EmitR(0x61, 0x0, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtWD()
1137 void Riscv64Assembler::FCvtWuS(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtWuS() argument
1139 EmitR(0x60, 0x1, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtWuS()
1142 void Riscv64Assembler::FCvtWuD(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtWuD() argument
1144 EmitR(0x61, 0x1, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtWuD()
1147 void Riscv64Assembler::FCvtLS(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtLS() argument
1149 EmitR(0x60, 0x2, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtLS()
1152 void Riscv64Assembler::FCvtLD(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtLD() argument
1154 EmitR(0x61, 0x2, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtLD()
1157 void Riscv64Assembler::FCvtLuS(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtLuS() argument
1159 EmitR(0x60, 0x3, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtLuS()
1162 void Riscv64Assembler::FCvtLuD(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtLuD() argument
1164 EmitR(0x61, 0x3, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtLuD()
1167 void Riscv64Assembler::FCvtSW(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtSW() argument
1169 EmitR(0x68, 0x0, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtSW()
1172 void Riscv64Assembler::FCvtDW(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtDW() argument
1175 EmitR(0x69, 0x0, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtDW()
1178 void Riscv64Assembler::FCvtSWu(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtSWu() argument
1180 EmitR(0x68, 0x1, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtSWu()
1183 void Riscv64Assembler::FCvtDWu(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtDWu() argument
1186 EmitR(0x69, 0x1, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtDWu()
1189 void Riscv64Assembler::FCvtSL(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtSL() argument
1191 EmitR(0x68, 0x2, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtSL()
1194 void Riscv64Assembler::FCvtDL(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtDL() argument
1196 EmitR(0x69, 0x2, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtDL()
1199 void Riscv64Assembler::FCvtSLu(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtSLu() argument
1201 EmitR(0x68, 0x3, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtSLu()
1204 void Riscv64Assembler::FCvtDLu(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtDLu() argument
1206 EmitR(0x69, 0x3, rs1, enum_cast<uint32_t>(frm), rd, 0x53); in FCvtDLu()