550   void CLw(XRegister rd_s, XRegister rs1_s, int32_t offset);
551   void CLd(XRegister rd_s, XRegister rs1_s, int32_t offset);
552   void CFLd(FRegister rd_s, XRegister rs1_s, int32_t offset);
562   void CAddi4Spn(XRegister rd_s, uint32_t nzuimm);
564   void CSrli(XRegister rd_s, int32_t shamt);
565   void CSrai(XRegister rd_s, int32_t shamt);
566   void CAndi(XRegister rd_s, int32_t imm);
569   void CAnd(XRegister rd_s, XRegister rs2_s);
570   void COr(XRegister rd_s, XRegister rs2_s);
571   void CXor(XRegister rd_s, XRegister rs2_s);
572   void CSub(XRegister rd_s, XRegister rs2_s);
573   void CAddw(XRegister rd_s, XRegister rs2_s);
574   void CSubw(XRegister rd_s, XRegister rs2_s);
577   void CLbu(XRegister rd_s, XRegister rs1_s, int32_t offset);
578   void CLhu(XRegister rd_s, XRegister rs1_s, int32_t offset);
579   void CLh(XRegister rd_s, XRegister rs1_s, int32_t offset);
580   void CSb(XRegister rd_s, XRegister rs1_s, int32_t offset);
581   void CSh(XRegister rd_s, XRegister rs1_s, int32_t offset);
588   void CMul(XRegister rd_s, XRegister rs2_s);
2561   void EmitCIW(uint32_t funct3, uint32_t imm8, XRegister rd_s, uint32_t opcode) {  in EmitCIW()  argument
2564     DCHECK(IsShortReg(rd_s)) << rd_s;  in EmitCIW()
2567     uint32_t encoding = funct3 << 13 | imm8 << 5 | EncodeShortReg(rd_s) << 2 | opcode;  in EmitCIW()
2668       uint32_t funct3, uint32_t funct2, uint32_t imm, XRegister rd_s, uint32_t opcode) {  in EmitCBArithmetic()  argument
2673     EmitCB(funct3, BitFieldInsert(immL5, immH3, 5, 3), rd_s, opcode);  in EmitCBArithmetic()