Lines Matching refs:dst
142 void X86_64Assembler::movq(CpuRegister dst, const Immediate& imm) { in movq() argument
146 EmitRex64(dst); in movq()
148 EmitRegisterOperand(0, dst.LowBits()); in movq()
151 EmitRex64(dst); in movq()
152 EmitUint8(0xB8 + dst.LowBits()); in movq()
158 void X86_64Assembler::movl(CpuRegister dst, const Immediate& imm) { in movl() argument
161 EmitOptionalRex32(dst); in movl()
162 EmitUint8(0xB8 + dst.LowBits()); in movl()
167 void X86_64Assembler::movq(const Address& dst, const Immediate& imm) { in movq() argument
170 EmitRex64(dst); in movq()
172 EmitOperand(0, dst); in movq()
177 void X86_64Assembler::movq(CpuRegister dst, CpuRegister src) { in movq() argument
180 EmitRex64(src, dst); in movq()
182 EmitRegisterOperand(src.LowBits(), dst.LowBits()); in movq()
186 void X86_64Assembler::movl(CpuRegister dst, CpuRegister src) { in movl() argument
188 EmitOptionalRex32(dst, src); in movl()
190 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movl()
194 void X86_64Assembler::movq(CpuRegister dst, const Address& src) { in movq() argument
196 EmitRex64(dst, src); in movq()
198 EmitOperand(dst.LowBits(), src); in movq()
202 void X86_64Assembler::movl(CpuRegister dst, const Address& src) { in movl() argument
204 EmitOptionalRex32(dst, src); in movl()
206 EmitOperand(dst.LowBits(), src); in movl()
210 void X86_64Assembler::movq(const Address& dst, CpuRegister src) { in movq() argument
212 EmitRex64(src, dst); in movq()
214 EmitOperand(src.LowBits(), dst); in movq()
218 void X86_64Assembler::movl(const Address& dst, CpuRegister src) { in movl() argument
220 EmitOptionalRex32(src, dst); in movl()
222 EmitOperand(src.LowBits(), dst); in movl()
225 void X86_64Assembler::movl(const Address& dst, const Immediate& imm) { in movl() argument
227 EmitOptionalRex32(dst); in movl()
229 EmitOperand(0, dst); in movl()
233 void X86_64Assembler::movntl(const Address& dst, CpuRegister src) { in movntl() argument
235 EmitOptionalRex32(src, dst); in movntl()
238 EmitOperand(src.LowBits(), dst); in movntl()
241 void X86_64Assembler::movntq(const Address& dst, CpuRegister src) { in movntq() argument
243 EmitRex64(src, dst); in movntq()
246 EmitOperand(src.LowBits(), dst); in movntq()
249 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src) { in cmov() argument
250 cmov(c, dst, src, true); in cmov()
253 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) { in cmov() argument
255 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in cmov()
258 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in cmov()
262 void X86_64Assembler::cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit) { in cmov() argument
265 EmitRex64(dst, src); in cmov()
267 EmitOptionalRex32(dst, src); in cmov()
271 EmitOperand(dst.LowBits(), src); in cmov()
275 void X86_64Assembler::movzxb(CpuRegister dst, CpuRegister src) { in movzxb() argument
277 EmitOptionalByteRegNormalizingRex32(dst, src); in movzxb()
280 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movzxb()
284 void X86_64Assembler::movzxb(CpuRegister dst, const Address& src) { in movzxb() argument
288 EmitOptionalRex32(dst, src); in movzxb()
291 EmitOperand(dst.LowBits(), src); in movzxb()
295 void X86_64Assembler::movsxb(CpuRegister dst, CpuRegister src) { in movsxb() argument
297 EmitOptionalByteRegNormalizingRex32(dst, src); in movsxb()
300 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movsxb()
304 void X86_64Assembler::movsxb(CpuRegister dst, const Address& src) { in movsxb() argument
308 EmitOptionalRex32(dst, src); in movsxb()
311 EmitOperand(dst.LowBits(), src); in movsxb()
320 void X86_64Assembler::movb(const Address& dst, CpuRegister src) { in movb() argument
322 EmitOptionalByteRegNormalizingRex32(src, dst); in movb()
324 EmitOperand(src.LowBits(), dst); in movb()
328 void X86_64Assembler::movb(const Address& dst, const Immediate& imm) { in movb() argument
330 EmitOptionalRex32(dst); in movb()
332 EmitOperand(Register::RAX, dst); in movb()
338 void X86_64Assembler::movzxw(CpuRegister dst, CpuRegister src) { in movzxw() argument
340 EmitOptionalRex32(dst, src); in movzxw()
343 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movzxw()
347 void X86_64Assembler::movzxw(CpuRegister dst, const Address& src) { in movzxw() argument
349 EmitOptionalRex32(dst, src); in movzxw()
352 EmitOperand(dst.LowBits(), src); in movzxw()
356 void X86_64Assembler::movsxw(CpuRegister dst, CpuRegister src) { in movsxw() argument
358 EmitOptionalRex32(dst, src); in movsxw()
361 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movsxw()
365 void X86_64Assembler::movsxw(CpuRegister dst, const Address& src) { in movsxw() argument
367 EmitOptionalRex32(dst, src); in movsxw()
370 EmitOperand(dst.LowBits(), src); in movsxw()
379 void X86_64Assembler::movw(const Address& dst, CpuRegister src) { in movw() argument
382 EmitOptionalRex32(src, dst); in movw()
384 EmitOperand(src.LowBits(), dst); in movw()
388 void X86_64Assembler::movw(const Address& dst, const Immediate& imm) { in movw() argument
391 EmitOptionalRex32(dst); in movw()
393 EmitOperand(Register::RAX, dst); in movw()
400 void X86_64Assembler::leaq(CpuRegister dst, const Address& src) { in leaq() argument
402 EmitRex64(dst, src); in leaq()
404 EmitOperand(dst.LowBits(), src); in leaq()
408 void X86_64Assembler::leal(CpuRegister dst, const Address& src) { in leal() argument
410 EmitOptionalRex32(dst, src); in leal()
412 EmitOperand(dst.LowBits(), src); in leal()
416 void X86_64Assembler::movaps(XmmRegister dst, XmmRegister src) { in movaps() argument
418 vmovaps(dst, src); in movaps()
422 EmitOptionalRex32(dst, src); in movaps()
425 EmitXmmRegisterOperand(dst.LowBits(), src); in movaps()
430 void X86_64Assembler::vmovaps(XmmRegister dst, XmmRegister src) { in vmovaps() argument
434 bool load = dst.NeedsRex(); in vmovaps()
437 if (src.NeedsRex()&& dst.NeedsRex()) { in vmovaps()
445 bool rex_bit = (load) ? dst.NeedsRex() : src.NeedsRex(); in vmovaps()
451 byte_one = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovaps()
472 EmitXmmRegisterOperand(src.LowBits(), dst); in vmovaps()
474 EmitXmmRegisterOperand(dst.LowBits(), src); in vmovaps()
478 void X86_64Assembler::movaps(XmmRegister dst, const Address& src) { in movaps() argument
480 vmovaps(dst, src); in movaps()
484 EmitOptionalRex32(dst, src); in movaps()
487 EmitOperand(dst.LowBits(), src); in movaps()
491 void X86_64Assembler::vmovaps(XmmRegister dst, const Address& src) { in vmovaps() argument
506 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovaps()
511 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovaps()
527 EmitOperand(dst.LowBits(), src); in vmovaps()
530 void X86_64Assembler::movups(XmmRegister dst, const Address& src) { in movups() argument
532 vmovups(dst, src); in movups()
536 EmitOptionalRex32(dst, src); in movups()
539 EmitOperand(dst.LowBits(), src); in movups()
543 void X86_64Assembler::vmovups(XmmRegister dst, const Address& src) { in vmovups() argument
558 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovups()
563 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovups()
579 EmitOperand(dst.LowBits(), src); in vmovups()
583 void X86_64Assembler::movaps(const Address& dst, XmmRegister src) { in movaps() argument
585 vmovaps(dst, src); in movaps()
589 EmitOptionalRex32(src, dst); in movaps()
592 EmitOperand(src.LowBits(), dst); in movaps()
596 void X86_64Assembler::vmovaps(const Address& dst, XmmRegister src) { in vmovaps() argument
603 uint8_t rex = dst.rex(); in vmovaps()
633 EmitOperand(src.LowBits(), dst); in vmovaps()
636 void X86_64Assembler::movups(const Address& dst, XmmRegister src) { in movups() argument
638 vmovups(dst, src); in movups()
642 EmitOptionalRex32(src, dst); in movups()
645 EmitOperand(src.LowBits(), dst); in movups()
649 void X86_64Assembler::vmovups(const Address& dst, XmmRegister src) { in vmovups() argument
656 uint8_t rex = dst.rex(); in vmovups()
686 EmitOperand(src.LowBits(), dst); in vmovups()
690 void X86_64Assembler::movss(XmmRegister dst, const Address& src) { in movss() argument
693 EmitOptionalRex32(dst, src); in movss()
696 EmitOperand(dst.LowBits(), src); in movss()
700 void X86_64Assembler::movss(const Address& dst, XmmRegister src) { in movss() argument
703 EmitOptionalRex32(src, dst); in movss()
706 EmitOperand(src.LowBits(), dst); in movss()
710 void X86_64Assembler::movss(XmmRegister dst, XmmRegister src) { in movss() argument
713 EmitOptionalRex32(src, dst); // Movss is MR encoding instead of the usual RM. in movss()
716 EmitXmmRegisterOperand(src.LowBits(), dst); in movss()
720 void X86_64Assembler::movsxd(CpuRegister dst, CpuRegister src) { in movsxd() argument
722 EmitRex64(dst, src); in movsxd()
724 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movsxd()
728 void X86_64Assembler::movsxd(CpuRegister dst, const Address& src) { in movsxd() argument
730 EmitRex64(dst, src); in movsxd()
732 EmitOperand(dst.LowBits(), src); in movsxd()
736 void X86_64Assembler::movd(XmmRegister dst, CpuRegister src) { in movd() argument
737 movd(dst, src, true); in movd()
740 void X86_64Assembler::movd(CpuRegister dst, XmmRegister src) { in movd() argument
741 movd(dst, src, true); in movd()
744 void X86_64Assembler::movd(XmmRegister dst, CpuRegister src, bool is64bit) { in movd() argument
747 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in movd()
750 EmitOperand(dst.LowBits(), Operand(src)); in movd()
753 void X86_64Assembler::movd(CpuRegister dst, XmmRegister src, bool is64bit) { in movd() argument
756 EmitOptionalRex(false, is64bit, src.NeedsRex(), false, dst.NeedsRex()); in movd()
759 EmitOperand(src.LowBits(), Operand(dst)); in movd()
762 void X86_64Assembler::addss(XmmRegister dst, XmmRegister src) { in addss() argument
765 EmitOptionalRex32(dst, src); in addss()
768 EmitXmmRegisterOperand(dst.LowBits(), src); in addss()
771 void X86_64Assembler::addss(XmmRegister dst, const Address& src) { in addss() argument
774 EmitOptionalRex32(dst, src); in addss()
777 EmitOperand(dst.LowBits(), src); in addss()
781 void X86_64Assembler::subss(XmmRegister dst, XmmRegister src) { in subss() argument
784 EmitOptionalRex32(dst, src); in subss()
787 EmitXmmRegisterOperand(dst.LowBits(), src); in subss()
791 void X86_64Assembler::subss(XmmRegister dst, const Address& src) { in subss() argument
794 EmitOptionalRex32(dst, src); in subss()
797 EmitOperand(dst.LowBits(), src); in subss()
801 void X86_64Assembler::mulss(XmmRegister dst, XmmRegister src) { in mulss() argument
804 EmitOptionalRex32(dst, src); in mulss()
807 EmitXmmRegisterOperand(dst.LowBits(), src); in mulss()
811 void X86_64Assembler::mulss(XmmRegister dst, const Address& src) { in mulss() argument
814 EmitOptionalRex32(dst, src); in mulss()
817 EmitOperand(dst.LowBits(), src); in mulss()
821 void X86_64Assembler::divss(XmmRegister dst, XmmRegister src) { in divss() argument
824 EmitOptionalRex32(dst, src); in divss()
827 EmitXmmRegisterOperand(dst.LowBits(), src); in divss()
831 void X86_64Assembler::divss(XmmRegister dst, const Address& src) { in divss() argument
834 EmitOptionalRex32(dst, src); in divss()
837 EmitOperand(dst.LowBits(), src); in divss()
841 void X86_64Assembler::addps(XmmRegister dst, XmmRegister src) { in addps() argument
843 EmitOptionalRex32(dst, src); in addps()
846 EmitXmmRegisterOperand(dst.LowBits(), src); in addps()
850 void X86_64Assembler::subps(XmmRegister dst, XmmRegister src) { in subps() argument
852 EmitOptionalRex32(dst, src); in subps()
855 EmitXmmRegisterOperand(dst.LowBits(), src); in subps()
858 void X86_64Assembler::vaddps(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vaddps() argument
865 return vaddps(dst, add_right, add_left); in vaddps()
872 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vaddps()
874 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vaddps()
886 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vaddps()
889 void X86_64Assembler::vsubps(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vsubps() argument
900 byte_one = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vsubps()
902 byte_one = EmitVexPrefixByteOne(dst.NeedsRex(), /*X=*/ false, src2.NeedsRex(), SET_VEX_M_0F); in vsubps()
911 EmitXmmRegisterOperand(dst.LowBits(), src2); in vsubps()
915 void X86_64Assembler::mulps(XmmRegister dst, XmmRegister src) { in mulps() argument
917 EmitOptionalRex32(dst, src); in mulps()
920 EmitXmmRegisterOperand(dst.LowBits(), src); in mulps()
923 void X86_64Assembler::vmulps(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vmulps() argument
930 return vmulps(dst, src2, src1); in vmulps()
937 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vmulps()
939 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmulps()
951 EmitXmmRegisterOperand(dst.LowBits(), src2); in vmulps()
954 void X86_64Assembler::divps(XmmRegister dst, XmmRegister src) { in divps() argument
956 EmitOptionalRex32(dst, src); in divps()
959 EmitXmmRegisterOperand(dst.LowBits(), src); in divps()
962 void X86_64Assembler::vdivps(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vdivps() argument
974 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vdivps()
976 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vdivps()
988 EmitXmmRegisterOperand(dst.LowBits(), src2); in vdivps()
1035 void X86_64Assembler::fsts(const Address& dst) { in fsts() argument
1038 EmitOperand(2, dst); in fsts()
1042 void X86_64Assembler::fstps(const Address& dst) { in fstps() argument
1045 EmitOperand(3, dst); in fstps()
1049 void X86_64Assembler::movapd(XmmRegister dst, XmmRegister src) { in movapd() argument
1051 vmovapd(dst, src); in movapd()
1056 EmitOptionalRex32(dst, src); in movapd()
1059 EmitXmmRegisterOperand(dst.LowBits(), src); in movapd()
1063 void X86_64Assembler::vmovapd(XmmRegister dst, XmmRegister src) { in vmovapd() argument
1069 if (src.NeedsRex() && dst.NeedsRex()) { in vmovapd()
1074 bool load = dst.NeedsRex(); in vmovapd()
1077 bool rex_bit = load ? dst.NeedsRex() : src.NeedsRex(); in vmovapd()
1083 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovapd()
1104 EmitXmmRegisterOperand(src.LowBits(), dst); in vmovapd()
1106 EmitXmmRegisterOperand(dst.LowBits(), src); in vmovapd()
1110 void X86_64Assembler::movapd(XmmRegister dst, const Address& src) { in movapd() argument
1112 vmovapd(dst, src); in movapd()
1117 EmitOptionalRex32(dst, src); in movapd()
1120 EmitOperand(dst.LowBits(), src); in movapd()
1124 void X86_64Assembler::vmovapd(XmmRegister dst, const Address& src) { in vmovapd() argument
1140 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovapd()
1145 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovapd()
1161 EmitOperand(dst.LowBits(), src); in vmovapd()
1164 void X86_64Assembler::movupd(XmmRegister dst, const Address& src) { in movupd() argument
1166 vmovupd(dst, src); in movupd()
1171 EmitOptionalRex32(dst, src); in movupd()
1174 EmitOperand(dst.LowBits(), src); in movupd()
1178 void X86_64Assembler::vmovupd(XmmRegister dst, const Address& src) { in vmovupd() argument
1194 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovupd()
1199 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovupd()
1214 EmitOperand(dst.LowBits(), src); in vmovupd()
1217 void X86_64Assembler::movapd(const Address& dst, XmmRegister src) { in movapd() argument
1219 vmovapd(dst, src); in movapd()
1224 EmitOptionalRex32(src, dst); in movapd()
1227 EmitOperand(src.LowBits(), dst); in movapd()
1231 void X86_64Assembler::vmovapd(const Address& dst, XmmRegister src) { in vmovapd() argument
1237 uint8_t rex = dst.rex(); in vmovapd()
1267 EmitOperand(src.LowBits(), dst); in vmovapd()
1270 void X86_64Assembler::movupd(const Address& dst, XmmRegister src) { in movupd() argument
1272 vmovupd(dst, src); in movupd()
1277 EmitOptionalRex32(src, dst); in movupd()
1280 EmitOperand(src.LowBits(), dst); in movupd()
1284 void X86_64Assembler::vmovupd(const Address& dst, XmmRegister src) { in vmovupd() argument
1291 uint8_t rex = dst.rex(); in vmovupd()
1321 EmitOperand(src.LowBits(), dst); in vmovupd()
1325 void X86_64Assembler::movsd(XmmRegister dst, const Address& src) { in movsd() argument
1328 EmitOptionalRex32(dst, src); in movsd()
1331 EmitOperand(dst.LowBits(), src); in movsd()
1335 void X86_64Assembler::movsd(const Address& dst, XmmRegister src) { in movsd() argument
1338 EmitOptionalRex32(src, dst); in movsd()
1341 EmitOperand(src.LowBits(), dst); in movsd()
1345 void X86_64Assembler::movsd(XmmRegister dst, XmmRegister src) { in movsd() argument
1348 EmitOptionalRex32(src, dst); // Movsd is MR encoding instead of the usual RM. in movsd()
1351 EmitXmmRegisterOperand(src.LowBits(), dst); in movsd()
1355 void X86_64Assembler::addsd(XmmRegister dst, XmmRegister src) { in addsd() argument
1358 EmitOptionalRex32(dst, src); in addsd()
1361 EmitXmmRegisterOperand(dst.LowBits(), src); in addsd()
1365 void X86_64Assembler::addsd(XmmRegister dst, const Address& src) { in addsd() argument
1368 EmitOptionalRex32(dst, src); in addsd()
1371 EmitOperand(dst.LowBits(), src); in addsd()
1375 void X86_64Assembler::subsd(XmmRegister dst, XmmRegister src) { in subsd() argument
1378 EmitOptionalRex32(dst, src); in subsd()
1381 EmitXmmRegisterOperand(dst.LowBits(), src); in subsd()
1385 void X86_64Assembler::subsd(XmmRegister dst, const Address& src) { in subsd() argument
1388 EmitOptionalRex32(dst, src); in subsd()
1391 EmitOperand(dst.LowBits(), src); in subsd()
1395 void X86_64Assembler::mulsd(XmmRegister dst, XmmRegister src) { in mulsd() argument
1398 EmitOptionalRex32(dst, src); in mulsd()
1401 EmitXmmRegisterOperand(dst.LowBits(), src); in mulsd()
1405 void X86_64Assembler::mulsd(XmmRegister dst, const Address& src) { in mulsd() argument
1408 EmitOptionalRex32(dst, src); in mulsd()
1411 EmitOperand(dst.LowBits(), src); in mulsd()
1415 void X86_64Assembler::divsd(XmmRegister dst, XmmRegister src) { in divsd() argument
1418 EmitOptionalRex32(dst, src); in divsd()
1421 EmitXmmRegisterOperand(dst.LowBits(), src); in divsd()
1425 void X86_64Assembler::divsd(XmmRegister dst, const Address& src) { in divsd() argument
1428 EmitOptionalRex32(dst, src); in divsd()
1431 EmitOperand(dst.LowBits(), src); in divsd()
1435 void X86_64Assembler::addpd(XmmRegister dst, XmmRegister src) { in addpd() argument
1438 EmitOptionalRex32(dst, src); in addpd()
1441 EmitXmmRegisterOperand(dst.LowBits(), src); in addpd()
1445 void X86_64Assembler::vaddpd(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vaddpd() argument
1451 return vaddpd(dst, add_right, add_left); in vaddpd()
1458 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vaddpd()
1460 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vaddpd()
1472 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vaddpd()
1476 void X86_64Assembler::subpd(XmmRegister dst, XmmRegister src) { in subpd() argument
1479 EmitOptionalRex32(dst, src); in subpd()
1482 EmitXmmRegisterOperand(dst.LowBits(), src); in subpd()
1486 void X86_64Assembler::vsubpd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vsubpd() argument
1497 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vsubpd()
1499 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vsubpd()
1511 EmitXmmRegisterOperand(dst.LowBits(), src2); in vsubpd()
1515 void X86_64Assembler::mulpd(XmmRegister dst, XmmRegister src) { in mulpd() argument
1518 EmitOptionalRex32(dst, src); in mulpd()
1521 EmitXmmRegisterOperand(dst.LowBits(), src); in mulpd()
1524 void X86_64Assembler::vmulpd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vmulpd() argument
1531 return vmulpd(dst, src2, src1); in vmulpd()
1538 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vmulpd()
1540 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmulpd()
1552 EmitXmmRegisterOperand(dst.LowBits(), src2); in vmulpd()
1555 void X86_64Assembler::divpd(XmmRegister dst, XmmRegister src) { in divpd() argument
1558 EmitOptionalRex32(dst, src); in divpd()
1561 EmitXmmRegisterOperand(dst.LowBits(), src); in divpd()
1565 void X86_64Assembler::vdivpd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vdivpd() argument
1577 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vdivpd()
1579 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vdivpd()
1591 EmitXmmRegisterOperand(dst.LowBits(), src2); in vdivpd()
1595 void X86_64Assembler::movdqa(XmmRegister dst, XmmRegister src) { in movdqa() argument
1597 vmovdqa(dst, src); in movdqa()
1602 EmitOptionalRex32(dst, src); in movdqa()
1605 EmitXmmRegisterOperand(dst.LowBits(), src); in movdqa()
1609 void X86_64Assembler::vmovdqa(XmmRegister dst, XmmRegister src) { in vmovdqa() argument
1616 if (src.NeedsRex() && dst.NeedsRex()) { in vmovdqa()
1619 bool load = dst.NeedsRex(); in vmovdqa()
1623 bool rex_bit = load ? dst.NeedsRex() : src.NeedsRex(); in vmovdqa()
1629 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovdqa()
1650 EmitXmmRegisterOperand(src.LowBits(), dst); in vmovdqa()
1652 EmitXmmRegisterOperand(dst.LowBits(), src); in vmovdqa()
1656 void X86_64Assembler::movdqa(XmmRegister dst, const Address& src) { in movdqa() argument
1658 vmovdqa(dst, src); in movdqa()
1663 EmitOptionalRex32(dst, src); in movdqa()
1666 EmitOperand(dst.LowBits(), src); in movdqa()
1670 void X86_64Assembler::vmovdqa(XmmRegister dst, const Address& src) { in vmovdqa() argument
1686 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovdqa()
1691 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovdqa()
1707 EmitOperand(dst.LowBits(), src); in vmovdqa()
1710 void X86_64Assembler::movdqu(XmmRegister dst, const Address& src) { in movdqu() argument
1712 vmovdqu(dst, src); in movdqu()
1717 EmitOptionalRex32(dst, src); in movdqu()
1720 EmitOperand(dst.LowBits(), src); in movdqu()
1725 void X86_64Assembler::vmovdqu(XmmRegister dst, const Address& src) { in vmovdqu() argument
1741 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovdqu()
1746 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vmovdqu()
1762 EmitOperand(dst.LowBits(), src); in vmovdqu()
1765 void X86_64Assembler::movdqa(const Address& dst, XmmRegister src) { in movdqa() argument
1767 vmovdqa(dst, src); in movdqa()
1772 EmitOptionalRex32(src, dst); in movdqa()
1775 EmitOperand(src.LowBits(), dst); in movdqa()
1779 void X86_64Assembler::vmovdqa(const Address& dst, XmmRegister src) { in vmovdqa() argument
1785 uint8_t rex = dst.rex(); in vmovdqa()
1815 EmitOperand(src.LowBits(), dst); in vmovdqa()
1818 void X86_64Assembler::movdqu(const Address& dst, XmmRegister src) { in movdqu() argument
1820 vmovdqu(dst, src); in movdqu()
1825 EmitOptionalRex32(src, dst); in movdqu()
1828 EmitOperand(src.LowBits(), dst); in movdqu()
1832 void X86_64Assembler::vmovdqu(const Address& dst, XmmRegister src) { in vmovdqu() argument
1839 uint8_t rex = dst.rex(); in vmovdqu()
1869 EmitOperand(src.LowBits(), dst); in vmovdqu()
1872 void X86_64Assembler::paddb(XmmRegister dst, XmmRegister src) { in paddb() argument
1875 EmitOptionalRex32(dst, src); in paddb()
1878 EmitXmmRegisterOperand(dst.LowBits(), src); in paddb()
1882 void X86_64Assembler::vpaddb(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpaddb() argument
1889 return vpaddb(dst, add_right, add_left); in vpaddb()
1896 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpaddb()
1898 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpaddb()
1910 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpaddb()
1914 void X86_64Assembler::psubb(XmmRegister dst, XmmRegister src) { in psubb() argument
1917 EmitOptionalRex32(dst, src); in psubb()
1920 EmitXmmRegisterOperand(dst.LowBits(), src); in psubb()
1924 void X86_64Assembler::vpsubb(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpsubb() argument
1936 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpsubb()
1938 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpsubb()
1950 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpsubb()
1954 void X86_64Assembler::paddw(XmmRegister dst, XmmRegister src) { in paddw() argument
1957 EmitOptionalRex32(dst, src); in paddw()
1960 EmitXmmRegisterOperand(dst.LowBits(), src); in paddw()
1963 void X86_64Assembler::vpaddw(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpaddw() argument
1970 return vpaddw(dst, add_right, add_left); in vpaddw()
1977 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpaddw()
1979 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpaddw()
1991 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpaddw()
1995 void X86_64Assembler::psubw(XmmRegister dst, XmmRegister src) { in psubw() argument
1998 EmitOptionalRex32(dst, src); in psubw()
2001 EmitXmmRegisterOperand(dst.LowBits(), src); in psubw()
2004 void X86_64Assembler::vpsubw(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpsubw() argument
2016 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpsubw()
2018 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpsubw()
2030 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpsubw()
2034 void X86_64Assembler::pmullw(XmmRegister dst, XmmRegister src) { in pmullw() argument
2037 EmitOptionalRex32(dst, src); in pmullw()
2040 EmitXmmRegisterOperand(dst.LowBits(), src); in pmullw()
2043 void X86_64Assembler::vpmullw(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vpmullw() argument
2050 return vpmullw(dst, src2, src1); in vpmullw()
2057 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpmullw()
2059 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpmullw()
2071 EmitXmmRegisterOperand(dst.LowBits(), src2); in vpmullw()
2074 void X86_64Assembler::paddd(XmmRegister dst, XmmRegister src) { in paddd() argument
2077 EmitOptionalRex32(dst, src); in paddd()
2080 EmitXmmRegisterOperand(dst.LowBits(), src); in paddd()
2083 void X86_64Assembler::vpaddd(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpaddd() argument
2090 return vpaddd(dst, add_right, add_left); in vpaddd()
2097 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpaddd()
2099 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpaddd()
2111 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpaddd()
2114 void X86_64Assembler::psubd(XmmRegister dst, XmmRegister src) { in psubd() argument
2117 EmitOptionalRex32(dst, src); in psubd()
2120 EmitXmmRegisterOperand(dst.LowBits(), src); in psubd()
2124 void X86_64Assembler::pmulld(XmmRegister dst, XmmRegister src) { in pmulld() argument
2127 EmitOptionalRex32(dst, src); in pmulld()
2131 EmitXmmRegisterOperand(dst.LowBits(), src); in pmulld()
2134 void X86_64Assembler::vpmulld(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vpmulld() argument
2141 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpmulld()
2150 EmitXmmRegisterOperand(dst.LowBits(), src2); in vpmulld()
2153 void X86_64Assembler::paddq(XmmRegister dst, XmmRegister src) { in paddq() argument
2156 EmitOptionalRex32(dst, src); in paddq()
2159 EmitXmmRegisterOperand(dst.LowBits(), src); in paddq()
2163 void X86_64Assembler::vpaddq(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpaddq() argument
2170 return vpaddq(dst, add_right, add_left); in vpaddq()
2177 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpaddq()
2179 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpaddq()
2191 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpaddq()
2195 void X86_64Assembler::psubq(XmmRegister dst, XmmRegister src) { in psubq() argument
2198 EmitOptionalRex32(dst, src); in psubq()
2201 EmitXmmRegisterOperand(dst.LowBits(), src); in psubq()
2204 void X86_64Assembler::vpsubq(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpsubq() argument
2216 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpsubq()
2218 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpsubq()
2230 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpsubq()
2234 void X86_64Assembler::paddusb(XmmRegister dst, XmmRegister src) { in paddusb() argument
2237 EmitOptionalRex32(dst, src); in paddusb()
2240 EmitXmmRegisterOperand(dst.LowBits(), src); in paddusb()
2244 void X86_64Assembler::paddsb(XmmRegister dst, XmmRegister src) { in paddsb() argument
2247 EmitOptionalRex32(dst, src); in paddsb()
2250 EmitXmmRegisterOperand(dst.LowBits(), src); in paddsb()
2254 void X86_64Assembler::paddusw(XmmRegister dst, XmmRegister src) { in paddusw() argument
2257 EmitOptionalRex32(dst, src); in paddusw()
2260 EmitXmmRegisterOperand(dst.LowBits(), src); in paddusw()
2264 void X86_64Assembler::paddsw(XmmRegister dst, XmmRegister src) { in paddsw() argument
2267 EmitOptionalRex32(dst, src); in paddsw()
2270 EmitXmmRegisterOperand(dst.LowBits(), src); in paddsw()
2274 void X86_64Assembler::psubusb(XmmRegister dst, XmmRegister src) { in psubusb() argument
2277 EmitOptionalRex32(dst, src); in psubusb()
2280 EmitXmmRegisterOperand(dst.LowBits(), src); in psubusb()
2284 void X86_64Assembler::psubsb(XmmRegister dst, XmmRegister src) { in psubsb() argument
2287 EmitOptionalRex32(dst, src); in psubsb()
2290 EmitXmmRegisterOperand(dst.LowBits(), src); in psubsb()
2294 void X86_64Assembler::vpsubd(XmmRegister dst, XmmRegister add_left, XmmRegister add_right) { in vpsubd() argument
2306 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpsubd()
2308 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpsubd()
2320 EmitXmmRegisterOperand(dst.LowBits(), add_right); in vpsubd()
2324 void X86_64Assembler::psubusw(XmmRegister dst, XmmRegister src) { in psubusw() argument
2327 EmitOptionalRex32(dst, src); in psubusw()
2330 EmitXmmRegisterOperand(dst.LowBits(), src); in psubusw()
2334 void X86_64Assembler::psubsw(XmmRegister dst, XmmRegister src) { in psubsw() argument
2337 EmitOptionalRex32(dst, src); in psubsw()
2340 EmitXmmRegisterOperand(dst.LowBits(), src); in psubsw()
2344 void X86_64Assembler::cvtsi2ss(XmmRegister dst, CpuRegister src) { in cvtsi2ss() argument
2345 cvtsi2ss(dst, src, false); in cvtsi2ss()
2349 void X86_64Assembler::cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit) { in cvtsi2ss() argument
2354 EmitRex64(dst, src); in cvtsi2ss()
2356 EmitOptionalRex32(dst, src); in cvtsi2ss()
2360 EmitOperand(dst.LowBits(), Operand(src)); in cvtsi2ss()
2364 void X86_64Assembler::cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit) { in cvtsi2ss() argument
2369 EmitRex64(dst, src); in cvtsi2ss()
2371 EmitOptionalRex32(dst, src); in cvtsi2ss()
2375 EmitOperand(dst.LowBits(), src); in cvtsi2ss()
2379 void X86_64Assembler::cvtsi2sd(XmmRegister dst, CpuRegister src) { in cvtsi2sd() argument
2380 cvtsi2sd(dst, src, false); in cvtsi2sd()
2384 void X86_64Assembler::cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit) { in cvtsi2sd() argument
2389 EmitRex64(dst, src); in cvtsi2sd()
2391 EmitOptionalRex32(dst, src); in cvtsi2sd()
2395 EmitOperand(dst.LowBits(), Operand(src)); in cvtsi2sd()
2399 void X86_64Assembler::cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit) { in cvtsi2sd() argument
2404 EmitRex64(dst, src); in cvtsi2sd()
2406 EmitOptionalRex32(dst, src); in cvtsi2sd()
2410 EmitOperand(dst.LowBits(), src); in cvtsi2sd()
2414 void X86_64Assembler::cvtss2si(CpuRegister dst, XmmRegister src) { in cvtss2si() argument
2417 EmitOptionalRex32(dst, src); in cvtss2si()
2420 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtss2si()
2424 void X86_64Assembler::cvtss2sd(XmmRegister dst, XmmRegister src) { in cvtss2sd() argument
2427 EmitOptionalRex32(dst, src); in cvtss2sd()
2430 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtss2sd()
2434 void X86_64Assembler::cvtss2sd(XmmRegister dst, const Address& src) { in cvtss2sd() argument
2437 EmitOptionalRex32(dst, src); in cvtss2sd()
2440 EmitOperand(dst.LowBits(), src); in cvtss2sd()
2444 void X86_64Assembler::cvtsd2si(CpuRegister dst, XmmRegister src) { in cvtsd2si() argument
2447 EmitOptionalRex32(dst, src); in cvtsd2si()
2450 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtsd2si()
2454 void X86_64Assembler::cvttss2si(CpuRegister dst, XmmRegister src) { in cvttss2si() argument
2455 cvttss2si(dst, src, false); in cvttss2si()
2459 void X86_64Assembler::cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit) { in cvttss2si() argument
2464 EmitRex64(dst, src); in cvttss2si()
2466 EmitOptionalRex32(dst, src); in cvttss2si()
2470 EmitXmmRegisterOperand(dst.LowBits(), src); in cvttss2si()
2474 void X86_64Assembler::cvttsd2si(CpuRegister dst, XmmRegister src) { in cvttsd2si() argument
2475 cvttsd2si(dst, src, false); in cvttsd2si()
2479 void X86_64Assembler::cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit) { in cvttsd2si() argument
2484 EmitRex64(dst, src); in cvttsd2si()
2486 EmitOptionalRex32(dst, src); in cvttsd2si()
2490 EmitXmmRegisterOperand(dst.LowBits(), src); in cvttsd2si()
2494 void X86_64Assembler::cvtsd2ss(XmmRegister dst, XmmRegister src) { in cvtsd2ss() argument
2497 EmitOptionalRex32(dst, src); in cvtsd2ss()
2500 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtsd2ss()
2504 void X86_64Assembler::cvtsd2ss(XmmRegister dst, const Address& src) { in cvtsd2ss() argument
2507 EmitOptionalRex32(dst, src); in cvtsd2ss()
2510 EmitOperand(dst.LowBits(), src); in cvtsd2ss()
2514 void X86_64Assembler::cvtdq2ps(XmmRegister dst, XmmRegister src) { in cvtdq2ps() argument
2516 EmitOptionalRex32(dst, src); in cvtdq2ps()
2519 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtdq2ps()
2523 void X86_64Assembler::cvtdq2pd(XmmRegister dst, XmmRegister src) { in cvtdq2pd() argument
2526 EmitOptionalRex32(dst, src); in cvtdq2pd()
2529 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtdq2pd()
2609 void X86_64Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundsd() argument
2612 EmitOptionalRex32(dst, src); in roundsd()
2616 EmitXmmRegisterOperand(dst.LowBits(), src); in roundsd()
2621 void X86_64Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundss() argument
2624 EmitOptionalRex32(dst, src); in roundss()
2628 EmitXmmRegisterOperand(dst.LowBits(), src); in roundss()
2633 void X86_64Assembler::sqrtsd(XmmRegister dst, XmmRegister src) { in sqrtsd() argument
2636 EmitOptionalRex32(dst, src); in sqrtsd()
2639 EmitXmmRegisterOperand(dst.LowBits(), src); in sqrtsd()
2643 void X86_64Assembler::sqrtss(XmmRegister dst, XmmRegister src) { in sqrtss() argument
2646 EmitOptionalRex32(dst, src); in sqrtss()
2649 EmitXmmRegisterOperand(dst.LowBits(), src); in sqrtss()
2653 void X86_64Assembler::xorpd(XmmRegister dst, const Address& src) { in xorpd() argument
2656 EmitOptionalRex32(dst, src); in xorpd()
2659 EmitOperand(dst.LowBits(), src); in xorpd()
2663 void X86_64Assembler::xorpd(XmmRegister dst, XmmRegister src) { in xorpd() argument
2666 EmitOptionalRex32(dst, src); in xorpd()
2669 EmitXmmRegisterOperand(dst.LowBits(), src); in xorpd()
2673 void X86_64Assembler::xorps(XmmRegister dst, const Address& src) { in xorps() argument
2675 EmitOptionalRex32(dst, src); in xorps()
2678 EmitOperand(dst.LowBits(), src); in xorps()
2682 void X86_64Assembler::xorps(XmmRegister dst, XmmRegister src) { in xorps() argument
2684 EmitOptionalRex32(dst, src); in xorps()
2687 EmitXmmRegisterOperand(dst.LowBits(), src); in xorps()
2690 void X86_64Assembler::pxor(XmmRegister dst, XmmRegister src) { in pxor() argument
2693 EmitOptionalRex32(dst, src); in pxor()
2696 EmitXmmRegisterOperand(dst.LowBits(), src); in pxor()
2700 void X86_64Assembler::vpxor(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vpxor() argument
2707 return vpxor(dst, src2, src1); in vpxor()
2714 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpxor()
2716 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpxor()
2728 EmitXmmRegisterOperand(dst.LowBits(), src2); in vpxor()
2732 void X86_64Assembler::vxorps(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vxorps() argument
2739 return vxorps(dst, src2, src1); in vxorps()
2746 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vxorps()
2748 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vxorps()
2760 EmitXmmRegisterOperand(dst.LowBits(), src2); in vxorps()
2764 void X86_64Assembler::vxorpd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vxorpd() argument
2771 return vxorpd(dst, src2, src1); in vxorpd()
2778 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vxorpd()
2780 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vxorpd()
2792 EmitXmmRegisterOperand(dst.LowBits(), src2); in vxorpd()
2795 void X86_64Assembler::andpd(XmmRegister dst, const Address& src) { in andpd() argument
2798 EmitOptionalRex32(dst, src); in andpd()
2801 EmitOperand(dst.LowBits(), src); in andpd()
2804 void X86_64Assembler::andpd(XmmRegister dst, XmmRegister src) { in andpd() argument
2807 EmitOptionalRex32(dst, src); in andpd()
2810 EmitXmmRegisterOperand(dst.LowBits(), src); in andpd()
2813 void X86_64Assembler::andps(XmmRegister dst, XmmRegister src) { in andps() argument
2815 EmitOptionalRex32(dst, src); in andps()
2818 EmitXmmRegisterOperand(dst.LowBits(), src); in andps()
2821 void X86_64Assembler::pand(XmmRegister dst, XmmRegister src) { in pand() argument
2824 EmitOptionalRex32(dst, src); in pand()
2827 EmitXmmRegisterOperand(dst.LowBits(), src); in pand()
2831 void X86_64Assembler::vpand(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vpand() argument
2838 return vpand(dst, src2, src1); in vpand()
2845 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpand()
2847 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpand()
2859 EmitXmmRegisterOperand(dst.LowBits(), src2); in vpand()
2863 void X86_64Assembler::vandps(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vandps() argument
2870 return vandps(dst, src2, src1); in vandps()
2877 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vandps()
2879 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vandps()
2891 EmitXmmRegisterOperand(dst.LowBits(), src2); in vandps()
2895 void X86_64Assembler::vandpd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vandpd() argument
2902 return vandpd(dst, src2, src1); in vandpd()
2909 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vandpd()
2911 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vandpd()
2923 EmitXmmRegisterOperand(dst.LowBits(), src2); in vandpd()
2926 void X86_64Assembler::andn(CpuRegister dst, CpuRegister src1, CpuRegister src2) { in andn() argument
2929 uint8_t byte_one = EmitVexPrefixByteOne(dst.NeedsRex(), in andn()
2942 EmitRegisterOperand(dst.LowBits(), src2.LowBits()); in andn()
2945 void X86_64Assembler::andnpd(XmmRegister dst, XmmRegister src) { in andnpd() argument
2948 EmitOptionalRex32(dst, src); in andnpd()
2951 EmitXmmRegisterOperand(dst.LowBits(), src); in andnpd()
2954 void X86_64Assembler::andnps(XmmRegister dst, XmmRegister src) { in andnps() argument
2956 EmitOptionalRex32(dst, src); in andnps()
2959 EmitXmmRegisterOperand(dst.LowBits(), src); in andnps()
2962 void X86_64Assembler::pandn(XmmRegister dst, XmmRegister src) { in pandn() argument
2965 EmitOptionalRex32(dst, src); in pandn()
2968 EmitXmmRegisterOperand(dst.LowBits(), src); in pandn()
2972 void X86_64Assembler::vpandn(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vpandn() argument
2984 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpandn()
2986 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpandn()
2998 EmitXmmRegisterOperand(dst.LowBits(), src2); in vpandn()
3002 void X86_64Assembler::vandnps(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vandnps() argument
3014 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vandnps()
3016 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vandnps()
3028 EmitXmmRegisterOperand(dst.LowBits(), src2); in vandnps()
3032 void X86_64Assembler::vandnpd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vandnpd() argument
3044 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vandnpd()
3046 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vandnpd()
3058 EmitXmmRegisterOperand(dst.LowBits(), src2); in vandnpd()
3061 void X86_64Assembler::orpd(XmmRegister dst, XmmRegister src) { in orpd() argument
3064 EmitOptionalRex32(dst, src); in orpd()
3067 EmitXmmRegisterOperand(dst.LowBits(), src); in orpd()
3070 void X86_64Assembler::orps(XmmRegister dst, XmmRegister src) { in orps() argument
3072 EmitOptionalRex32(dst, src); in orps()
3075 EmitXmmRegisterOperand(dst.LowBits(), src); in orps()
3078 void X86_64Assembler::por(XmmRegister dst, XmmRegister src) { in por() argument
3081 EmitOptionalRex32(dst, src); in por()
3084 EmitXmmRegisterOperand(dst.LowBits(), src); in por()
3088 void X86_64Assembler::vpor(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vpor() argument
3095 return vpor(dst, src2, src1); in vpor()
3102 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpor()
3104 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpor()
3116 EmitXmmRegisterOperand(dst.LowBits(), src2); in vpor()
3120 void X86_64Assembler::vorps(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vorps() argument
3127 return vorps(dst, src2, src1); in vorps()
3134 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_NONE); in vorps()
3136 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vorps()
3148 EmitXmmRegisterOperand(dst.LowBits(), src2); in vorps()
3152 void X86_64Assembler::vorpd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vorpd() argument
3159 return vorpd(dst, src2, src1); in vorpd()
3166 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vorpd()
3168 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vorpd()
3180 EmitXmmRegisterOperand(dst.LowBits(), src2); in vorpd()
3183 void X86_64Assembler::pavgb(XmmRegister dst, XmmRegister src) { in pavgb() argument
3186 EmitOptionalRex32(dst, src); in pavgb()
3189 EmitXmmRegisterOperand(dst.LowBits(), src); in pavgb()
3192 void X86_64Assembler::pavgw(XmmRegister dst, XmmRegister src) { in pavgw() argument
3195 EmitOptionalRex32(dst, src); in pavgw()
3198 EmitXmmRegisterOperand(dst.LowBits(), src); in pavgw()
3201 void X86_64Assembler::psadbw(XmmRegister dst, XmmRegister src) { in psadbw() argument
3204 EmitOptionalRex32(dst, src); in psadbw()
3207 EmitXmmRegisterOperand(dst.LowBits(), src); in psadbw()
3210 void X86_64Assembler::pmaddwd(XmmRegister dst, XmmRegister src) { in pmaddwd() argument
3213 EmitOptionalRex32(dst, src); in pmaddwd()
3216 EmitXmmRegisterOperand(dst.LowBits(), src); in pmaddwd()
3219 void X86_64Assembler::vpmaddwd(XmmRegister dst, XmmRegister src1, XmmRegister src2) { in vpmaddwd() argument
3226 return vpmaddwd(dst, src2, src1); in vpmaddwd()
3233 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), vvvv_reg, SET_VEX_L_128, SET_VEX_PP_66); in vpmaddwd()
3235 ByteOne = EmitVexPrefixByteOne(dst.NeedsRex(), in vpmaddwd()
3247 EmitXmmRegisterOperand(dst.LowBits(), src2); in vpmaddwd()
3250 void X86_64Assembler::phaddw(XmmRegister dst, XmmRegister src) { in phaddw() argument
3253 EmitOptionalRex32(dst, src); in phaddw()
3257 EmitXmmRegisterOperand(dst.LowBits(), src); in phaddw()
3260 void X86_64Assembler::phaddd(XmmRegister dst, XmmRegister src) { in phaddd() argument
3263 EmitOptionalRex32(dst, src); in phaddd()
3267 EmitXmmRegisterOperand(dst.LowBits(), src); in phaddd()
3270 void X86_64Assembler::haddps(XmmRegister dst, XmmRegister src) { in haddps() argument
3273 EmitOptionalRex32(dst, src); in haddps()
3276 EmitXmmRegisterOperand(dst.LowBits(), src); in haddps()
3279 void X86_64Assembler::haddpd(XmmRegister dst, XmmRegister src) { in haddpd() argument
3282 EmitOptionalRex32(dst, src); in haddpd()
3285 EmitXmmRegisterOperand(dst.LowBits(), src); in haddpd()
3288 void X86_64Assembler::phsubw(XmmRegister dst, XmmRegister src) { in phsubw() argument
3291 EmitOptionalRex32(dst, src); in phsubw()
3295 EmitXmmRegisterOperand(dst.LowBits(), src); in phsubw()
3298 void X86_64Assembler::phsubd(XmmRegister dst, XmmRegister src) { in phsubd() argument
3301 EmitOptionalRex32(dst, src); in phsubd()
3305 EmitXmmRegisterOperand(dst.LowBits(), src); in phsubd()
3308 void X86_64Assembler::hsubps(XmmRegister dst, XmmRegister src) { in hsubps() argument
3311 EmitOptionalRex32(dst, src); in hsubps()
3314 EmitXmmRegisterOperand(dst.LowBits(), src); in hsubps()
3317 void X86_64Assembler::hsubpd(XmmRegister dst, XmmRegister src) { in hsubpd() argument
3320 EmitOptionalRex32(dst, src); in hsubpd()
3323 EmitXmmRegisterOperand(dst.LowBits(), src); in hsubpd()
3326 void X86_64Assembler::pminsb(XmmRegister dst, XmmRegister src) { in pminsb() argument
3329 EmitOptionalRex32(dst, src); in pminsb()
3333 EmitXmmRegisterOperand(dst.LowBits(), src); in pminsb()
3336 void X86_64Assembler::pmaxsb(XmmRegister dst, XmmRegister src) { in pmaxsb() argument
3339 EmitOptionalRex32(dst, src); in pmaxsb()
3343 EmitXmmRegisterOperand(dst.LowBits(), src); in pmaxsb()
3346 void X86_64Assembler::pminsw(XmmRegister dst, XmmRegister src) { in pminsw() argument
3349 EmitOptionalRex32(dst, src); in pminsw()
3352 EmitXmmRegisterOperand(dst.LowBits(), src); in pminsw()
3355 void X86_64Assembler::pmaxsw(XmmRegister dst, XmmRegister src) { in pmaxsw() argument
3358 EmitOptionalRex32(dst, src); in pmaxsw()
3361 EmitXmmRegisterOperand(dst.LowBits(), src); in pmaxsw()
3364 void X86_64Assembler::pminsd(XmmRegister dst, XmmRegister src) { in pminsd() argument
3367 EmitOptionalRex32(dst, src); in pminsd()
3371 EmitXmmRegisterOperand(dst.LowBits(), src); in pminsd()
3374 void X86_64Assembler::pmaxsd(XmmRegister dst, XmmRegister src) { in pmaxsd() argument
3377 EmitOptionalRex32(dst, src); in pmaxsd()
3381 EmitXmmRegisterOperand(dst.LowBits(), src); in pmaxsd()
3384 void X86_64Assembler::pminub(XmmRegister dst, XmmRegister src) { in pminub() argument
3387 EmitOptionalRex32(dst, src); in pminub()
3390 EmitXmmRegisterOperand(dst.LowBits(), src); in pminub()
3393 void X86_64Assembler::pmaxub(XmmRegister dst, XmmRegister src) { in pmaxub() argument
3396 EmitOptionalRex32(dst, src); in pmaxub()
3399 EmitXmmRegisterOperand(dst.LowBits(), src); in pmaxub()
3402 void X86_64Assembler::pminuw(XmmRegister dst, XmmRegister src) { in pminuw() argument
3405 EmitOptionalRex32(dst, src); in pminuw()
3409 EmitXmmRegisterOperand(dst.LowBits(), src); in pminuw()
3412 void X86_64Assembler::pmaxuw(XmmRegister dst, XmmRegister src) { in pmaxuw() argument
3415 EmitOptionalRex32(dst, src); in pmaxuw()
3419 EmitXmmRegisterOperand(dst.LowBits(), src); in pmaxuw()
3422 void X86_64Assembler::pminud(XmmRegister dst, XmmRegister src) { in pminud() argument
3425 EmitOptionalRex32(dst, src); in pminud()
3429 EmitXmmRegisterOperand(dst.LowBits(), src); in pminud()
3432 void X86_64Assembler::pmaxud(XmmRegister dst, XmmRegister src) { in pmaxud() argument
3435 EmitOptionalRex32(dst, src); in pmaxud()
3439 EmitXmmRegisterOperand(dst.LowBits(), src); in pmaxud()
3442 void X86_64Assembler::minps(XmmRegister dst, XmmRegister src) { in minps() argument
3444 EmitOptionalRex32(dst, src); in minps()
3447 EmitXmmRegisterOperand(dst.LowBits(), src); in minps()
3450 void X86_64Assembler::maxps(XmmRegister dst, XmmRegister src) { in maxps() argument
3452 EmitOptionalRex32(dst, src); in maxps()
3455 EmitXmmRegisterOperand(dst.LowBits(), src); in maxps()
3458 void X86_64Assembler::minpd(XmmRegister dst, XmmRegister src) { in minpd() argument
3461 EmitOptionalRex32(dst, src); in minpd()
3464 EmitXmmRegisterOperand(dst.LowBits(), src); in minpd()
3467 void X86_64Assembler::maxpd(XmmRegister dst, XmmRegister src) { in maxpd() argument
3470 EmitOptionalRex32(dst, src); in maxpd()
3473 EmitXmmRegisterOperand(dst.LowBits(), src); in maxpd()
3476 void X86_64Assembler::pcmpeqb(XmmRegister dst, XmmRegister src) { in pcmpeqb() argument
3479 EmitOptionalRex32(dst, src); in pcmpeqb()
3482 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpeqb()
3485 void X86_64Assembler::pcmpeqw(XmmRegister dst, XmmRegister src) { in pcmpeqw() argument
3488 EmitOptionalRex32(dst, src); in pcmpeqw()
3491 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpeqw()
3494 void X86_64Assembler::pcmpeqd(XmmRegister dst, XmmRegister src) { in pcmpeqd() argument
3497 EmitOptionalRex32(dst, src); in pcmpeqd()
3500 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpeqd()
3503 void X86_64Assembler::pcmpeqq(XmmRegister dst, XmmRegister src) { in pcmpeqq() argument
3506 EmitOptionalRex32(dst, src); in pcmpeqq()
3510 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpeqq()
3513 void X86_64Assembler::pcmpgtb(XmmRegister dst, XmmRegister src) { in pcmpgtb() argument
3516 EmitOptionalRex32(dst, src); in pcmpgtb()
3519 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpgtb()
3522 void X86_64Assembler::pcmpgtw(XmmRegister dst, XmmRegister src) { in pcmpgtw() argument
3525 EmitOptionalRex32(dst, src); in pcmpgtw()
3528 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpgtw()
3531 void X86_64Assembler::pcmpgtd(XmmRegister dst, XmmRegister src) { in pcmpgtd() argument
3534 EmitOptionalRex32(dst, src); in pcmpgtd()
3537 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpgtd()
3540 void X86_64Assembler::pcmpgtq(XmmRegister dst, XmmRegister src) { in pcmpgtq() argument
3543 EmitOptionalRex32(dst, src); in pcmpgtq()
3547 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpgtq()
3550 void X86_64Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufpd() argument
3553 EmitOptionalRex32(dst, src); in shufpd()
3556 EmitXmmRegisterOperand(dst.LowBits(), src); in shufpd()
3561 void X86_64Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufps() argument
3563 EmitOptionalRex32(dst, src); in shufps()
3566 EmitXmmRegisterOperand(dst.LowBits(), src); in shufps()
3571 void X86_64Assembler::pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in pshufd() argument
3574 EmitOptionalRex32(dst, src); in pshufd()
3577 EmitXmmRegisterOperand(dst.LowBits(), src); in pshufd()
3582 void X86_64Assembler::punpcklbw(XmmRegister dst, XmmRegister src) { in punpcklbw() argument
3585 EmitOptionalRex32(dst, src); in punpcklbw()
3588 EmitXmmRegisterOperand(dst.LowBits(), src); in punpcklbw()
3592 void X86_64Assembler::punpcklwd(XmmRegister dst, XmmRegister src) { in punpcklwd() argument
3595 EmitOptionalRex32(dst, src); in punpcklwd()
3598 EmitXmmRegisterOperand(dst.LowBits(), src); in punpcklwd()
3602 void X86_64Assembler::punpckldq(XmmRegister dst, XmmRegister src) { in punpckldq() argument
3605 EmitOptionalRex32(dst, src); in punpckldq()
3608 EmitXmmRegisterOperand(dst.LowBits(), src); in punpckldq()
3612 void X86_64Assembler::punpcklqdq(XmmRegister dst, XmmRegister src) { in punpcklqdq() argument
3615 EmitOptionalRex32(dst, src); in punpcklqdq()
3618 EmitXmmRegisterOperand(dst.LowBits(), src); in punpcklqdq()
3622 void X86_64Assembler::punpckhbw(XmmRegister dst, XmmRegister src) { in punpckhbw() argument
3625 EmitOptionalRex32(dst, src); in punpckhbw()
3628 EmitXmmRegisterOperand(dst.LowBits(), src); in punpckhbw()
3632 void X86_64Assembler::punpckhwd(XmmRegister dst, XmmRegister src) { in punpckhwd() argument
3635 EmitOptionalRex32(dst, src); in punpckhwd()
3638 EmitXmmRegisterOperand(dst.LowBits(), src); in punpckhwd()
3642 void X86_64Assembler::punpckhdq(XmmRegister dst, XmmRegister src) { in punpckhdq() argument
3645 EmitOptionalRex32(dst, src); in punpckhdq()
3648 EmitXmmRegisterOperand(dst.LowBits(), src); in punpckhdq()
3652 void X86_64Assembler::punpckhqdq(XmmRegister dst, XmmRegister src) { in punpckhqdq() argument
3655 EmitOptionalRex32(dst, src); in punpckhqdq()
3658 EmitXmmRegisterOperand(dst.LowBits(), src); in punpckhqdq()
3777 void X86_64Assembler::fstl(const Address& dst) { in fstl() argument
3780 EmitOperand(2, dst); in fstl()
3784 void X86_64Assembler::fstpl(const Address& dst) { in fstpl() argument
3787 EmitOperand(3, dst); in fstpl()
3799 void X86_64Assembler::fnstcw(const Address& dst) { in fnstcw() argument
3802 EmitOperand(7, dst); in fnstcw()
3813 void X86_64Assembler::fistpl(const Address& dst) { in fistpl() argument
3816 EmitOperand(7, dst); in fistpl()
3820 void X86_64Assembler::fistps(const Address& dst) { in fistps() argument
3823 EmitOperand(3, dst); in fistps()
3890 bool X86_64Assembler::try_xchg_rax(CpuRegister dst, in try_xchg_rax() argument
3894 Register dst_reg = dst.AsRegister(); in try_xchg_rax()
3910 void X86_64Assembler::xchgb(CpuRegister dst, CpuRegister src) { in xchgb() argument
3913 EmitOptionalByteRegNormalizingRex32(dst, src, /*normalize_both=*/ true); in xchgb()
3915 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in xchgb()
3927 void X86_64Assembler::xchgw(CpuRegister dst, CpuRegister src) { in xchgw() argument
3930 if (try_xchg_rax(dst, src, &X86_64Assembler::EmitOptionalRex32)) { in xchgw()
3935 EmitOptionalRex32(dst, src); in xchgw()
3937 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in xchgw()
3950 void X86_64Assembler::xchgl(CpuRegister dst, CpuRegister src) { in xchgl() argument
3952 if (try_xchg_rax(dst, src, &X86_64Assembler::EmitOptionalRex32)) { in xchgl()
3957 EmitOptionalRex32(dst, src); in xchgl()
3959 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in xchgl()
3971 void X86_64Assembler::xchgq(CpuRegister dst, CpuRegister src) { in xchgq() argument
3973 if (try_xchg_rax(dst, src, &X86_64Assembler::EmitRex64)) { in xchgq()
3978 EmitRex64(dst, src); in xchgq()
3980 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in xchgq()
3992 void X86_64Assembler::xaddb(CpuRegister dst, CpuRegister src) { in xaddb() argument
3994 EmitOptionalByteRegNormalizingRex32(src, dst, /*normalize_both=*/ true); in xaddb()
3997 EmitRegisterOperand(src.LowBits(), dst.LowBits()); in xaddb()
4010 void X86_64Assembler::xaddw(CpuRegister dst, CpuRegister src) { in xaddw() argument
4013 EmitOptionalRex32(src, dst); in xaddw()
4016 EmitRegisterOperand(src.LowBits(), dst.LowBits()); in xaddw()
4030 void X86_64Assembler::xaddl(CpuRegister dst, CpuRegister src) { in xaddl() argument
4032 EmitOptionalRex32(src, dst); in xaddl()
4035 EmitRegisterOperand(src.LowBits(), dst.LowBits()); in xaddl()
4048 void X86_64Assembler::xaddq(CpuRegister dst, CpuRegister src) { in xaddq() argument
4050 EmitRex64(src, dst); in xaddq()
4053 EmitRegisterOperand(src.LowBits(), dst.LowBits()); in xaddq()
4157 void X86_64Assembler::addl(CpuRegister dst, CpuRegister src) { in addl() argument
4159 EmitOptionalRex32(dst, src); in addl()
4161 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in addl()
4231 void X86_64Assembler::testb(const Address& dst, const Immediate& imm) { in testb() argument
4233 EmitOptionalRex32(dst); in testb()
4235 EmitOperand(Register::RAX, dst); in testb()
4241 void X86_64Assembler::testl(const Address& dst, const Immediate& imm) { in testl() argument
4243 EmitOptionalRex32(dst); in testl()
4245 EmitOperand(0, dst); in testl()
4250 void X86_64Assembler::andl(CpuRegister dst, CpuRegister src) { in andl() argument
4252 EmitOptionalRex32(dst, src); in andl()
4254 EmitOperand(dst.LowBits(), Operand(src)); in andl()
4266 void X86_64Assembler::andl(CpuRegister dst, const Immediate& imm) { in andl() argument
4268 EmitOptionalRex32(dst); in andl()
4269 EmitComplex(4, Operand(dst), imm); in andl()
4281 void X86_64Assembler::andq(CpuRegister dst, CpuRegister src) { in andq() argument
4283 EmitRex64(dst, src); in andq()
4285 EmitOperand(dst.LowBits(), Operand(src)); in andq()
4289 void X86_64Assembler::andq(CpuRegister dst, const Address& src) { in andq() argument
4291 EmitRex64(dst, src); in andq()
4293 EmitOperand(dst.LowBits(), src); in andq()
4306 void X86_64Assembler::orl(CpuRegister dst, CpuRegister src) { in orl() argument
4308 EmitOptionalRex32(dst, src); in orl()
4310 EmitOperand(dst.LowBits(), Operand(src)); in orl()
4322 void X86_64Assembler::orl(CpuRegister dst, const Immediate& imm) { in orl() argument
4324 EmitOptionalRex32(dst); in orl()
4325 EmitComplex(1, Operand(dst), imm); in orl()
4329 void X86_64Assembler::orq(CpuRegister dst, const Immediate& imm) { in orq() argument
4332 EmitRex64(dst); in orq()
4333 EmitComplex(1, Operand(dst), imm); in orq()
4337 void X86_64Assembler::orq(CpuRegister dst, CpuRegister src) { in orq() argument
4339 EmitRex64(dst, src); in orq()
4341 EmitOperand(dst.LowBits(), Operand(src)); in orq()
4345 void X86_64Assembler::orq(CpuRegister dst, const Address& src) { in orq() argument
4347 EmitRex64(dst, src); in orq()
4349 EmitOperand(dst.LowBits(), src); in orq()
4353 void X86_64Assembler::xorl(CpuRegister dst, CpuRegister src) { in xorl() argument
4355 EmitOptionalRex32(dst, src); in xorl()
4357 EmitOperand(dst.LowBits(), Operand(src)); in xorl()
4369 void X86_64Assembler::xorl(CpuRegister dst, const Immediate& imm) { in xorl() argument
4371 EmitOptionalRex32(dst); in xorl()
4372 EmitComplex(6, Operand(dst), imm); in xorl()
4376 void X86_64Assembler::xorq(CpuRegister dst, CpuRegister src) { in xorq() argument
4378 EmitRex64(dst, src); in xorq()
4380 EmitOperand(dst.LowBits(), Operand(src)); in xorq()
4384 void X86_64Assembler::xorq(CpuRegister dst, const Immediate& imm) { in xorq() argument
4387 EmitRex64(dst); in xorq()
4388 EmitComplex(6, Operand(dst), imm); in xorq()
4391 void X86_64Assembler::xorq(CpuRegister dst, const Address& src) { in xorq() argument
4393 EmitRex64(dst, src); in xorq()
4395 EmitOperand(dst.LowBits(), src); in xorq()
4427 void X86_64Assembler::rex_reg_mem(bool force, bool w, Register* dst, const Address& mem) {
4440 if (dst != nullptr && *dst >= Register::R8 && *dst < Register::kNumberOfCpuRegisters) {
4442 *dst = static_cast<Register>(*dst - 8);
4476 void X86_64Assembler::addq(CpuRegister dst, const Address& address) { in addq() argument
4478 EmitRex64(dst, address); in addq()
4480 EmitOperand(dst.LowBits(), address); in addq()
4484 void X86_64Assembler::addq(CpuRegister dst, CpuRegister src) { in addq() argument
4487 EmitRex64(src, dst); in addq()
4489 EmitRegisterOperand(src.LowBits(), dst.LowBits()); in addq()
4526 void X86_64Assembler::subl(CpuRegister dst, CpuRegister src) { in subl() argument
4528 EmitOptionalRex32(dst, src); in subl()
4530 EmitOperand(dst.LowBits(), Operand(src)); in subl()
4549 void X86_64Assembler::subq(CpuRegister dst, CpuRegister src) { in subq() argument
4551 EmitRex64(dst, src); in subq()
4553 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in subq()
4618 void X86_64Assembler::imull(CpuRegister dst, CpuRegister src) { in imull() argument
4620 EmitOptionalRex32(dst, src); in imull()
4623 EmitOperand(dst.LowBits(), Operand(src)); in imull()
4626 void X86_64Assembler::imull(CpuRegister dst, CpuRegister src, const Immediate& imm) { in imull() argument
4630 EmitOptionalRex32(dst, src); in imull()
4637 EmitOperand(dst.LowBits(), Operand(src)); in imull()
4642 EmitOperand(dst.LowBits(), Operand(src)); in imull()
4662 void X86_64Assembler::imulq(CpuRegister dst, CpuRegister src) { in imulq() argument
4664 EmitRex64(dst, src); in imulq()
4667 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in imulq()
4675 void X86_64Assembler::imulq(CpuRegister dst, CpuRegister reg, const Immediate& imm) { in imulq() argument
4679 EmitRex64(dst, reg); in imulq()
4686 EmitOperand(dst.LowBits(), Operand(reg)); in imulq()
4691 EmitOperand(dst.LowBits(), Operand(reg)); in imulq()
5124 void X86_64Assembler::setcc(Condition condition, CpuRegister dst) { in setcc() argument
5127 if (dst.NeedsRex() || dst.AsRegister() > 3) { in setcc()
5128 EmitOptionalRex(true, false, false, false, dst.NeedsRex()); in setcc()
5132 EmitUint8(0xC0 + dst.LowBits()); in setcc()
5135 void X86_64Assembler::blsi(CpuRegister dst, CpuRegister src) { in blsi() argument
5143 X86_64ManagedRegister::FromCpuRegister(dst.AsRegister()), in blsi()
5153 void X86_64Assembler::blsmsk(CpuRegister dst, CpuRegister src) { in blsmsk() argument
5161 X86_64ManagedRegister::FromCpuRegister(dst.AsRegister()), in blsmsk()
5171 void X86_64Assembler::blsr(CpuRegister dst, CpuRegister src) { in blsr() argument
5179 X86_64ManagedRegister::FromCpuRegister(dst.AsRegister()), in blsr()
5189 void X86_64Assembler::bswapl(CpuRegister dst) { in bswapl() argument
5191 EmitOptionalRex(false, false, false, false, dst.NeedsRex()); in bswapl()
5193 EmitUint8(0xC8 + dst.LowBits()); in bswapl()
5196 void X86_64Assembler::bswapq(CpuRegister dst) { in bswapq() argument
5198 EmitOptionalRex(false, true, false, false, dst.NeedsRex()); in bswapq()
5200 EmitUint8(0xC8 + dst.LowBits()); in bswapq()
5203 void X86_64Assembler::bsfl(CpuRegister dst, CpuRegister src) { in bsfl() argument
5205 EmitOptionalRex32(dst, src); in bsfl()
5208 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in bsfl()
5211 void X86_64Assembler::bsfl(CpuRegister dst, const Address& src) { in bsfl() argument
5213 EmitOptionalRex32(dst, src); in bsfl()
5216 EmitOperand(dst.LowBits(), src); in bsfl()
5219 void X86_64Assembler::bsfq(CpuRegister dst, CpuRegister src) { in bsfq() argument
5221 EmitRex64(dst, src); in bsfq()
5224 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in bsfq()
5227 void X86_64Assembler::bsfq(CpuRegister dst, const Address& src) { in bsfq() argument
5229 EmitRex64(dst, src); in bsfq()
5232 EmitOperand(dst.LowBits(), src); in bsfq()
5235 void X86_64Assembler::bsrl(CpuRegister dst, CpuRegister src) { in bsrl() argument
5237 EmitOptionalRex32(dst, src); in bsrl()
5240 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in bsrl()
5243 void X86_64Assembler::bsrl(CpuRegister dst, const Address& src) { in bsrl() argument
5245 EmitOptionalRex32(dst, src); in bsrl()
5248 EmitOperand(dst.LowBits(), src); in bsrl()
5251 void X86_64Assembler::bsrq(CpuRegister dst, CpuRegister src) { in bsrq() argument
5253 EmitRex64(dst, src); in bsrq()
5256 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in bsrq()
5259 void X86_64Assembler::bsrq(CpuRegister dst, const Address& src) { in bsrq() argument
5261 EmitRex64(dst, src); in bsrq()
5264 EmitOperand(dst.LowBits(), src); in bsrq()
5267 void X86_64Assembler::popcntl(CpuRegister dst, CpuRegister src) { in popcntl() argument
5270 EmitOptionalRex32(dst, src); in popcntl()
5273 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in popcntl()
5276 void X86_64Assembler::popcntl(CpuRegister dst, const Address& src) { in popcntl() argument
5279 EmitOptionalRex32(dst, src); in popcntl()
5282 EmitOperand(dst.LowBits(), src); in popcntl()
5285 void X86_64Assembler::popcntq(CpuRegister dst, CpuRegister src) { in popcntq() argument
5288 EmitRex64(dst, src); in popcntq()
5291 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in popcntq()
5294 void X86_64Assembler::popcntq(CpuRegister dst, const Address& src) { in popcntq() argument
5297 EmitRex64(dst, src); in popcntq()
5300 EmitOperand(dst.LowBits(), src); in popcntq()
5350 void X86_64Assembler::LoadDoubleConstant(XmmRegister dst, double value) { in LoadDoubleConstant() argument
5355 movsd(dst, Address(CpuRegister(RSP), 0)); in LoadDoubleConstant()
5550 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, CpuRegister src) { in EmitOptionalRex32() argument
5551 EmitOptionalRex(false, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalRex32()
5554 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, XmmRegister src) { in EmitOptionalRex32() argument
5555 EmitOptionalRex(false, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalRex32()
5558 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, XmmRegister src) { in EmitOptionalRex32() argument
5559 EmitOptionalRex(false, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalRex32()
5562 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, CpuRegister src) { in EmitOptionalRex32() argument
5563 EmitOptionalRex(false, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalRex32()
5573 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, const Operand& operand) { in EmitOptionalRex32() argument
5575 if (dst.NeedsRex()) { in EmitOptionalRex32()
5583 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, const Operand& operand) { in EmitOptionalRex32() argument
5585 if (dst.NeedsRex()) { in EmitOptionalRex32()
5607 void X86_64Assembler::EmitRex64(CpuRegister dst, CpuRegister src) { in EmitRex64() argument
5608 EmitOptionalRex(false, true, dst.NeedsRex(), false, src.NeedsRex()); in EmitRex64()
5611 void X86_64Assembler::EmitRex64(XmmRegister dst, CpuRegister src) { in EmitRex64() argument
5612 EmitOptionalRex(false, true, dst.NeedsRex(), false, src.NeedsRex()); in EmitRex64()
5615 void X86_64Assembler::EmitRex64(CpuRegister dst, XmmRegister src) { in EmitRex64() argument
5616 EmitOptionalRex(false, true, dst.NeedsRex(), false, src.NeedsRex()); in EmitRex64()
5619 void X86_64Assembler::EmitRex64(CpuRegister dst, const Operand& operand) { in EmitRex64() argument
5621 if (dst.NeedsRex()) { in EmitRex64()
5627 void X86_64Assembler::EmitRex64(XmmRegister dst, const Operand& operand) { in EmitRex64() argument
5629 if (dst.NeedsRex()) { in EmitRex64()
5635 void X86_64Assembler::EmitOptionalByteRegNormalizingRex32(CpuRegister dst, in EmitOptionalByteRegNormalizingRex32() argument
5643 force |= dst.AsRegister() > 3; in EmitOptionalByteRegNormalizingRex32()
5648 EmitOptionalRex(force, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalByteRegNormalizingRex32()
5651 void X86_64Assembler::EmitOptionalByteRegNormalizingRex32(CpuRegister dst, const Operand& operand) { in EmitOptionalByteRegNormalizingRex32() argument
5654 bool force = dst.AsRegister() > 3; in EmitOptionalByteRegNormalizingRex32()
5658 if (dst.NeedsRex()) { in EmitOptionalByteRegNormalizingRex32()