Lines Matching refs:rs1
196 void PrintLoadStoreAddress(uint32_t rs1, int32_t offset);
359 void DisassemblerRiscv64::Printer::PrintLoadStoreAddress(uint32_t rs1, int32_t offset) { in PrintLoadStoreAddress() argument
363 os_ << "(" << XRegName(rs1) << ")"; in PrintLoadStoreAddress()
365 if (rs1 == TR && offset >= 0) { in PrintLoadStoreAddress()
412 uint32_t rs1 = GetRs1(insn32); in Print32Jalr() local
415 if (rd == Zero && rs1 == RA && imm12 == 0) { in Print32Jalr()
418 os_ << "jr " << XRegName(rs1); in Print32Jalr()
420 os_ << "jalr " << XRegName(rs1); in Print32Jalr()
427 os_ << XRegName(rs1); in Print32Jalr()
429 os_ << imm12 << "(" << XRegName(rs1) << ")"; in Print32Jalr()
447 uint32_t rs1 = GetRs1(insn32); in Print32BCond() local
450 os_ << opcode << "z " << XRegName(rs1); in Print32BCond()
451 } else if (rs1 == Zero && (funct3 == 4u || funct3 == 5u)) { in Print32BCond()
456 os_ << opcode << " " << XRegName(rs1) << ", " << XRegName(rs2); in Print32BCond()
712 uint32_t rs1 = GetRs1(insn32); in Print32BinOpImm() local
718 os_ << "sextw " << XRegName(rd) << ", " << XRegName(rs1); in Print32BinOpImm()
719 } else if (rd == Zero && rs1 == Zero) { in Print32BinOpImm()
722 os_ << "mv " << XRegName(rd) << ", " << XRegName(rs1); in Print32BinOpImm()
725 os_ << "not " << XRegName(rd) << ", " << XRegName(rs1); in Print32BinOpImm()
727 os_ << "zextb " << XRegName(rd) << ", " << XRegName(rs1); in Print32BinOpImm()
729 os_ << "seqz " << XRegName(rd) << ", " << XRegName(rs1); in Print32BinOpImm()
731 os_ << "slli.uw " << XRegName(rd) << ", " << XRegName(rs1) << ", " << (imm & 0x3fu); in Print32BinOpImm()
735 << XRegName(rd) << ", " << XRegName(rs1); in Print32BinOpImm()
738 << XRegName(rd) << ", " << XRegName(rs1) << ", " << (imm ^ 0x600u); in Print32BinOpImm()
740 os_ << "orc.b " << XRegName(rd) << ", " << XRegName(rs1); in Print32BinOpImm()
742 os_ << "rev8 " << XRegName(rd) << ", " << XRegName(rs1); in Print32BinOpImm()
764 os_ << (narrow ? "w " : " ") << XRegName(rd) << ", " << XRegName(rs1) << ", " << imm; in Print32BinOpImm()
776 uint32_t rs1 = GetRs1(insn32); in Print32BinOp() local
781 if (high_bits == 0x40000000u && funct3 == /*SUB*/ 0u && rs1 == Zero) { in Print32BinOp()
784 os_ << "sltz " << XRegName(rd) << ", " << XRegName(rs1); in Print32BinOp()
785 } else if (!narrow && funct3 == /*SLT*/ 2u && rs1 == Zero) { in Print32BinOp()
787 } else if (!narrow && funct3 == /*SLTU*/ 3u && rs1 == Zero) { in Print32BinOp()
790 os_ << "zext.w " << XRegName(rd) << ", " << XRegName(rs1); in Print32BinOp()
828 os_ << (narrow ? "w " : " ") << XRegName(rd) << ", " << XRegName(rs1) << ", " << XRegName(rs2); in Print32BinOp()
853 uint32_t rs1 = GetRs1(insn32); in Print32Atomic() local
858 os_ << opcode << type << aq << rl << " " << XRegName(rd) << ", " << XRegName(rs1); in Print32Atomic()
871 uint32_t rs1 = GetRs1(insn32); in Print32FpOp() local
887 << FRegName(rd) << ", " << FRegName(rs1) << ", " << FRegName(rs2); in Print32FpOp()
894 if (rs1 == rs2) { in Print32FpOp()
897 os_ << kAltOpcodes[rm] << type << " " << FRegName(rd) << ", " << FRegName(rs1); in Print32FpOp()
900 << FRegName(rd) << ", " << FRegName(rs1) << ", " << FRegName(rs2); in Print32FpOp()
910 << FRegName(rd) << ", " << FRegName(rs1) << ", " << FRegName(rs2); in Print32FpOp()
918 << FRegName(rd) << ", " << FRegName(rs1); in Print32FpOp()
924 << FRegName(rd) << ", " << FRegName(rs1); in Print32FpOp()
932 << XRegName(rd) << ", " << FRegName(rs1) << ", " << FRegName(rs2); in Print32FpOp()
941 << XRegName(rd) << ", " << FRegName(rs1); in Print32FpOp()
950 << FRegName(rd) << ", " << XRegName(rs1); in Print32FpOp()
958 << XRegName(rd) << ", " << FRegName(rs1); in Print32FpOp()
961 os_ << "fclass" << type << " " << XRegName(rd) << ", " << FRegName(rs1); in Print32FpOp()
968 << FRegName(rd) << ", " << XRegName(rs1); in Print32FpOp()
1015 /*inout*/ const char*& rs1, in MaybeSwapOperands() argument
1018 std::swap(rs1, rs2); in MaybeSwapOperands()
1032 const char* rs1 = nullptr; in Print32RVVOp() local
1073 rs1 = VRegName(GetRs1(insn32)); in Print32RVVOp()
1113 rs1 = XRegName(GetRs1(insn32)); in Print32RVVOp()
1237 rs1 = VRegName(GetRs1(insn32)); in Print32RVVOp()
1247 MaybeSwapOperands(funct6, rs1, rs2); in Print32RVVOp()
1259 rs1 = XRegName(GetRs1(insn32)); in Print32RVVOp()
1283 rs1 = XRegName(GetRs1(insn32)); in Print32RVVOp()
1286 MaybeSwapOperands(funct6, rs1, rs2); in Print32RVVOp()
1354 rs1 = VRegName(GetRs1(insn32)); in Print32RVVOp()
1357 MaybeSwapOperands(funct6, rs1, rs2); in Print32RVVOp()
1369 rs1 = FRegName(GetRs1(insn32)); in Print32RVVOp()
1409 rs1 = FRegName(GetRs1(insn32)); in Print32RVVOp()
1411 MaybeSwapOperands(funct6, rs1, rs2); in Print32RVVOp()
1454 if (rs1 != nullptr) { in Print32RVVOp()
1455 os_ << ", " << rs1; in Print32RVVOp()