Lines Matching refs:ins

80   DexInstructionIterator ins(instruction, /*dex_pc=*/ 0u);  in TEST()  local
81 ASSERT_EQ(4u, ins->SizeInCodeUnits()); in TEST()
83 ASSERT_TRUE(ins->HasVRegA()); in TEST()
84 ASSERT_EQ(4, ins->VRegA()); in TEST()
85 ASSERT_EQ(4u, ins->VRegA_45cc()); in TEST()
86 ASSERT_EQ(4u, ins->VRegA_45cc(instruction[0])); in TEST()
88 ASSERT_TRUE(ins->HasVRegB()); in TEST()
89 ASSERT_EQ(16, ins->VRegB()); in TEST()
90 ASSERT_EQ(16u, ins->VRegB_45cc()); in TEST()
92 ASSERT_TRUE(ins->HasVRegC()); in TEST()
93 ASSERT_EQ(0xe, ins->VRegC()); in TEST()
94 ASSERT_EQ(0xe, ins->VRegC_45cc()); in TEST()
96 ASSERT_TRUE(ins->HasVRegH()); in TEST()
97 ASSERT_EQ(32, ins->VRegH()); in TEST()
98 ASSERT_EQ(32, ins->VRegH_45cc()); in TEST()
100 ASSERT_TRUE(ins->HasVarArgs()); in TEST()
103 ins->GetVarArgs(arg_regs); in TEST()
118 DexInstructionIterator ins(instruction, /*dex_pc=*/ 0u); in TEST() local
119 ASSERT_EQ(4u, ins->SizeInCodeUnits()); in TEST()
121 ASSERT_TRUE(ins->HasVRegA()); in TEST()
122 ASSERT_EQ(4, ins->VRegA()); in TEST()
123 ASSERT_EQ(4u, ins->VRegA_4rcc()); in TEST()
124 ASSERT_EQ(4u, ins->VRegA_4rcc(instruction[0])); in TEST()
126 ASSERT_TRUE(ins->HasVRegB()); in TEST()
127 ASSERT_EQ(16, ins->VRegB()); in TEST()
128 ASSERT_EQ(16u, ins->VRegB_4rcc()); in TEST()
130 ASSERT_TRUE(ins->HasVRegC()); in TEST()
131 ASSERT_EQ(0xcafe, ins->VRegC()); in TEST()
132 ASSERT_EQ(0xcafe, ins->VRegC_4rcc()); in TEST()
134 ASSERT_TRUE(ins->HasVRegH()); in TEST()
135 ASSERT_EQ(32, ins->VRegH()); in TEST()
136 ASSERT_EQ(32, ins->VRegH_4rcc()); in TEST()
138 ASSERT_FALSE(ins->HasVarArgs()); in TEST()