#PLATFORM_NAME gChip #SINGLE_API_VER 1.2.1 #EXPORT_FLAG HEADSET #PARAM_MODE FULL #SAVE_MODE 3 #SAVE_TIME 2023-08-15 16:00:35 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x2F68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7646 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7CCC //TX_THR_PITCH_DET_0 131 0x7000 //TX_THR_PITCH_DET_1 132 0x6333 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0010 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x4000 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x2900 //TX_MIN_EQ_RE_EST_0 153 0x1000 //TX_MIN_EQ_RE_EST_1 154 0x1000 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x0064 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x5000 //TX_DTD_THR1_0 198 0x7000 //TX_DTD_THR1_1 199 0x7F00 //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x2000 //TX_DTD_THR2_0 205 0x2000 //TX_DTD_THR2_1 206 0x2000 //TX_DTD_THR2_2 207 0x2000 //TX_DTD_THR2_3 208 0x2000 //TX_DTD_THR2_4 209 0x2000 //TX_DTD_THR2_5 210 0x2000 //TX_DTD_THR2_6 211 0x4100 //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0BB8 //TX_DT_CUT_K 214 0x2000 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0010 //TX_EPD_OFFSET_00 233 0x0010 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xFD00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xFA00 //TX_THR_SN_EST_6 249 0xFA00 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0000 //TX_DELTA_THR_SN_EST_1 252 0x0400 //TX_DELTA_THR_SN_EST_2 253 0x0000 //TX_DELTA_THR_SN_EST_3 254 0x0000 //TX_DELTA_THR_SN_EST_4 255 0x0000 //TX_DELTA_THR_SN_EST_5 256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0000 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x0400 //TX_B_POST_FLT_0 280 0x0400 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 284 0x0014 //TX_NS_LVL_CTRL_3 285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000D //TX_MIN_GAIN_S_0 290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 293 0x000D //TX_MIN_GAIN_S_4 294 0x000D //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x000D //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x5000 //TX_SNRI_SUP_1 302 0x5000 //TX_SNRI_SUP_2 303 0x6000 //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0014 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x1000 //TX_A_POST_FILT_S_1 316 0x7000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x7FFF //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 341 0x6000 //TX_LAMBDA_PFILT_S_2 342 0x7C29 //TX_LAMBDA_PFILT_S_3 343 0x7C29 //TX_LAMBDA_PFILT_S_4 344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x0FA0 //TX_K_PEPPER_HF 350 0x0400 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x4000 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x003B //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x0900 //TX_NOISE_TH_1 371 0x0033 //TX_NOISE_TH_2 372 0x36B0 //TX_NOISE_TH_3 373 0x0231 //TX_NOISE_TH_4 374 0x68DE //TX_NOISE_TH_5 375 0x5784 //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x00C8 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY 387 0x0029 //TX_OUT_ENER_TH_NOISE 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0280 //TX_N_HOLD_HS 416 0x006E //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0333 //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2400 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x2000 //TX_WTA_EN_RTO_TH 429 0x1400 //TX_TOP_ENER_TH_F 430 0x0064 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x003C //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x0D9A //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x2A3D //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x0000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x443C //TX_FDEQ_GAIN_5 573 0x2A30 //TX_FDEQ_GAIN_6 574 0x2C2C //TX_FDEQ_GAIN_7 575 0x2820 //TX_FDEQ_GAIN_8 576 0x2024 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0010 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0608 //TX_PREEQ_BIN_MIC0_0 642 0x0808 //TX_PREEQ_BIN_MIC0_1 643 0x0808 //TX_PREEQ_BIN_MIC0_2 644 0x0808 //TX_PREEQ_BIN_MIC0_3 645 0x0808 //TX_PREEQ_BIN_MIC0_4 646 0x0808 //TX_PREEQ_BIN_MIC0_5 647 0x0808 //TX_PREEQ_BIN_MIC0_6 648 0x0802 //TX_PREEQ_BIN_MIC0_7 649 0x0000 //TX_PREEQ_BIN_MIC0_8 650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0010 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0608 //TX_PREEQ_BIN_MIC1_0 691 0x0808 //TX_PREEQ_BIN_MIC1_1 692 0x0808 //TX_PREEQ_BIN_MIC1_2 693 0x0808 //TX_PREEQ_BIN_MIC1_3 694 0x0808 //TX_PREEQ_BIN_MIC1_4 695 0x0808 //TX_PREEQ_BIN_MIC1_5 696 0x0808 //TX_PREEQ_BIN_MIC1_6 697 0x0802 //TX_PREEQ_BIN_MIC1_7 698 0x0000 //TX_PREEQ_BIN_MIC1_8 699 0x0000 //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0010 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0608 //TX_PREEQ_BIN_MIC2_0 740 0x0808 //TX_PREEQ_BIN_MIC2_1 741 0x0808 //TX_PREEQ_BIN_MIC2_2 742 0x0808 //TX_PREEQ_BIN_MIC2_3 743 0x0808 //TX_PREEQ_BIN_MIC2_4 744 0x0808 //TX_PREEQ_BIN_MIC2_5 745 0x0808 //TX_PREEQ_BIN_MIC2_6 746 0x0802 //TX_PREEQ_BIN_MIC2_7 747 0x0000 //TX_PREEQ_BIN_MIC2_8 748 0x0000 //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0065 //TX_MIC_CALIBRATION_0 766 0x0065 //TX_MIC_CALIBRATION_1 767 0x0065 //TX_MIC_CALIBRATION_2 768 0x0065 //TX_MIC_CALIBRATION_3 769 0x0044 //TX_MIC_PWR_BIAS_0 770 0x0044 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0007 //TX_GAIN_LIMIT_2 776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x1000 //TX_TDDRC_ALPHA_UP_01 784 0x1000 //TX_TDDRC_ALPHA_UP_02 785 0x1000 //TX_TDDRC_ALPHA_UP_03 786 0x1000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0001 //TX_FILTINDX 854 0x0002 //TX_TDDRC_THRD_0 855 0x0008 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x1000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x0700 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0xF800 //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0xA43C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x3800 //RX_THR_PITCH_DET_0 14 0x3000 //RX_THR_PITCH_DET_1 15 0x2800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4748 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0211 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x280A //RX_TPKA_FP 127 0x032D //RX_MIN_G_FP 128 0x0A00 //RX_MAX_G_FP 129 0x0009 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0211 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0211 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0010 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0211 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x001A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0211 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x002C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0211 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0049 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0211 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x007C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0211 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4040 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0xA43C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x3800 //RX_THR_PITCH_DET_0 171 0x3000 //RX_THR_PITCH_DET_1 172 0x2800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0211 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x280A //RX_TPKA_FP 284 0x032D //RX_MIN_G_FP 285 0x0A00 //RX_MAX_G_FP 286 0x0009 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0211 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0009 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0211 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000A //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0211 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x001A //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0211 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x002C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0211 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0049 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0211 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x007C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0211 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4040 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x2F68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7D83 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x6800 //TX_THR_PITCH_DET_0 131 0x6000 //TX_THR_PITCH_DET_1 132 0x5800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0080 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x36B0 //TX_EAD_THR 151 0x0800 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x6000 //TX_C_POST_FLT 168 0x7000 //TX_GAIN_NP 169 0x0064 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7D00 //TX_DTD_THR1_0 198 0x7D00 //TX_DTD_THR1_1 199 0x7D00 //TX_DTD_THR1_2 200 0x7D00 //TX_DTD_THR1_3 201 0x7D00 //TX_DTD_THR1_4 202 0x7D00 //TX_DTD_THR1_5 203 0x7D00 //TX_DTD_THR1_6 204 0x4000 //TX_DTD_THR2_0 205 0x1000 //TX_DTD_THR2_1 206 0x1000 //TX_DTD_THR2_2 207 0x1000 //TX_DTD_THR2_3 208 0x1000 //TX_DTD_THR2_4 209 0x1000 //TX_DTD_THR2_5 210 0x1000 //TX_DTD_THR2_6 211 0x1000 //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x1B58 //TX_DT_CUT_K 214 0x1000 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x0019 //TX_EPD_OFFSET_00 233 0x0019 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xF700 //TX_THR_SN_EST_2 245 0xFC00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xF400 //TX_THR_SN_EST_5 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x001C //TX_NS_LVL_CTRL_2 284 0x0012 //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x0018 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000F //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x0009 //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x6000 //TX_SNRI_SUP_1 302 0x2000 //TX_SNRI_SUP_2 303 0x6000 //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x000E //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x3000 //TX_B_POST_FILT_2 325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x1000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7B00 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0800 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x0900 //TX_NOISE_TH_1 371 0x009B //TX_NOISE_TH_2 372 0x4149 //TX_NOISE_TH_3 373 0x0331 //TX_NOISE_TH_4 374 0x542C //TX_NOISE_TH_5 375 0x55E5 //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00FB //TX_NOISE_TH_6 379 0x00F8 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x001C //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4849 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4140 //TX_FDEQ_GAIN_5 573 0x3838 //TX_FDEQ_GAIN_6 574 0x3839 //TX_FDEQ_GAIN_7 575 0x3830 //TX_FDEQ_GAIN_8 576 0x3033 //TX_FDEQ_GAIN_9 577 0x2E2E //TX_FDEQ_GAIN_10 578 0x2A2A //TX_FDEQ_GAIN_11 579 0x2A32 //TX_FDEQ_GAIN_12 580 0x3838 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x0E0F //TX_FDEQ_BIN_10 602 0x0F10 //TX_FDEQ_BIN_11 603 0x1011 //TX_FDEQ_BIN_12 604 0x1112 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0608 //TX_PREEQ_BIN_MIC0_0 642 0x0808 //TX_PREEQ_BIN_MIC0_1 643 0x0808 //TX_PREEQ_BIN_MIC0_2 644 0x0808 //TX_PREEQ_BIN_MIC0_3 645 0x0808 //TX_PREEQ_BIN_MIC0_4 646 0x0808 //TX_PREEQ_BIN_MIC0_5 647 0x0808 //TX_PREEQ_BIN_MIC0_6 648 0x0808 //TX_PREEQ_BIN_MIC0_7 649 0x0808 //TX_PREEQ_BIN_MIC0_8 650 0x0808 //TX_PREEQ_BIN_MIC0_9 651 0x0808 //TX_PREEQ_BIN_MIC0_10 652 0x0808 //TX_PREEQ_BIN_MIC0_11 653 0x0808 //TX_PREEQ_BIN_MIC0_12 654 0x0808 //TX_PREEQ_BIN_MIC0_13 655 0x0808 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0608 //TX_PREEQ_BIN_MIC1_0 691 0x0808 //TX_PREEQ_BIN_MIC1_1 692 0x0808 //TX_PREEQ_BIN_MIC1_2 693 0x0808 //TX_PREEQ_BIN_MIC1_3 694 0x0808 //TX_PREEQ_BIN_MIC1_4 695 0x0808 //TX_PREEQ_BIN_MIC1_5 696 0x0808 //TX_PREEQ_BIN_MIC1_6 697 0x0808 //TX_PREEQ_BIN_MIC1_7 698 0x0808 //TX_PREEQ_BIN_MIC1_8 699 0x0808 //TX_PREEQ_BIN_MIC1_9 700 0x0808 //TX_PREEQ_BIN_MIC1_10 701 0x0808 //TX_PREEQ_BIN_MIC1_11 702 0x0808 //TX_PREEQ_BIN_MIC1_12 703 0x0808 //TX_PREEQ_BIN_MIC1_13 704 0x0808 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0608 //TX_PREEQ_BIN_MIC2_0 740 0x0808 //TX_PREEQ_BIN_MIC2_1 741 0x0808 //TX_PREEQ_BIN_MIC2_2 742 0x0808 //TX_PREEQ_BIN_MIC2_3 743 0x0808 //TX_PREEQ_BIN_MIC2_4 744 0x0808 //TX_PREEQ_BIN_MIC2_5 745 0x0808 //TX_PREEQ_BIN_MIC2_6 746 0x0808 //TX_PREEQ_BIN_MIC2_7 747 0x0808 //TX_PREEQ_BIN_MIC2_8 748 0x0808 //TX_PREEQ_BIN_MIC2_9 749 0x0808 //TX_PREEQ_BIN_MIC2_10 750 0x0808 //TX_PREEQ_BIN_MIC2_11 751 0x0808 //TX_PREEQ_BIN_MIC2_12 752 0x0808 //TX_PREEQ_BIN_MIC2_13 753 0x0808 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0062 //TX_MIC_CALIBRATION_0 766 0x0062 //TX_MIC_CALIBRATION_1 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0048 //TX_MIC_PWR_BIAS_2 772 0x0048 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0003 //TX_GAIN_LIMIT_2 776 0x0003 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x1000 //TX_TDDRC_ALPHA_UP_01 784 0x1000 //TX_TDDRC_ALPHA_UP_02 785 0x1000 //TX_TDDRC_ALPHA_UP_03 786 0x1000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0001 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x1000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x0700 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xCCCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0xA43C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x3800 //RX_THR_PITCH_DET_0 14 0x3000 //RX_THR_PITCH_DET_1 15 0x2800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 51 0x3F40 //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1C00 //RX_TDDRC_THRD_2 115 0x1D00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01AE //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x280A //RX_TPKA_FP 127 0x032D //RX_MIN_G_FP 128 0x0A00 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01A0 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4444 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 51 0x3F3F //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01A0 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4444 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 51 0x3F3F //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01A0 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4444 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 51 0x3F3F //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x001E //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01A0 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4444 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 51 0x3F3F //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0031 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01A0 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4444 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 51 0x3F3F //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0052 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01A0 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4444 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 51 0x3F3F //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x008B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01A0 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x484B //RX_FDEQ_GAIN_6 46 0x4B48 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4444 //RX_FDEQ_GAIN_9 49 0x4846 //RX_FDEQ_GAIN_10 50 0x403F //RX_FDEQ_GAIN_11 51 0x3F3F //RX_FDEQ_GAIN_12 52 0x4248 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0xA43C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0001 //RX_SAMPLINGFREQ_SIG 160 0x0001 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x4000 //RX_B_PE 170 0x3800 //RX_THR_PITCH_DET_0 171 0x3000 //RX_THR_PITCH_DET_1 172 0x2800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 208 0x3F40 //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1C00 //RX_TDDRC_THRD_2 272 0x1D00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01AE //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x280A //RX_TPKA_FP 284 0x032D //RX_MIN_G_FP 285 0x0A00 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01A0 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4444 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 208 0x3F3F //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000A //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01A0 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4444 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 208 0x3F3F //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01A0 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4444 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 208 0x3F3F //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x001E //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01A0 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4444 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 208 0x3F3F //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0031 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01A0 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4444 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 208 0x3F3F //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0052 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01A0 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4444 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 208 0x3F3F //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x008B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01A0 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x484B //RX_FDEQ_GAIN_6 203 0x4B48 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4444 //RX_FDEQ_GAIN_9 206 0x4846 //RX_FDEQ_GAIN_10 207 0x403F //RX_FDEQ_GAIN_11 208 0x3F3F //RX_FDEQ_GAIN_12 209 0x4248 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x6F68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7EFF //TX_A_HP 129 0x4000 //TX_B_PE 130 0x1800 //TX_THR_PITCH_DET_0 131 0x1000 //TX_THR_PITCH_DET_1 132 0x0800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0080 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x6D60 //TX_EAD_THR 151 0x0800 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x6000 //TX_C_POST_FLT 168 0x7000 //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x6590 //TX_DTD_THR1_0 198 0x7D00 //TX_DTD_THR1_1 199 0x6590 //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0BB8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x00F0 //TX_EPD_OFFSET_00 233 0x00F0 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xF700 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xF400 //TX_THR_SN_EST_5 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0018 //TX_NS_LVL_CTRL_2 284 0x0012 //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x001C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000F //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x0009 //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x6000 //TX_SNRI_SUP_1 302 0x5000 //TX_SNRI_SUP_2 303 0x6000 //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x3000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x000E //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x3000 //TX_B_POST_FILT_2 325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x1000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7000 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0800 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x00FA //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 371 0x00C8 //TX_NOISE_TH_2 372 0x2904 //TX_NOISE_TH_3 373 0x07D0 //TX_NOISE_TH_4 374 0x157C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x044C //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x0064 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4040 //TX_FDEQ_GAIN_6 574 0x4040 //TX_FDEQ_GAIN_7 575 0x4040 //TX_FDEQ_GAIN_8 576 0x3838 //TX_FDEQ_GAIN_9 577 0x3838 //TX_FDEQ_GAIN_10 578 0x3828 //TX_FDEQ_GAIN_11 579 0x2828 //TX_FDEQ_GAIN_12 580 0x2828 //TX_FDEQ_GAIN_13 581 0x1C1C //TX_FDEQ_GAIN_14 582 0x1C1C //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x1013 //TX_FDEQ_BIN_10 602 0x1719 //TX_FDEQ_BIN_11 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 606 0x284A //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0E10 //TX_PREEQ_BIN_MIC0_0 642 0x1010 //TX_PREEQ_BIN_MIC0_1 643 0x1010 //TX_PREEQ_BIN_MIC0_2 644 0x1010 //TX_PREEQ_BIN_MIC0_3 645 0x1010 //TX_PREEQ_BIN_MIC0_4 646 0x1010 //TX_PREEQ_BIN_MIC0_5 647 0x1010 //TX_PREEQ_BIN_MIC0_6 648 0x1010 //TX_PREEQ_BIN_MIC0_7 649 0x1010 //TX_PREEQ_BIN_MIC0_8 650 0x1010 //TX_PREEQ_BIN_MIC0_9 651 0x1010 //TX_PREEQ_BIN_MIC0_10 652 0x1010 //TX_PREEQ_BIN_MIC0_11 653 0x1010 //TX_PREEQ_BIN_MIC0_12 654 0x1010 //TX_PREEQ_BIN_MIC0_13 655 0x1010 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0E10 //TX_PREEQ_BIN_MIC1_0 691 0x1010 //TX_PREEQ_BIN_MIC1_1 692 0x1010 //TX_PREEQ_BIN_MIC1_2 693 0x1010 //TX_PREEQ_BIN_MIC1_3 694 0x1010 //TX_PREEQ_BIN_MIC1_4 695 0x1010 //TX_PREEQ_BIN_MIC1_5 696 0x1010 //TX_PREEQ_BIN_MIC1_6 697 0x1010 //TX_PREEQ_BIN_MIC1_7 698 0x1010 //TX_PREEQ_BIN_MIC1_8 699 0x1010 //TX_PREEQ_BIN_MIC1_9 700 0x1010 //TX_PREEQ_BIN_MIC1_10 701 0x1010 //TX_PREEQ_BIN_MIC1_11 702 0x1010 //TX_PREEQ_BIN_MIC1_12 703 0x1010 //TX_PREEQ_BIN_MIC1_13 704 0x1010 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0E10 //TX_PREEQ_BIN_MIC2_0 740 0x1010 //TX_PREEQ_BIN_MIC2_1 741 0x1010 //TX_PREEQ_BIN_MIC2_2 742 0x1010 //TX_PREEQ_BIN_MIC2_3 743 0x1010 //TX_PREEQ_BIN_MIC2_4 744 0x1010 //TX_PREEQ_BIN_MIC2_5 745 0x1010 //TX_PREEQ_BIN_MIC2_6 746 0x1010 //TX_PREEQ_BIN_MIC2_7 747 0x1010 //TX_PREEQ_BIN_MIC2_8 748 0x1010 //TX_PREEQ_BIN_MIC2_9 749 0x1010 //TX_PREEQ_BIN_MIC2_10 750 0x1010 //TX_PREEQ_BIN_MIC2_11 751 0x1010 //TX_PREEQ_BIN_MIC2_12 752 0x1010 //TX_PREEQ_BIN_MIC2_13 753 0x1010 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0062 //TX_MIC_CALIBRATION_0 766 0x0062 //TX_MIC_CALIBRATION_1 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0050 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0002 //TX_GAIN_LIMIT_1 775 0x0000 //TX_GAIN_LIMIT_2 776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0000 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0020 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x07F2 //TX_TDDRC_DRC_GAIN 867 0x78D6 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x243C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x1800 //RX_THR_PITCH_DET_0 14 0x1000 //RX_THR_PITCH_DET_1 15 0x0800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0003 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4E52 //RX_FDEQ_GAIN_0 40 0x5252 //RX_FDEQ_GAIN_1 41 0x5252 //RX_FDEQ_GAIN_2 42 0x5250 //RX_FDEQ_GAIN_3 43 0x4C46 //RX_FDEQ_GAIN_4 44 0x4748 //RX_FDEQ_GAIN_5 45 0x5768 //RX_FDEQ_GAIN_6 46 0x6162 //RX_FDEQ_GAIN_7 47 0x5252 //RX_FDEQ_GAIN_8 48 0x5256 //RX_FDEQ_GAIN_9 49 0x5248 //RX_FDEQ_GAIN_10 50 0x3434 //RX_FDEQ_GAIN_11 51 0x3436 //RX_FDEQ_GAIN_12 52 0x2A18 //RX_FDEQ_GAIN_13 53 0x1830 //RX_FDEQ_GAIN_14 54 0x3648 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x023E //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x0D90 //RX_TPKA_FP 127 0x032D //RX_MIN_G_FP 128 0x0A00 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 41 0x7270 //RX_FDEQ_GAIN_2 42 0x6A70 //RX_FDEQ_GAIN_3 43 0x645A //RX_FDEQ_GAIN_4 44 0x5A5E //RX_FDEQ_GAIN_5 45 0x6E72 //RX_FDEQ_GAIN_6 46 0x7268 //RX_FDEQ_GAIN_7 47 0x665A //RX_FDEQ_GAIN_8 48 0x5A5A //RX_FDEQ_GAIN_9 49 0x5A64 //RX_FDEQ_GAIN_10 50 0x6448 //RX_FDEQ_GAIN_11 51 0x4949 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 41 0x7270 //RX_FDEQ_GAIN_2 42 0x6A70 //RX_FDEQ_GAIN_3 43 0x645A //RX_FDEQ_GAIN_4 44 0x5A5E //RX_FDEQ_GAIN_5 45 0x6E72 //RX_FDEQ_GAIN_6 46 0x7268 //RX_FDEQ_GAIN_7 47 0x665A //RX_FDEQ_GAIN_8 48 0x5A5A //RX_FDEQ_GAIN_9 49 0x5A64 //RX_FDEQ_GAIN_10 50 0x6448 //RX_FDEQ_GAIN_11 51 0x4949 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0011 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 41 0x7270 //RX_FDEQ_GAIN_2 42 0x6A70 //RX_FDEQ_GAIN_3 43 0x645A //RX_FDEQ_GAIN_4 44 0x5A5E //RX_FDEQ_GAIN_5 45 0x6E72 //RX_FDEQ_GAIN_6 46 0x7268 //RX_FDEQ_GAIN_7 47 0x665A //RX_FDEQ_GAIN_8 48 0x5A5A //RX_FDEQ_GAIN_9 49 0x5A64 //RX_FDEQ_GAIN_10 50 0x6448 //RX_FDEQ_GAIN_11 51 0x4949 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x001D //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 41 0x7270 //RX_FDEQ_GAIN_2 42 0x6A70 //RX_FDEQ_GAIN_3 43 0x645A //RX_FDEQ_GAIN_4 44 0x5A5E //RX_FDEQ_GAIN_5 45 0x6E72 //RX_FDEQ_GAIN_6 46 0x7268 //RX_FDEQ_GAIN_7 47 0x665A //RX_FDEQ_GAIN_8 48 0x5A5A //RX_FDEQ_GAIN_9 49 0x5A64 //RX_FDEQ_GAIN_10 50 0x6448 //RX_FDEQ_GAIN_11 51 0x4949 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0030 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 41 0x7270 //RX_FDEQ_GAIN_2 42 0x6A70 //RX_FDEQ_GAIN_3 43 0x645A //RX_FDEQ_GAIN_4 44 0x5A5E //RX_FDEQ_GAIN_5 45 0x6E72 //RX_FDEQ_GAIN_6 46 0x7268 //RX_FDEQ_GAIN_7 47 0x665A //RX_FDEQ_GAIN_8 48 0x5A5A //RX_FDEQ_GAIN_9 49 0x5A64 //RX_FDEQ_GAIN_10 50 0x6448 //RX_FDEQ_GAIN_11 51 0x4949 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0050 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 41 0x7270 //RX_FDEQ_GAIN_2 42 0x6A70 //RX_FDEQ_GAIN_3 43 0x645A //RX_FDEQ_GAIN_4 44 0x5A5E //RX_FDEQ_GAIN_5 45 0x6E72 //RX_FDEQ_GAIN_6 46 0x7268 //RX_FDEQ_GAIN_7 47 0x665A //RX_FDEQ_GAIN_8 48 0x5A5A //RX_FDEQ_GAIN_9 49 0x5A64 //RX_FDEQ_GAIN_10 50 0x6448 //RX_FDEQ_GAIN_11 51 0x4949 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0089 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 41 0x7270 //RX_FDEQ_GAIN_2 42 0x6A70 //RX_FDEQ_GAIN_3 43 0x645A //RX_FDEQ_GAIN_4 44 0x5A5E //RX_FDEQ_GAIN_5 45 0x6E72 //RX_FDEQ_GAIN_6 46 0x7268 //RX_FDEQ_GAIN_7 47 0x665A //RX_FDEQ_GAIN_8 48 0x5A5A //RX_FDEQ_GAIN_9 49 0x5A64 //RX_FDEQ_GAIN_10 50 0x6448 //RX_FDEQ_GAIN_11 51 0x4949 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x043C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x1800 //RX_THR_PITCH_DET_0 171 0x1000 //RX_THR_PITCH_DET_1 172 0x0800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0003 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4E52 //RX_FDEQ_GAIN_0 197 0x5252 //RX_FDEQ_GAIN_1 198 0x5252 //RX_FDEQ_GAIN_2 199 0x5250 //RX_FDEQ_GAIN_3 200 0x4C46 //RX_FDEQ_GAIN_4 201 0x4748 //RX_FDEQ_GAIN_5 202 0x5768 //RX_FDEQ_GAIN_6 203 0x6162 //RX_FDEQ_GAIN_7 204 0x5252 //RX_FDEQ_GAIN_8 205 0x5256 //RX_FDEQ_GAIN_9 206 0x5248 //RX_FDEQ_GAIN_10 207 0x3434 //RX_FDEQ_GAIN_11 208 0x3436 //RX_FDEQ_GAIN_12 209 0x2A18 //RX_FDEQ_GAIN_13 210 0x1830 //RX_FDEQ_GAIN_14 211 0x3648 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x023E //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x0D90 //RX_TPKA_FP 284 0x032D //RX_MIN_G_FP 285 0x0A00 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 198 0x7270 //RX_FDEQ_GAIN_2 199 0x6A70 //RX_FDEQ_GAIN_3 200 0x645A //RX_FDEQ_GAIN_4 201 0x5A5E //RX_FDEQ_GAIN_5 202 0x6E72 //RX_FDEQ_GAIN_6 203 0x7268 //RX_FDEQ_GAIN_7 204 0x665A //RX_FDEQ_GAIN_8 205 0x5A5A //RX_FDEQ_GAIN_9 206 0x5A64 //RX_FDEQ_GAIN_10 207 0x6448 //RX_FDEQ_GAIN_11 208 0x4949 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000A //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 198 0x7270 //RX_FDEQ_GAIN_2 199 0x6A70 //RX_FDEQ_GAIN_3 200 0x645A //RX_FDEQ_GAIN_4 201 0x5A5E //RX_FDEQ_GAIN_5 202 0x6E72 //RX_FDEQ_GAIN_6 203 0x7268 //RX_FDEQ_GAIN_7 204 0x665A //RX_FDEQ_GAIN_8 205 0x5A5A //RX_FDEQ_GAIN_9 206 0x5A64 //RX_FDEQ_GAIN_10 207 0x6448 //RX_FDEQ_GAIN_11 208 0x4949 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0011 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 198 0x7270 //RX_FDEQ_GAIN_2 199 0x6A70 //RX_FDEQ_GAIN_3 200 0x645A //RX_FDEQ_GAIN_4 201 0x5A5E //RX_FDEQ_GAIN_5 202 0x6E72 //RX_FDEQ_GAIN_6 203 0x7268 //RX_FDEQ_GAIN_7 204 0x665A //RX_FDEQ_GAIN_8 205 0x5A5A //RX_FDEQ_GAIN_9 206 0x5A64 //RX_FDEQ_GAIN_10 207 0x6448 //RX_FDEQ_GAIN_11 208 0x4949 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x001D //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 198 0x7270 //RX_FDEQ_GAIN_2 199 0x6A70 //RX_FDEQ_GAIN_3 200 0x645A //RX_FDEQ_GAIN_4 201 0x5A5E //RX_FDEQ_GAIN_5 202 0x6E72 //RX_FDEQ_GAIN_6 203 0x7268 //RX_FDEQ_GAIN_7 204 0x665A //RX_FDEQ_GAIN_8 205 0x5A5A //RX_FDEQ_GAIN_9 206 0x5A64 //RX_FDEQ_GAIN_10 207 0x6448 //RX_FDEQ_GAIN_11 208 0x4949 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0030 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 198 0x7270 //RX_FDEQ_GAIN_2 199 0x6A70 //RX_FDEQ_GAIN_3 200 0x645A //RX_FDEQ_GAIN_4 201 0x5A5E //RX_FDEQ_GAIN_5 202 0x6E72 //RX_FDEQ_GAIN_6 203 0x7268 //RX_FDEQ_GAIN_7 204 0x665A //RX_FDEQ_GAIN_8 205 0x5A5A //RX_FDEQ_GAIN_9 206 0x5A64 //RX_FDEQ_GAIN_10 207 0x6448 //RX_FDEQ_GAIN_11 208 0x4949 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0050 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 198 0x7270 //RX_FDEQ_GAIN_2 199 0x6A70 //RX_FDEQ_GAIN_3 200 0x645A //RX_FDEQ_GAIN_4 201 0x5A5E //RX_FDEQ_GAIN_5 202 0x6E72 //RX_FDEQ_GAIN_6 203 0x7268 //RX_FDEQ_GAIN_7 204 0x665A //RX_FDEQ_GAIN_8 205 0x5A5A //RX_FDEQ_GAIN_9 206 0x5A64 //RX_FDEQ_GAIN_10 207 0x6448 //RX_FDEQ_GAIN_11 208 0x4949 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0089 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 198 0x7270 //RX_FDEQ_GAIN_2 199 0x6A70 //RX_FDEQ_GAIN_3 200 0x645A //RX_FDEQ_GAIN_4 201 0x5A5E //RX_FDEQ_GAIN_5 202 0x6E72 //RX_FDEQ_GAIN_6 203 0x7268 //RX_FDEQ_GAIN_7 204 0x665A //RX_FDEQ_GAIN_8 205 0x5A5A //RX_FDEQ_GAIN_9 206 0x5A64 //RX_FDEQ_GAIN_10 207 0x6448 //RX_FDEQ_GAIN_11 208 0x4949 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 2 0x0020 //TX_PATCH_REG 3 0x6B6A //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B4C //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7E56 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x6800 //TX_THR_PITCH_DET_0 131 0x6000 //TX_THR_PITCH_DET_1 132 0x5800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0200 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x61A8 //TX_EAD_THR 151 0x0400 //TX_THR_RE_EST 152 0x3000 //TX_MIN_EQ_RE_EST_0 153 0x3000 //TX_MIN_EQ_RE_EST_1 154 0x4000 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x6000 //TX_MIN_EQ_RE_EST_6 159 0x6000 //TX_MIN_EQ_RE_EST_7 160 0x6000 //TX_MIN_EQ_RE_EST_8 161 0x6000 //TX_MIN_EQ_RE_EST_9 162 0x4000 //TX_MIN_EQ_RE_EST_10 163 0x4000 //TX_MIN_EQ_RE_EST_11 164 0x4000 //TX_MIN_EQ_RE_EST_12 165 0x3000 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x3000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x0800 //TX_DTD_THR1_0 198 0x0800 //TX_DTD_THR1_1 199 0x0800 //TX_DTD_THR1_2 200 0x0800 //TX_DTD_THR1_3 201 0x0800 //TX_DTD_THR1_4 202 0x0800 //TX_DTD_THR1_5 203 0x0800 //TX_DTD_THR1_6 204 0x0800 //TX_DTD_THR2_0 205 0x0800 //TX_DTD_THR2_1 206 0x0800 //TX_DTD_THR2_2 207 0x0800 //TX_DTD_THR2_3 208 0x0800 //TX_DTD_THR2_4 209 0x0100 //TX_DTD_THR2_5 210 0x0100 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x03E8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x00C0 //TX_EPD_OFFSET_00 233 0x00C0 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF700 //TX_THR_SN_EST_0 243 0xFB00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xF700 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xF600 //TX_THR_SN_EST_5 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 251 0x0400 //TX_DELTA_THR_SN_EST_1 252 0x0300 //TX_DELTA_THR_SN_EST_2 253 0x0600 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 282 0x0020 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 284 0x0019 //TX_NS_LVL_CTRL_3 285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x0800 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 301 0x1000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 303 0x6000 //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x6000 //TX_A_POST_FILT_S_0 315 0x6000 //TX_A_POST_FILT_S_1 316 0x6000 //TX_A_POST_FILT_S_2 317 0x6000 //TX_A_POST_FILT_S_3 318 0x6000 //TX_A_POST_FILT_S_4 319 0x6000 //TX_A_POST_FILT_S_5 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x2000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7CCD //TX_LAMBDA_PFILT_S_0 340 0x7CCD //TX_LAMBDA_PFILT_S_1 341 0x7CCD //TX_LAMBDA_PFILT_S_2 342 0x7CCD //TX_LAMBDA_PFILT_S_3 343 0x7CCD //TX_LAMBDA_PFILT_S_4 344 0x7CCD //TX_LAMBDA_PFILT_S_5 345 0x7CCD //TX_LAMBDA_PFILT_S_6 346 0x7CCD //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0500 //TX_A_PEPPER 349 0x1600 //TX_K_PEPPER_HF 350 0x0400 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 371 0x07DA //TX_NOISE_TH_2 372 0x3194 //TX_NOISE_TH_3 373 0x0960 //TX_NOISE_TH_4 374 0x5555 //TX_NOISE_TH_5 375 0x3FF4 //TX_NOISE_TH_5_2 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x02BC //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x484C //TX_FDEQ_GAIN_10 578 0x5054 //TX_FDEQ_GAIN_11 579 0x606C //TX_FDEQ_GAIN_12 580 0x7890 //TX_FDEQ_GAIN_13 581 0x9C9C //TX_FDEQ_GAIN_14 582 0x9C9C //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0304 //TX_FDEQ_BIN_2 594 0x0405 //TX_FDEQ_BIN_3 595 0x0607 //TX_FDEQ_BIN_4 596 0x0809 //TX_FDEQ_BIN_5 597 0x0A0B //TX_FDEQ_BIN_6 598 0x0C0D //TX_FDEQ_BIN_7 599 0x0E0F //TX_FDEQ_BIN_8 600 0x1011 //TX_FDEQ_BIN_9 601 0x1214 //TX_FDEQ_BIN_10 602 0x1618 //TX_FDEQ_BIN_11 603 0x1C1C //TX_FDEQ_BIN_12 604 0x2020 //TX_FDEQ_BIN_13 605 0x2020 //TX_FDEQ_BIN_14 606 0x2020 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0E10 //TX_PREEQ_BIN_MIC0_0 642 0x1010 //TX_PREEQ_BIN_MIC0_1 643 0x1010 //TX_PREEQ_BIN_MIC0_2 644 0x1010 //TX_PREEQ_BIN_MIC0_3 645 0x1010 //TX_PREEQ_BIN_MIC0_4 646 0x1010 //TX_PREEQ_BIN_MIC0_5 647 0x1010 //TX_PREEQ_BIN_MIC0_6 648 0x1010 //TX_PREEQ_BIN_MIC0_7 649 0x1010 //TX_PREEQ_BIN_MIC0_8 650 0x1010 //TX_PREEQ_BIN_MIC0_9 651 0x1010 //TX_PREEQ_BIN_MIC0_10 652 0x1010 //TX_PREEQ_BIN_MIC0_11 653 0x1010 //TX_PREEQ_BIN_MIC0_12 654 0x1010 //TX_PREEQ_BIN_MIC0_13 655 0x1010 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0E10 //TX_PREEQ_BIN_MIC1_0 691 0x1010 //TX_PREEQ_BIN_MIC1_1 692 0x1010 //TX_PREEQ_BIN_MIC1_2 693 0x1010 //TX_PREEQ_BIN_MIC1_3 694 0x1010 //TX_PREEQ_BIN_MIC1_4 695 0x1010 //TX_PREEQ_BIN_MIC1_5 696 0x1010 //TX_PREEQ_BIN_MIC1_6 697 0x1010 //TX_PREEQ_BIN_MIC1_7 698 0x1010 //TX_PREEQ_BIN_MIC1_8 699 0x1010 //TX_PREEQ_BIN_MIC1_9 700 0x1010 //TX_PREEQ_BIN_MIC1_10 701 0x1010 //TX_PREEQ_BIN_MIC1_11 702 0x1010 //TX_PREEQ_BIN_MIC1_12 703 0x1010 //TX_PREEQ_BIN_MIC1_13 704 0x1010 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0E10 //TX_PREEQ_BIN_MIC2_0 740 0x1010 //TX_PREEQ_BIN_MIC2_1 741 0x1010 //TX_PREEQ_BIN_MIC2_2 742 0x1010 //TX_PREEQ_BIN_MIC2_3 743 0x1010 //TX_PREEQ_BIN_MIC2_4 744 0x1010 //TX_PREEQ_BIN_MIC2_5 745 0x1010 //TX_PREEQ_BIN_MIC2_6 746 0x1010 //TX_PREEQ_BIN_MIC2_7 747 0x1010 //TX_PREEQ_BIN_MIC2_8 748 0x1010 //TX_PREEQ_BIN_MIC2_9 749 0x1010 //TX_PREEQ_BIN_MIC2_10 750 0x1010 //TX_PREEQ_BIN_MIC2_11 751 0x1010 //TX_PREEQ_BIN_MIC2_12 752 0x1010 //TX_PREEQ_BIN_MIC2_13 753 0x1010 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0060 //TX_MIC_CALIBRATION_0 766 0x0060 //TX_MIC_CALIBRATION_1 767 0x0070 //TX_MIC_CALIBRATION_2 768 0x0070 //TX_MIC_CALIBRATION_3 769 0x0050 //TX_MIC_PWR_BIAS_0 770 0x0040 //TX_MIC_PWR_BIAS_1 771 0x0040 //TX_MIC_PWR_BIAS_2 772 0x0040 //TX_MIC_PWR_BIAS_3 773 0x0009 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x0C00 //TX_TDDRC_ALPHA_UP_01 784 0x0C00 //TX_TDDRC_ALPHA_UP_02 785 0x0C00 //TX_TDDRC_ALPHA_UP_03 786 0x0C00 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0001 //TX_TDDRC_THRD_0 855 0x0001 //TX_TDDRC_THRD_1 856 0x1900 //TX_TDDRC_THRD_2 857 0x1900 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x7B00 //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x07F2 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7B02 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0500 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x000A //RX_NS_LVL_CTRL 23 0xF600 //RX_THR_SN_EST 24 0x7000 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4858 //RX_FDEQ_GAIN_0 40 0x6265 //RX_FDEQ_GAIN_1 41 0x6568 //RX_FDEQ_GAIN_2 42 0x5654 //RX_FDEQ_GAIN_3 43 0x676E //RX_FDEQ_GAIN_4 44 0x6E6B //RX_FDEQ_GAIN_5 45 0x5B5F //RX_FDEQ_GAIN_6 46 0x5864 //RX_FDEQ_GAIN_7 47 0x6548 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0231 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x280A //RX_TPKA_FP 127 0x032D //RX_MIN_G_FP 128 0x0A00 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0231 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4858 //RX_FDEQ_GAIN_0 40 0x6265 //RX_FDEQ_GAIN_1 41 0x6568 //RX_FDEQ_GAIN_2 42 0x5654 //RX_FDEQ_GAIN_3 43 0x676E //RX_FDEQ_GAIN_4 44 0x6E6B //RX_FDEQ_GAIN_5 45 0x5B5F //RX_FDEQ_GAIN_6 46 0x5864 //RX_FDEQ_GAIN_7 47 0x6548 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0231 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4858 //RX_FDEQ_GAIN_0 40 0x6265 //RX_FDEQ_GAIN_1 41 0x6568 //RX_FDEQ_GAIN_2 42 0x5654 //RX_FDEQ_GAIN_3 43 0x676E //RX_FDEQ_GAIN_4 44 0x6E6B //RX_FDEQ_GAIN_5 45 0x5B5F //RX_FDEQ_GAIN_6 46 0x5864 //RX_FDEQ_GAIN_7 47 0x6548 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0231 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4858 //RX_FDEQ_GAIN_0 40 0x6265 //RX_FDEQ_GAIN_1 41 0x6568 //RX_FDEQ_GAIN_2 42 0x5654 //RX_FDEQ_GAIN_3 43 0x676E //RX_FDEQ_GAIN_4 44 0x6E6B //RX_FDEQ_GAIN_5 45 0x5B5F //RX_FDEQ_GAIN_6 46 0x5864 //RX_FDEQ_GAIN_7 47 0x6548 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x001F //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0231 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4858 //RX_FDEQ_GAIN_0 40 0x6265 //RX_FDEQ_GAIN_1 41 0x6568 //RX_FDEQ_GAIN_2 42 0x5654 //RX_FDEQ_GAIN_3 43 0x676E //RX_FDEQ_GAIN_4 44 0x6E6B //RX_FDEQ_GAIN_5 45 0x5B5F //RX_FDEQ_GAIN_6 46 0x5864 //RX_FDEQ_GAIN_7 47 0x6548 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0034 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0231 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4858 //RX_FDEQ_GAIN_0 40 0x6265 //RX_FDEQ_GAIN_1 41 0x6568 //RX_FDEQ_GAIN_2 42 0x5654 //RX_FDEQ_GAIN_3 43 0x676E //RX_FDEQ_GAIN_4 44 0x6E6B //RX_FDEQ_GAIN_5 45 0x5B5F //RX_FDEQ_GAIN_6 46 0x5864 //RX_FDEQ_GAIN_7 47 0x6548 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0056 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0231 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4858 //RX_FDEQ_GAIN_0 40 0x6265 //RX_FDEQ_GAIN_1 41 0x6568 //RX_FDEQ_GAIN_2 42 0x5654 //RX_FDEQ_GAIN_3 43 0x676E //RX_FDEQ_GAIN_4 44 0x6E6B //RX_FDEQ_GAIN_5 45 0x5B5F //RX_FDEQ_GAIN_6 46 0x5864 //RX_FDEQ_GAIN_7 47 0x6548 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0090 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0231 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4858 //RX_FDEQ_GAIN_0 40 0x6265 //RX_FDEQ_GAIN_1 41 0x6568 //RX_FDEQ_GAIN_2 42 0x5654 //RX_FDEQ_GAIN_3 43 0x676E //RX_FDEQ_GAIN_4 44 0x6E6B //RX_FDEQ_GAIN_5 45 0x5B5F //RX_FDEQ_GAIN_6 46 0x5864 //RX_FDEQ_GAIN_7 47 0x6548 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x242C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0004 //RX_SAMPLINGFREQ_SIG 160 0x0004 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7B02 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0500 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x000A //RX_NS_LVL_CTRL 180 0xF600 //RX_THR_SN_EST 181 0x7000 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4858 //RX_FDEQ_GAIN_0 197 0x6265 //RX_FDEQ_GAIN_1 198 0x6568 //RX_FDEQ_GAIN_2 199 0x5654 //RX_FDEQ_GAIN_3 200 0x676E //RX_FDEQ_GAIN_4 201 0x6E6B //RX_FDEQ_GAIN_5 202 0x5B5F //RX_FDEQ_GAIN_6 203 0x5864 //RX_FDEQ_GAIN_7 204 0x6548 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0231 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x280A //RX_TPKA_FP 284 0x032D //RX_MIN_G_FP 285 0x0A00 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0231 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4858 //RX_FDEQ_GAIN_0 197 0x6265 //RX_FDEQ_GAIN_1 198 0x6568 //RX_FDEQ_GAIN_2 199 0x5654 //RX_FDEQ_GAIN_3 200 0x676E //RX_FDEQ_GAIN_4 201 0x6E6B //RX_FDEQ_GAIN_5 202 0x5B5F //RX_FDEQ_GAIN_6 203 0x5864 //RX_FDEQ_GAIN_7 204 0x6548 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0231 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4858 //RX_FDEQ_GAIN_0 197 0x6265 //RX_FDEQ_GAIN_1 198 0x6568 //RX_FDEQ_GAIN_2 199 0x5654 //RX_FDEQ_GAIN_3 200 0x676E //RX_FDEQ_GAIN_4 201 0x6E6B //RX_FDEQ_GAIN_5 202 0x5B5F //RX_FDEQ_GAIN_6 203 0x5864 //RX_FDEQ_GAIN_7 204 0x6548 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0012 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0231 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4858 //RX_FDEQ_GAIN_0 197 0x6265 //RX_FDEQ_GAIN_1 198 0x6568 //RX_FDEQ_GAIN_2 199 0x5654 //RX_FDEQ_GAIN_3 200 0x676E //RX_FDEQ_GAIN_4 201 0x6E6B //RX_FDEQ_GAIN_5 202 0x5B5F //RX_FDEQ_GAIN_6 203 0x5864 //RX_FDEQ_GAIN_7 204 0x6548 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x001F //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0231 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4858 //RX_FDEQ_GAIN_0 197 0x6265 //RX_FDEQ_GAIN_1 198 0x6568 //RX_FDEQ_GAIN_2 199 0x5654 //RX_FDEQ_GAIN_3 200 0x676E //RX_FDEQ_GAIN_4 201 0x6E6B //RX_FDEQ_GAIN_5 202 0x5B5F //RX_FDEQ_GAIN_6 203 0x5864 //RX_FDEQ_GAIN_7 204 0x6548 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0034 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0231 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4858 //RX_FDEQ_GAIN_0 197 0x6265 //RX_FDEQ_GAIN_1 198 0x6568 //RX_FDEQ_GAIN_2 199 0x5654 //RX_FDEQ_GAIN_3 200 0x676E //RX_FDEQ_GAIN_4 201 0x6E6B //RX_FDEQ_GAIN_5 202 0x5B5F //RX_FDEQ_GAIN_6 203 0x5864 //RX_FDEQ_GAIN_7 204 0x6548 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0056 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0231 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4858 //RX_FDEQ_GAIN_0 197 0x6265 //RX_FDEQ_GAIN_1 198 0x6568 //RX_FDEQ_GAIN_2 199 0x5654 //RX_FDEQ_GAIN_3 200 0x676E //RX_FDEQ_GAIN_4 201 0x6E6B //RX_FDEQ_GAIN_5 202 0x5B5F //RX_FDEQ_GAIN_6 203 0x5864 //RX_FDEQ_GAIN_7 204 0x6548 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0090 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0231 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4858 //RX_FDEQ_GAIN_0 197 0x6265 //RX_FDEQ_GAIN_1 198 0x6568 //RX_FDEQ_GAIN_2 199 0x5654 //RX_FDEQ_GAIN_3 200 0x676E //RX_FDEQ_GAIN_4 201 0x6E6B //RX_FDEQ_GAIN_5 202 0x5B5F //RX_FDEQ_GAIN_6 203 0x5864 //RX_FDEQ_GAIN_7 204 0x6548 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-RESERVE2-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x6F68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7EFF //TX_A_HP 129 0x4000 //TX_B_PE 130 0x1800 //TX_THR_PITCH_DET_0 131 0x1000 //TX_THR_PITCH_DET_1 132 0x0800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0080 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x6D60 //TX_EAD_THR 151 0x0800 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x6000 //TX_C_POST_FLT 168 0x7000 //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x6590 //TX_DTD_THR1_0 198 0x7D00 //TX_DTD_THR1_1 199 0x6590 //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0BB8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x00F0 //TX_EPD_OFFSET_00 233 0x00F0 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xF700 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xF400 //TX_THR_SN_EST_5 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0018 //TX_NS_LVL_CTRL_2 284 0x0012 //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x001C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000F //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x0009 //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x6000 //TX_SNRI_SUP_1 302 0x5000 //TX_SNRI_SUP_2 303 0x6000 //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x3000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x000E //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x3000 //TX_B_POST_FILT_2 325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x1000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7000 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0800 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x00FA //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 371 0x00C8 //TX_NOISE_TH_2 372 0x2904 //TX_NOISE_TH_3 373 0x07D0 //TX_NOISE_TH_4 374 0x157C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x044C //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x0064 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4040 //TX_FDEQ_GAIN_6 574 0x4040 //TX_FDEQ_GAIN_7 575 0x4040 //TX_FDEQ_GAIN_8 576 0x3838 //TX_FDEQ_GAIN_9 577 0x3838 //TX_FDEQ_GAIN_10 578 0x3828 //TX_FDEQ_GAIN_11 579 0x2828 //TX_FDEQ_GAIN_12 580 0x2828 //TX_FDEQ_GAIN_13 581 0x1C1C //TX_FDEQ_GAIN_14 582 0x1C1C //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x1013 //TX_FDEQ_BIN_10 602 0x1719 //TX_FDEQ_BIN_11 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 606 0x284A //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0E10 //TX_PREEQ_BIN_MIC0_0 642 0x1010 //TX_PREEQ_BIN_MIC0_1 643 0x1010 //TX_PREEQ_BIN_MIC0_2 644 0x1010 //TX_PREEQ_BIN_MIC0_3 645 0x1010 //TX_PREEQ_BIN_MIC0_4 646 0x1010 //TX_PREEQ_BIN_MIC0_5 647 0x1010 //TX_PREEQ_BIN_MIC0_6 648 0x1010 //TX_PREEQ_BIN_MIC0_7 649 0x1010 //TX_PREEQ_BIN_MIC0_8 650 0x1010 //TX_PREEQ_BIN_MIC0_9 651 0x1010 //TX_PREEQ_BIN_MIC0_10 652 0x1010 //TX_PREEQ_BIN_MIC0_11 653 0x1010 //TX_PREEQ_BIN_MIC0_12 654 0x1010 //TX_PREEQ_BIN_MIC0_13 655 0x1010 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0E10 //TX_PREEQ_BIN_MIC1_0 691 0x1010 //TX_PREEQ_BIN_MIC1_1 692 0x1010 //TX_PREEQ_BIN_MIC1_2 693 0x1010 //TX_PREEQ_BIN_MIC1_3 694 0x1010 //TX_PREEQ_BIN_MIC1_4 695 0x1010 //TX_PREEQ_BIN_MIC1_5 696 0x1010 //TX_PREEQ_BIN_MIC1_6 697 0x1010 //TX_PREEQ_BIN_MIC1_7 698 0x1010 //TX_PREEQ_BIN_MIC1_8 699 0x1010 //TX_PREEQ_BIN_MIC1_9 700 0x1010 //TX_PREEQ_BIN_MIC1_10 701 0x1010 //TX_PREEQ_BIN_MIC1_11 702 0x1010 //TX_PREEQ_BIN_MIC1_12 703 0x1010 //TX_PREEQ_BIN_MIC1_13 704 0x1010 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0E10 //TX_PREEQ_BIN_MIC2_0 740 0x1010 //TX_PREEQ_BIN_MIC2_1 741 0x1010 //TX_PREEQ_BIN_MIC2_2 742 0x1010 //TX_PREEQ_BIN_MIC2_3 743 0x1010 //TX_PREEQ_BIN_MIC2_4 744 0x1010 //TX_PREEQ_BIN_MIC2_5 745 0x1010 //TX_PREEQ_BIN_MIC2_6 746 0x1010 //TX_PREEQ_BIN_MIC2_7 747 0x1010 //TX_PREEQ_BIN_MIC2_8 748 0x1010 //TX_PREEQ_BIN_MIC2_9 749 0x1010 //TX_PREEQ_BIN_MIC2_10 750 0x1010 //TX_PREEQ_BIN_MIC2_11 751 0x1010 //TX_PREEQ_BIN_MIC2_12 752 0x1010 //TX_PREEQ_BIN_MIC2_13 753 0x1010 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0062 //TX_MIC_CALIBRATION_0 766 0x0062 //TX_MIC_CALIBRATION_1 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0050 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0002 //TX_GAIN_LIMIT_1 775 0x0000 //TX_GAIN_LIMIT_2 776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0000 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0020 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x07F2 //TX_TDDRC_DRC_GAIN 867 0x78D6 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x003C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x1800 //RX_THR_PITCH_DET_0 14 0x1000 //RX_THR_PITCH_DET_1 15 0x0800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0003 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4E52 //RX_FDEQ_GAIN_0 40 0x5252 //RX_FDEQ_GAIN_1 41 0x5252 //RX_FDEQ_GAIN_2 42 0x5250 //RX_FDEQ_GAIN_3 43 0x4C46 //RX_FDEQ_GAIN_4 44 0x4748 //RX_FDEQ_GAIN_5 45 0x5768 //RX_FDEQ_GAIN_6 46 0x6162 //RX_FDEQ_GAIN_7 47 0x5252 //RX_FDEQ_GAIN_8 48 0x5256 //RX_FDEQ_GAIN_9 49 0x5248 //RX_FDEQ_GAIN_10 50 0x3434 //RX_FDEQ_GAIN_11 51 0x3436 //RX_FDEQ_GAIN_12 52 0x2A18 //RX_FDEQ_GAIN_13 53 0x1830 //RX_FDEQ_GAIN_14 54 0x3648 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x023E //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x0D90 //RX_TPKA_FP 127 0x032D //RX_MIN_G_FP 128 0x0A00 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 41 0x7270 //RX_FDEQ_GAIN_2 42 0x6A70 //RX_FDEQ_GAIN_3 43 0x645A //RX_FDEQ_GAIN_4 44 0x5A5E //RX_FDEQ_GAIN_5 45 0x6E72 //RX_FDEQ_GAIN_6 46 0x7268 //RX_FDEQ_GAIN_7 47 0x665A //RX_FDEQ_GAIN_8 48 0x5A5A //RX_FDEQ_GAIN_9 49 0x5A64 //RX_FDEQ_GAIN_10 50 0x6448 //RX_FDEQ_GAIN_11 51 0x4949 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 41 0x7270 //RX_FDEQ_GAIN_2 42 0x6A70 //RX_FDEQ_GAIN_3 43 0x645A //RX_FDEQ_GAIN_4 44 0x5A5E //RX_FDEQ_GAIN_5 45 0x6E72 //RX_FDEQ_GAIN_6 46 0x7268 //RX_FDEQ_GAIN_7 47 0x665A //RX_FDEQ_GAIN_8 48 0x5A5A //RX_FDEQ_GAIN_9 49 0x5A64 //RX_FDEQ_GAIN_10 50 0x6448 //RX_FDEQ_GAIN_11 51 0x4949 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0011 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 41 0x7270 //RX_FDEQ_GAIN_2 42 0x6A70 //RX_FDEQ_GAIN_3 43 0x645A //RX_FDEQ_GAIN_4 44 0x5A5E //RX_FDEQ_GAIN_5 45 0x6E72 //RX_FDEQ_GAIN_6 46 0x7268 //RX_FDEQ_GAIN_7 47 0x665A //RX_FDEQ_GAIN_8 48 0x5A5A //RX_FDEQ_GAIN_9 49 0x5A64 //RX_FDEQ_GAIN_10 50 0x6448 //RX_FDEQ_GAIN_11 51 0x4949 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x001D //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 41 0x7270 //RX_FDEQ_GAIN_2 42 0x6A70 //RX_FDEQ_GAIN_3 43 0x645A //RX_FDEQ_GAIN_4 44 0x5A5E //RX_FDEQ_GAIN_5 45 0x6E72 //RX_FDEQ_GAIN_6 46 0x7268 //RX_FDEQ_GAIN_7 47 0x665A //RX_FDEQ_GAIN_8 48 0x5A5A //RX_FDEQ_GAIN_9 49 0x5A64 //RX_FDEQ_GAIN_10 50 0x6448 //RX_FDEQ_GAIN_11 51 0x4949 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0030 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 41 0x7270 //RX_FDEQ_GAIN_2 42 0x6A70 //RX_FDEQ_GAIN_3 43 0x645A //RX_FDEQ_GAIN_4 44 0x5A5E //RX_FDEQ_GAIN_5 45 0x6E72 //RX_FDEQ_GAIN_6 46 0x7268 //RX_FDEQ_GAIN_7 47 0x665A //RX_FDEQ_GAIN_8 48 0x5A5A //RX_FDEQ_GAIN_9 49 0x5A64 //RX_FDEQ_GAIN_10 50 0x6448 //RX_FDEQ_GAIN_11 51 0x4949 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0050 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 41 0x7270 //RX_FDEQ_GAIN_2 42 0x6A70 //RX_FDEQ_GAIN_3 43 0x645A //RX_FDEQ_GAIN_4 44 0x5A5E //RX_FDEQ_GAIN_5 45 0x6E72 //RX_FDEQ_GAIN_6 46 0x7268 //RX_FDEQ_GAIN_7 47 0x665A //RX_FDEQ_GAIN_8 48 0x5A5A //RX_FDEQ_GAIN_9 49 0x5A64 //RX_FDEQ_GAIN_10 50 0x6448 //RX_FDEQ_GAIN_11 51 0x4949 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0089 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04CA //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x6270 //RX_FDEQ_GAIN_0 40 0x7A70 //RX_FDEQ_GAIN_1 41 0x7270 //RX_FDEQ_GAIN_2 42 0x6A70 //RX_FDEQ_GAIN_3 43 0x645A //RX_FDEQ_GAIN_4 44 0x5A5E //RX_FDEQ_GAIN_5 45 0x6E72 //RX_FDEQ_GAIN_6 46 0x7268 //RX_FDEQ_GAIN_7 47 0x665A //RX_FDEQ_GAIN_8 48 0x5A5A //RX_FDEQ_GAIN_9 49 0x5A64 //RX_FDEQ_GAIN_10 50 0x6448 //RX_FDEQ_GAIN_11 51 0x4949 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x284A //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x003C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x1800 //RX_THR_PITCH_DET_0 171 0x1000 //RX_THR_PITCH_DET_1 172 0x0800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0003 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4E52 //RX_FDEQ_GAIN_0 197 0x5252 //RX_FDEQ_GAIN_1 198 0x5252 //RX_FDEQ_GAIN_2 199 0x5250 //RX_FDEQ_GAIN_3 200 0x4C46 //RX_FDEQ_GAIN_4 201 0x4748 //RX_FDEQ_GAIN_5 202 0x5768 //RX_FDEQ_GAIN_6 203 0x6162 //RX_FDEQ_GAIN_7 204 0x5252 //RX_FDEQ_GAIN_8 205 0x5256 //RX_FDEQ_GAIN_9 206 0x5248 //RX_FDEQ_GAIN_10 207 0x3434 //RX_FDEQ_GAIN_11 208 0x3436 //RX_FDEQ_GAIN_12 209 0x2A18 //RX_FDEQ_GAIN_13 210 0x1830 //RX_FDEQ_GAIN_14 211 0x3648 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x023E //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x0D90 //RX_TPKA_FP 284 0x032D //RX_MIN_G_FP 285 0x0A00 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 198 0x7270 //RX_FDEQ_GAIN_2 199 0x6A70 //RX_FDEQ_GAIN_3 200 0x645A //RX_FDEQ_GAIN_4 201 0x5A5E //RX_FDEQ_GAIN_5 202 0x6E72 //RX_FDEQ_GAIN_6 203 0x7268 //RX_FDEQ_GAIN_7 204 0x665A //RX_FDEQ_GAIN_8 205 0x5A5A //RX_FDEQ_GAIN_9 206 0x5A64 //RX_FDEQ_GAIN_10 207 0x6448 //RX_FDEQ_GAIN_11 208 0x4949 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000A //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 198 0x7270 //RX_FDEQ_GAIN_2 199 0x6A70 //RX_FDEQ_GAIN_3 200 0x645A //RX_FDEQ_GAIN_4 201 0x5A5E //RX_FDEQ_GAIN_5 202 0x6E72 //RX_FDEQ_GAIN_6 203 0x7268 //RX_FDEQ_GAIN_7 204 0x665A //RX_FDEQ_GAIN_8 205 0x5A5A //RX_FDEQ_GAIN_9 206 0x5A64 //RX_FDEQ_GAIN_10 207 0x6448 //RX_FDEQ_GAIN_11 208 0x4949 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0011 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 198 0x7270 //RX_FDEQ_GAIN_2 199 0x6A70 //RX_FDEQ_GAIN_3 200 0x645A //RX_FDEQ_GAIN_4 201 0x5A5E //RX_FDEQ_GAIN_5 202 0x6E72 //RX_FDEQ_GAIN_6 203 0x7268 //RX_FDEQ_GAIN_7 204 0x665A //RX_FDEQ_GAIN_8 205 0x5A5A //RX_FDEQ_GAIN_9 206 0x5A64 //RX_FDEQ_GAIN_10 207 0x6448 //RX_FDEQ_GAIN_11 208 0x4949 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x001D //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 198 0x7270 //RX_FDEQ_GAIN_2 199 0x6A70 //RX_FDEQ_GAIN_3 200 0x645A //RX_FDEQ_GAIN_4 201 0x5A5E //RX_FDEQ_GAIN_5 202 0x6E72 //RX_FDEQ_GAIN_6 203 0x7268 //RX_FDEQ_GAIN_7 204 0x665A //RX_FDEQ_GAIN_8 205 0x5A5A //RX_FDEQ_GAIN_9 206 0x5A64 //RX_FDEQ_GAIN_10 207 0x6448 //RX_FDEQ_GAIN_11 208 0x4949 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0030 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 198 0x7270 //RX_FDEQ_GAIN_2 199 0x6A70 //RX_FDEQ_GAIN_3 200 0x645A //RX_FDEQ_GAIN_4 201 0x5A5E //RX_FDEQ_GAIN_5 202 0x6E72 //RX_FDEQ_GAIN_6 203 0x7268 //RX_FDEQ_GAIN_7 204 0x665A //RX_FDEQ_GAIN_8 205 0x5A5A //RX_FDEQ_GAIN_9 206 0x5A64 //RX_FDEQ_GAIN_10 207 0x6448 //RX_FDEQ_GAIN_11 208 0x4949 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0050 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 198 0x7270 //RX_FDEQ_GAIN_2 199 0x6A70 //RX_FDEQ_GAIN_3 200 0x645A //RX_FDEQ_GAIN_4 201 0x5A5E //RX_FDEQ_GAIN_5 202 0x6E72 //RX_FDEQ_GAIN_6 203 0x7268 //RX_FDEQ_GAIN_7 204 0x665A //RX_FDEQ_GAIN_8 205 0x5A5A //RX_FDEQ_GAIN_9 206 0x5A64 //RX_FDEQ_GAIN_10 207 0x6448 //RX_FDEQ_GAIN_11 208 0x4949 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0089 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7220 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04CA //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x6270 //RX_FDEQ_GAIN_0 197 0x7A70 //RX_FDEQ_GAIN_1 198 0x7270 //RX_FDEQ_GAIN_2 199 0x6A70 //RX_FDEQ_GAIN_3 200 0x645A //RX_FDEQ_GAIN_4 201 0x5A5E //RX_FDEQ_GAIN_5 202 0x6E72 //RX_FDEQ_GAIN_6 203 0x7268 //RX_FDEQ_GAIN_7 204 0x665A //RX_FDEQ_GAIN_8 205 0x5A5A //RX_FDEQ_GAIN_9 206 0x5A64 //RX_FDEQ_GAIN_10 207 0x6448 //RX_FDEQ_GAIN_11 208 0x4949 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x284A //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x2B68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7646 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7CCC //TX_THR_PITCH_DET_0 131 0x7000 //TX_THR_PITCH_DET_1 132 0x6333 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0010 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7000 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x1000 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x0064 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x5000 //TX_DTD_THR1_0 198 0x7000 //TX_DTD_THR1_1 199 0x7F00 //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x2000 //TX_DTD_THR2_0 205 0x2000 //TX_DTD_THR2_1 206 0x2000 //TX_DTD_THR2_2 207 0x2000 //TX_DTD_THR2_3 208 0x2000 //TX_DTD_THR2_4 209 0x2000 //TX_DTD_THR2_5 210 0x2000 //TX_DTD_THR2_6 211 0x4100 //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x03E8 //TX_DT_CUT_K 214 0x1000 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0010 //TX_EPD_OFFSET_00 233 0x0010 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xFA00 //TX_THR_SN_EST_6 249 0xFA00 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0000 //TX_DELTA_THR_SN_EST_1 252 0x0000 //TX_DELTA_THR_SN_EST_2 253 0x0000 //TX_DELTA_THR_SN_EST_3 254 0x0000 //TX_DELTA_THR_SN_EST_4 255 0x0000 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0000 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x0400 //TX_B_POST_FLT_0 280 0x0400 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0010 //TX_NS_LVL_CTRL_1 283 0x0010 //TX_NS_LVL_CTRL_2 284 0x0010 //TX_NS_LVL_CTRL_3 285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 287 0x0010 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000D //TX_MIN_GAIN_S_0 290 0x000D //TX_MIN_GAIN_S_1 291 0x000D //TX_MIN_GAIN_S_2 292 0x000D //TX_MIN_GAIN_S_3 293 0x000D //TX_MIN_GAIN_S_4 294 0x000D //TX_MIN_GAIN_S_5 295 0x000D //TX_MIN_GAIN_S_6 296 0x000D //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x7FFF //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0014 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x1000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 341 0x7C29 //TX_LAMBDA_PFILT_S_2 342 0x7C29 //TX_LAMBDA_PFILT_S_3 343 0x7C29 //TX_LAMBDA_PFILT_S_4 344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x0FA0 //TX_K_PEPPER_HF 350 0x0400 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x4000 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 371 0x1F40 //TX_NOISE_TH_2 372 0x4650 //TX_NOISE_TH_3 373 0x7148 //TX_NOISE_TH_4 374 0x044C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 379 0x00C8 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY 387 0x0029 //TX_OUT_ENER_TH_NOISE 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x7FFF //TX_NOISEDET_BOOST_TH 412 0x0000 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0280 //TX_N_HOLD_HS 416 0x006E //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0333 //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2400 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x2000 //TX_WTA_EN_RTO_TH 429 0x1400 //TX_TOP_ENER_TH_F 430 0x0064 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x003C //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x0D9A //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x2A3D //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x0000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM 567 0x6048 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4844 //TX_FDEQ_GAIN_6 574 0x4242 //TX_FDEQ_GAIN_7 575 0x3C34 //TX_FDEQ_GAIN_8 576 0x343A //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0401 //TX_FDEQ_BIN_0 592 0x0103 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0010 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0608 //TX_PREEQ_BIN_MIC0_0 642 0x0808 //TX_PREEQ_BIN_MIC0_1 643 0x0808 //TX_PREEQ_BIN_MIC0_2 644 0x0808 //TX_PREEQ_BIN_MIC0_3 645 0x0808 //TX_PREEQ_BIN_MIC0_4 646 0x0808 //TX_PREEQ_BIN_MIC0_5 647 0x0808 //TX_PREEQ_BIN_MIC0_6 648 0x0802 //TX_PREEQ_BIN_MIC0_7 649 0x0000 //TX_PREEQ_BIN_MIC0_8 650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0010 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0608 //TX_PREEQ_BIN_MIC1_0 691 0x0808 //TX_PREEQ_BIN_MIC1_1 692 0x0808 //TX_PREEQ_BIN_MIC1_2 693 0x0808 //TX_PREEQ_BIN_MIC1_3 694 0x0808 //TX_PREEQ_BIN_MIC1_4 695 0x0808 //TX_PREEQ_BIN_MIC1_5 696 0x0808 //TX_PREEQ_BIN_MIC1_6 697 0x0802 //TX_PREEQ_BIN_MIC1_7 698 0x0000 //TX_PREEQ_BIN_MIC1_8 699 0x0000 //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0010 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0608 //TX_PREEQ_BIN_MIC2_0 740 0x0808 //TX_PREEQ_BIN_MIC2_1 741 0x0808 //TX_PREEQ_BIN_MIC2_2 742 0x0808 //TX_PREEQ_BIN_MIC2_3 743 0x0808 //TX_PREEQ_BIN_MIC2_4 744 0x0808 //TX_PREEQ_BIN_MIC2_5 745 0x0808 //TX_PREEQ_BIN_MIC2_6 746 0x0802 //TX_PREEQ_BIN_MIC2_7 747 0x0000 //TX_PREEQ_BIN_MIC2_8 748 0x0000 //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0065 //TX_MIC_CALIBRATION_0 766 0x0065 //TX_MIC_CALIBRATION_1 767 0x0065 //TX_MIC_CALIBRATION_2 768 0x0065 //TX_MIC_CALIBRATION_3 769 0x0044 //TX_MIC_PWR_BIAS_0 770 0x0044 //TX_MIC_PWR_BIAS_1 771 0x0044 //TX_MIC_PWR_BIAS_2 772 0x0044 //TX_MIC_PWR_BIAS_3 773 0x000B //TX_GAIN_LIMIT_0 774 0x000B //TX_GAIN_LIMIT_1 775 0x000B //TX_GAIN_LIMIT_2 776 0x000B //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x1000 //TX_TDDRC_ALPHA_UP_01 784 0x1000 //TX_TDDRC_ALPHA_UP_02 785 0x1000 //TX_TDDRC_ALPHA_UP_03 786 0x1000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0001 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x1000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x0650 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0xF800 //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0xA02C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x3800 //RX_THR_PITCH_DET_0 14 0x3000 //RX_THR_PITCH_DET_1 15 0x2800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4844 //RX_FDEQ_GAIN_6 46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4844 //RX_FDEQ_GAIN_6 46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4844 //RX_FDEQ_GAIN_6 46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4844 //RX_FDEQ_GAIN_6 46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4844 //RX_FDEQ_GAIN_6 46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4844 //RX_FDEQ_GAIN_6 46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4844 //RX_FDEQ_GAIN_6 46 0x4444 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4444 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0xA02C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x3800 //RX_THR_PITCH_DET_0 171 0x3000 //RX_THR_PITCH_DET_1 172 0x2800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4844 //RX_FDEQ_GAIN_6 203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4844 //RX_FDEQ_GAIN_6 203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4844 //RX_FDEQ_GAIN_6 203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4844 //RX_FDEQ_GAIN_6 203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4844 //RX_FDEQ_GAIN_6 203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4844 //RX_FDEQ_GAIN_6 203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4844 //RX_FDEQ_GAIN_6 203 0x4444 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4444 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x2B68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7D83 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x6800 //TX_THR_PITCH_DET_0 131 0x6000 //TX_THR_PITCH_DET_1 132 0x5800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0080 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7000 //TX_EAD_THR 151 0x0800 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x6000 //TX_C_POST_FLT 168 0x7000 //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7800 //TX_DTD_THR1_0 198 0x7000 //TX_DTD_THR1_1 199 0x7FFF //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x7FFF //TX_DTD_THR2_0 205 0x7FFF //TX_DTD_THR2_1 206 0x7FFF //TX_DTD_THR2_2 207 0x7FFF //TX_DTD_THR2_3 208 0x7FFF //TX_DTD_THR2_4 209 0x7FFF //TX_DTD_THR2_5 210 0x7FFF //TX_DTD_THR2_6 211 0x1000 //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0BB8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x0019 //TX_EPD_OFFSET_00 233 0x0019 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 246 0xF400 //TX_THR_SN_EST_4 247 0xF400 //TX_THR_SN_EST_5 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 282 0x0011 //TX_NS_LVL_CTRL_1 283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000F //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x7FFF //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x000E //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x1000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7B00 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 345 0x7B00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0800 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x00C8 //TX_NOISE_TH_2 372 0x3A98 //TX_NOISE_TH_3 373 0x0FA0 //TX_NOISE_TH_4 374 0x157C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x00F8 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x0000 //TX_NS_FP_K_METAL 411 0x7FFF //TX_NOISEDET_BOOST_TH 412 0x0000 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x001C //TX_FDEQ_SUBNUM 567 0x6056 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0302 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D07 //TX_FDEQ_BIN_9 601 0x0E0F //TX_FDEQ_BIN_10 602 0x0F10 //TX_FDEQ_BIN_11 603 0x1011 //TX_FDEQ_BIN_12 604 0x1119 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0608 //TX_PREEQ_BIN_MIC0_0 642 0x0808 //TX_PREEQ_BIN_MIC0_1 643 0x0808 //TX_PREEQ_BIN_MIC0_2 644 0x0808 //TX_PREEQ_BIN_MIC0_3 645 0x0808 //TX_PREEQ_BIN_MIC0_4 646 0x0808 //TX_PREEQ_BIN_MIC0_5 647 0x0808 //TX_PREEQ_BIN_MIC0_6 648 0x0808 //TX_PREEQ_BIN_MIC0_7 649 0x0808 //TX_PREEQ_BIN_MIC0_8 650 0x0808 //TX_PREEQ_BIN_MIC0_9 651 0x0808 //TX_PREEQ_BIN_MIC0_10 652 0x0808 //TX_PREEQ_BIN_MIC0_11 653 0x0808 //TX_PREEQ_BIN_MIC0_12 654 0x0808 //TX_PREEQ_BIN_MIC0_13 655 0x0808 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0608 //TX_PREEQ_BIN_MIC1_0 691 0x0808 //TX_PREEQ_BIN_MIC1_1 692 0x0808 //TX_PREEQ_BIN_MIC1_2 693 0x0808 //TX_PREEQ_BIN_MIC1_3 694 0x0808 //TX_PREEQ_BIN_MIC1_4 695 0x0808 //TX_PREEQ_BIN_MIC1_5 696 0x0808 //TX_PREEQ_BIN_MIC1_6 697 0x0808 //TX_PREEQ_BIN_MIC1_7 698 0x0808 //TX_PREEQ_BIN_MIC1_8 699 0x0808 //TX_PREEQ_BIN_MIC1_9 700 0x0808 //TX_PREEQ_BIN_MIC1_10 701 0x0808 //TX_PREEQ_BIN_MIC1_11 702 0x0808 //TX_PREEQ_BIN_MIC1_12 703 0x0808 //TX_PREEQ_BIN_MIC1_13 704 0x0808 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0608 //TX_PREEQ_BIN_MIC2_0 740 0x0808 //TX_PREEQ_BIN_MIC2_1 741 0x0808 //TX_PREEQ_BIN_MIC2_2 742 0x0808 //TX_PREEQ_BIN_MIC2_3 743 0x0808 //TX_PREEQ_BIN_MIC2_4 744 0x0808 //TX_PREEQ_BIN_MIC2_5 745 0x0808 //TX_PREEQ_BIN_MIC2_6 746 0x0808 //TX_PREEQ_BIN_MIC2_7 747 0x0808 //TX_PREEQ_BIN_MIC2_8 748 0x0808 //TX_PREEQ_BIN_MIC2_9 749 0x0808 //TX_PREEQ_BIN_MIC2_10 750 0x0808 //TX_PREEQ_BIN_MIC2_11 751 0x0808 //TX_PREEQ_BIN_MIC2_12 752 0x0808 //TX_PREEQ_BIN_MIC2_13 753 0x0808 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0062 //TX_MIC_CALIBRATION_0 766 0x0062 //TX_MIC_CALIBRATION_1 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x000C //TX_GAIN_LIMIT_0 774 0x000C //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000C //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x1000 //TX_TDDRC_ALPHA_UP_01 784 0x1000 //TX_TDDRC_ALPHA_UP_02 785 0x1000 //TX_TDDRC_ALPHA_UP_03 786 0x1000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x0000 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0001 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x1000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x0619 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0xA02C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x3800 //RX_THR_PITCH_DET_0 14 0x3000 //RX_THR_PITCH_DET_1 15 0x2800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0xA02C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0001 //RX_SAMPLINGFREQ_SIG 160 0x0001 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x4000 //RX_B_PE 170 0x3800 //RX_THR_PITCH_DET_0 171 0x3000 //RX_THR_PITCH_DET_1 172 0x2800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x2B68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7EFF //TX_A_HP 129 0x4000 //TX_B_PE 130 0x1800 //TX_THR_PITCH_DET_0 131 0x1000 //TX_THR_PITCH_DET_1 132 0x0800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0080 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7000 //TX_EAD_THR 151 0x0800 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x6000 //TX_C_POST_FLT 168 0x7000 //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7800 //TX_DTD_THR1_0 198 0x7000 //TX_DTD_THR1_1 199 0x7FFF //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x7FFF //TX_DTD_THR2_0 205 0x7FFF //TX_DTD_THR2_1 206 0x7FFF //TX_DTD_THR2_2 207 0x7FFF //TX_DTD_THR2_3 208 0x7FFF //TX_DTD_THR2_4 209 0x7FFF //TX_DTD_THR2_5 210 0x7FFF //TX_DTD_THR2_6 211 0x1000 //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0BB8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x00F0 //TX_EPD_OFFSET_00 233 0x00F0 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 246 0xF400 //TX_THR_SN_EST_4 247 0xF400 //TX_THR_SN_EST_5 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 282 0x0011 //TX_NS_LVL_CTRL_1 283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000F //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x7FFF //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x000E //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x1000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7900 //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7B00 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 345 0x7B00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0000 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0800 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x00C8 //TX_NOISE_TH_2 372 0x3A98 //TX_NOISE_TH_3 373 0x0FA0 //TX_NOISE_TH_4 374 0x157C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x044C //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x1013 //TX_FDEQ_BIN_10 602 0x1719 //TX_FDEQ_BIN_11 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 606 0x282C //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4868 //TX_PREEQ_GAIN_MIC0_8 626 0x6860 //TX_PREEQ_GAIN_MIC0_9 627 0x6048 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0E10 //TX_PREEQ_BIN_MIC0_0 642 0x1010 //TX_PREEQ_BIN_MIC0_1 643 0x1010 //TX_PREEQ_BIN_MIC0_2 644 0x1010 //TX_PREEQ_BIN_MIC0_3 645 0x1010 //TX_PREEQ_BIN_MIC0_4 646 0x1010 //TX_PREEQ_BIN_MIC0_5 647 0x1010 //TX_PREEQ_BIN_MIC0_6 648 0x1010 //TX_PREEQ_BIN_MIC0_7 649 0x1010 //TX_PREEQ_BIN_MIC0_8 650 0x1010 //TX_PREEQ_BIN_MIC0_9 651 0x1010 //TX_PREEQ_BIN_MIC0_10 652 0x1010 //TX_PREEQ_BIN_MIC0_11 653 0x1010 //TX_PREEQ_BIN_MIC0_12 654 0x1010 //TX_PREEQ_BIN_MIC0_13 655 0x1010 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0E10 //TX_PREEQ_BIN_MIC1_0 691 0x1010 //TX_PREEQ_BIN_MIC1_1 692 0x1010 //TX_PREEQ_BIN_MIC1_2 693 0x1010 //TX_PREEQ_BIN_MIC1_3 694 0x1010 //TX_PREEQ_BIN_MIC1_4 695 0x1010 //TX_PREEQ_BIN_MIC1_5 696 0x1010 //TX_PREEQ_BIN_MIC1_6 697 0x1010 //TX_PREEQ_BIN_MIC1_7 698 0x1010 //TX_PREEQ_BIN_MIC1_8 699 0x1010 //TX_PREEQ_BIN_MIC1_9 700 0x1010 //TX_PREEQ_BIN_MIC1_10 701 0x1010 //TX_PREEQ_BIN_MIC1_11 702 0x1010 //TX_PREEQ_BIN_MIC1_12 703 0x1010 //TX_PREEQ_BIN_MIC1_13 704 0x1010 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0E10 //TX_PREEQ_BIN_MIC2_0 740 0x1010 //TX_PREEQ_BIN_MIC2_1 741 0x1010 //TX_PREEQ_BIN_MIC2_2 742 0x1010 //TX_PREEQ_BIN_MIC2_3 743 0x1010 //TX_PREEQ_BIN_MIC2_4 744 0x1010 //TX_PREEQ_BIN_MIC2_5 745 0x1010 //TX_PREEQ_BIN_MIC2_6 746 0x1010 //TX_PREEQ_BIN_MIC2_7 747 0x1010 //TX_PREEQ_BIN_MIC2_8 748 0x1010 //TX_PREEQ_BIN_MIC2_9 749 0x1010 //TX_PREEQ_BIN_MIC2_10 750 0x1010 //TX_PREEQ_BIN_MIC2_11 751 0x1010 //TX_PREEQ_BIN_MIC2_12 752 0x1010 //TX_PREEQ_BIN_MIC2_13 753 0x1010 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0062 //TX_MIC_CALIBRATION_0 766 0x0062 //TX_MIC_CALIBRATION_1 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x000C //TX_GAIN_LIMIT_0 774 0x000C //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000C //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0000 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x78D6 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x1800 //RX_THR_PITCH_DET_0 14 0x1000 //RX_THR_PITCH_DET_1 15 0x0800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0003 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x002C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x1800 //RX_THR_PITCH_DET_0 171 0x1000 //RX_THR_PITCH_DET_1 172 0x0800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0003 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 2 0x0020 //TX_PATCH_REG 3 0x6B6A //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B4C //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7E56 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x6800 //TX_THR_PITCH_DET_0 131 0x6000 //TX_THR_PITCH_DET_1 132 0x5800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0200 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x61A8 //TX_EAD_THR 151 0x0400 //TX_THR_RE_EST 152 0x3000 //TX_MIN_EQ_RE_EST_0 153 0x3000 //TX_MIN_EQ_RE_EST_1 154 0x4000 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x6000 //TX_MIN_EQ_RE_EST_6 159 0x6000 //TX_MIN_EQ_RE_EST_7 160 0x6000 //TX_MIN_EQ_RE_EST_8 161 0x6000 //TX_MIN_EQ_RE_EST_9 162 0x4000 //TX_MIN_EQ_RE_EST_10 163 0x4000 //TX_MIN_EQ_RE_EST_11 164 0x4000 //TX_MIN_EQ_RE_EST_12 165 0x3000 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x3000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x0800 //TX_DTD_THR1_0 198 0x0800 //TX_DTD_THR1_1 199 0x0800 //TX_DTD_THR1_2 200 0x0800 //TX_DTD_THR1_3 201 0x0800 //TX_DTD_THR1_4 202 0x0800 //TX_DTD_THR1_5 203 0x0800 //TX_DTD_THR1_6 204 0x0800 //TX_DTD_THR2_0 205 0x0800 //TX_DTD_THR2_1 206 0x0800 //TX_DTD_THR2_2 207 0x0800 //TX_DTD_THR2_3 208 0x0800 //TX_DTD_THR2_4 209 0x0100 //TX_DTD_THR2_5 210 0x0100 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x03E8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x00C0 //TX_EPD_OFFSET_00 233 0x00C0 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF700 //TX_THR_SN_EST_0 243 0xFB00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xF700 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xF600 //TX_THR_SN_EST_5 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 251 0x0400 //TX_DELTA_THR_SN_EST_1 252 0x0300 //TX_DELTA_THR_SN_EST_2 253 0x0600 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 284 0x0019 //TX_NS_LVL_CTRL_3 285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 303 0x6000 //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x6000 //TX_A_POST_FILT_S_0 315 0x6000 //TX_A_POST_FILT_S_1 316 0x6000 //TX_A_POST_FILT_S_2 317 0x6000 //TX_A_POST_FILT_S_3 318 0x6000 //TX_A_POST_FILT_S_4 319 0x6000 //TX_A_POST_FILT_S_5 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x2000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7CCD //TX_LAMBDA_PFILT_S_0 340 0x7CCD //TX_LAMBDA_PFILT_S_1 341 0x7CCD //TX_LAMBDA_PFILT_S_2 342 0x7CCD //TX_LAMBDA_PFILT_S_3 343 0x7CCD //TX_LAMBDA_PFILT_S_4 344 0x7CCD //TX_LAMBDA_PFILT_S_5 345 0x7CCD //TX_LAMBDA_PFILT_S_6 346 0x7CCD //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0500 //TX_A_PEPPER 349 0x1600 //TX_K_PEPPER_HF 350 0x0400 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 371 0x04B0 //TX_NOISE_TH_2 372 0x3194 //TX_NOISE_TH_3 373 0x0960 //TX_NOISE_TH_4 374 0x5555 //TX_NOISE_TH_5 375 0x3FF4 //TX_NOISE_TH_5_2 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x02BC //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0304 //TX_FDEQ_BIN_2 594 0x0405 //TX_FDEQ_BIN_3 595 0x0607 //TX_FDEQ_BIN_4 596 0x0809 //TX_FDEQ_BIN_5 597 0x0A0B //TX_FDEQ_BIN_6 598 0x0C0D //TX_FDEQ_BIN_7 599 0x0E0F //TX_FDEQ_BIN_8 600 0x1011 //TX_FDEQ_BIN_9 601 0x1214 //TX_FDEQ_BIN_10 602 0x1618 //TX_FDEQ_BIN_11 603 0x1C1C //TX_FDEQ_BIN_12 604 0x2020 //TX_FDEQ_BIN_13 605 0x2020 //TX_FDEQ_BIN_14 606 0x2011 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0E10 //TX_PREEQ_BIN_MIC0_0 642 0x1010 //TX_PREEQ_BIN_MIC0_1 643 0x1010 //TX_PREEQ_BIN_MIC0_2 644 0x1010 //TX_PREEQ_BIN_MIC0_3 645 0x1010 //TX_PREEQ_BIN_MIC0_4 646 0x1010 //TX_PREEQ_BIN_MIC0_5 647 0x1010 //TX_PREEQ_BIN_MIC0_6 648 0x1010 //TX_PREEQ_BIN_MIC0_7 649 0x1010 //TX_PREEQ_BIN_MIC0_8 650 0x1010 //TX_PREEQ_BIN_MIC0_9 651 0x1010 //TX_PREEQ_BIN_MIC0_10 652 0x1010 //TX_PREEQ_BIN_MIC0_11 653 0x1010 //TX_PREEQ_BIN_MIC0_12 654 0x1010 //TX_PREEQ_BIN_MIC0_13 655 0x1010 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0E10 //TX_PREEQ_BIN_MIC1_0 691 0x1010 //TX_PREEQ_BIN_MIC1_1 692 0x1010 //TX_PREEQ_BIN_MIC1_2 693 0x1010 //TX_PREEQ_BIN_MIC1_3 694 0x1010 //TX_PREEQ_BIN_MIC1_4 695 0x1010 //TX_PREEQ_BIN_MIC1_5 696 0x1010 //TX_PREEQ_BIN_MIC1_6 697 0x1010 //TX_PREEQ_BIN_MIC1_7 698 0x1010 //TX_PREEQ_BIN_MIC1_8 699 0x1010 //TX_PREEQ_BIN_MIC1_9 700 0x1010 //TX_PREEQ_BIN_MIC1_10 701 0x1010 //TX_PREEQ_BIN_MIC1_11 702 0x1010 //TX_PREEQ_BIN_MIC1_12 703 0x1010 //TX_PREEQ_BIN_MIC1_13 704 0x1010 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0E10 //TX_PREEQ_BIN_MIC2_0 740 0x1010 //TX_PREEQ_BIN_MIC2_1 741 0x1010 //TX_PREEQ_BIN_MIC2_2 742 0x1010 //TX_PREEQ_BIN_MIC2_3 743 0x1010 //TX_PREEQ_BIN_MIC2_4 744 0x1010 //TX_PREEQ_BIN_MIC2_5 745 0x1010 //TX_PREEQ_BIN_MIC2_6 746 0x1010 //TX_PREEQ_BIN_MIC2_7 747 0x1010 //TX_PREEQ_BIN_MIC2_8 748 0x1010 //TX_PREEQ_BIN_MIC2_9 749 0x1010 //TX_PREEQ_BIN_MIC2_10 750 0x1010 //TX_PREEQ_BIN_MIC2_11 751 0x1010 //TX_PREEQ_BIN_MIC2_12 752 0x1010 //TX_PREEQ_BIN_MIC2_13 753 0x1010 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0060 //TX_MIC_CALIBRATION_0 766 0x0060 //TX_MIC_CALIBRATION_1 767 0x0070 //TX_MIC_CALIBRATION_2 768 0x0070 //TX_MIC_CALIBRATION_3 769 0x0050 //TX_MIC_PWR_BIAS_0 770 0x0040 //TX_MIC_PWR_BIAS_1 771 0x0040 //TX_MIC_PWR_BIAS_2 772 0x0040 //TX_MIC_PWR_BIAS_3 773 0x0009 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x0C00 //TX_TDDRC_ALPHA_UP_01 784 0x0C00 //TX_TDDRC_ALPHA_UP_02 785 0x0C00 //TX_TDDRC_ALPHA_UP_03 786 0x0C00 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0001 //TX_TDDRC_THRD_0 855 0x0001 //TX_TDDRC_THRD_1 856 0x1900 //TX_TDDRC_THRD_2 857 0x1900 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x7B00 //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x07F2 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7B02 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0500 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x000A //RX_NS_LVL_CTRL 23 0xF600 //RX_THR_SN_EST 24 0x7000 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x202C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0004 //RX_SAMPLINGFREQ_SIG 160 0x0004 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7B02 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0500 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x000A //RX_NS_LVL_CTRL 180 0xF600 //RX_THR_SN_EST 181 0x7000 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-RESERVE2-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x2B68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7EFF //TX_A_HP 129 0x4000 //TX_B_PE 130 0x1800 //TX_THR_PITCH_DET_0 131 0x1000 //TX_THR_PITCH_DET_1 132 0x0800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0080 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7000 //TX_EAD_THR 151 0x0800 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x6000 //TX_C_POST_FLT 168 0x7000 //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7800 //TX_DTD_THR1_0 198 0x7000 //TX_DTD_THR1_1 199 0x7FFF //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x7FFF //TX_DTD_THR2_0 205 0x7FFF //TX_DTD_THR2_1 206 0x7FFF //TX_DTD_THR2_2 207 0x7FFF //TX_DTD_THR2_3 208 0x7FFF //TX_DTD_THR2_4 209 0x7FFF //TX_DTD_THR2_5 210 0x7FFF //TX_DTD_THR2_6 211 0x1000 //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0BB8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x00F0 //TX_EPD_OFFSET_00 233 0x00F0 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 246 0xF400 //TX_THR_SN_EST_4 247 0xF400 //TX_THR_SN_EST_5 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 282 0x0011 //TX_NS_LVL_CTRL_1 283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000F //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x7FFF //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x000E //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x1000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7900 //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7B00 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 345 0x7B00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0000 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0800 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x00C8 //TX_NOISE_TH_2 372 0x3A98 //TX_NOISE_TH_3 373 0x0FA0 //TX_NOISE_TH_4 374 0x157C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x044C //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x1013 //TX_FDEQ_BIN_10 602 0x1719 //TX_FDEQ_BIN_11 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 606 0x282C //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4868 //TX_PREEQ_GAIN_MIC0_8 626 0x6860 //TX_PREEQ_GAIN_MIC0_9 627 0x6048 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0E10 //TX_PREEQ_BIN_MIC0_0 642 0x1010 //TX_PREEQ_BIN_MIC0_1 643 0x1010 //TX_PREEQ_BIN_MIC0_2 644 0x1010 //TX_PREEQ_BIN_MIC0_3 645 0x1010 //TX_PREEQ_BIN_MIC0_4 646 0x1010 //TX_PREEQ_BIN_MIC0_5 647 0x1010 //TX_PREEQ_BIN_MIC0_6 648 0x1010 //TX_PREEQ_BIN_MIC0_7 649 0x1010 //TX_PREEQ_BIN_MIC0_8 650 0x1010 //TX_PREEQ_BIN_MIC0_9 651 0x1010 //TX_PREEQ_BIN_MIC0_10 652 0x1010 //TX_PREEQ_BIN_MIC0_11 653 0x1010 //TX_PREEQ_BIN_MIC0_12 654 0x1010 //TX_PREEQ_BIN_MIC0_13 655 0x1010 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0E10 //TX_PREEQ_BIN_MIC1_0 691 0x1010 //TX_PREEQ_BIN_MIC1_1 692 0x1010 //TX_PREEQ_BIN_MIC1_2 693 0x1010 //TX_PREEQ_BIN_MIC1_3 694 0x1010 //TX_PREEQ_BIN_MIC1_4 695 0x1010 //TX_PREEQ_BIN_MIC1_5 696 0x1010 //TX_PREEQ_BIN_MIC1_6 697 0x1010 //TX_PREEQ_BIN_MIC1_7 698 0x1010 //TX_PREEQ_BIN_MIC1_8 699 0x1010 //TX_PREEQ_BIN_MIC1_9 700 0x1010 //TX_PREEQ_BIN_MIC1_10 701 0x1010 //TX_PREEQ_BIN_MIC1_11 702 0x1010 //TX_PREEQ_BIN_MIC1_12 703 0x1010 //TX_PREEQ_BIN_MIC1_13 704 0x1010 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0E10 //TX_PREEQ_BIN_MIC2_0 740 0x1010 //TX_PREEQ_BIN_MIC2_1 741 0x1010 //TX_PREEQ_BIN_MIC2_2 742 0x1010 //TX_PREEQ_BIN_MIC2_3 743 0x1010 //TX_PREEQ_BIN_MIC2_4 744 0x1010 //TX_PREEQ_BIN_MIC2_5 745 0x1010 //TX_PREEQ_BIN_MIC2_6 746 0x1010 //TX_PREEQ_BIN_MIC2_7 747 0x1010 //TX_PREEQ_BIN_MIC2_8 748 0x1010 //TX_PREEQ_BIN_MIC2_9 749 0x1010 //TX_PREEQ_BIN_MIC2_10 750 0x1010 //TX_PREEQ_BIN_MIC2_11 751 0x1010 //TX_PREEQ_BIN_MIC2_12 752 0x1010 //TX_PREEQ_BIN_MIC2_13 753 0x1010 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0062 //TX_MIC_CALIBRATION_0 766 0x0062 //TX_MIC_CALIBRATION_1 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x000C //TX_GAIN_LIMIT_0 774 0x000C //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000C //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0000 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x78D6 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x002C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x1800 //RX_THR_PITCH_DET_0 14 0x1000 //RX_THR_PITCH_DET_1 15 0x0800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0003 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x002C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x1800 //RX_THR_PITCH_DET_0 171 0x1000 //RX_THR_PITCH_DET_1 172 0x0800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0003 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0073 //TX_PATCH_REG 3 0x6F7D //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x00A3 //TX_DIST2REF1 22 0x001B //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x1000 //TX_PGA_0 28 0x1000 //TX_PGA_1 29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0002 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3A66 //TX_DIST2REF_11 73 0x053D //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0CAE //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7652 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 132 0x4000 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x0100 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7A00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x1000 //TX_MIN_EQ_RE_EST_0 153 0x0200 //TX_MIN_EQ_RE_EST_1 154 0x0200 //TX_MIN_EQ_RE_EST_2 155 0x0200 //TX_MIN_EQ_RE_EST_3 156 0x0200 //TX_MIN_EQ_RE_EST_4 157 0x0200 //TX_MIN_EQ_RE_EST_5 158 0x0200 //TX_MIN_EQ_RE_EST_6 159 0x1800 //TX_MIN_EQ_RE_EST_7 160 0x1800 //TX_MIN_EQ_RE_EST_8 161 0x3000 //TX_MIN_EQ_RE_EST_9 162 0x4000 //TX_MIN_EQ_RE_EST_10 163 0x6000 //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x05DC //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x6D60 //TX_DTD_THR1_0 198 0x6D60 //TX_DTD_THR1_1 199 0x6D60 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x157C //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x1000 //TX_ADPT_STRICT_L 222 0x1000 //TX_ADPT_STRICT_H 223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x044C //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x0001 //TX_RATIO_DT_L0_TH 228 0x4000 //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x0118 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xF900 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x7F00 //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0800 //TX_MAINREFRTO_TH_EQ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0017 //TX_NS_LVL_CTRL_1 283 0x0015 //TX_NS_LVL_CTRL_2 284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x000D //TX_MIN_GAIN_S_1 291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 294 0x0010 //TX_MIN_GAIN_S_5 295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x1000 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 303 0x2400 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x2000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x1000 //TX_A_POST_FILT_S_3 318 0x3000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 325 0x5000 //TX_B_POST_FILT_3 326 0x3000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 334 0x6000 //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 340 0x7400 //TX_LAMBDA_PFILT_S_1 341 0x7900 //TX_LAMBDA_PFILT_S_2 342 0x7000 //TX_LAMBDA_PFILT_S_3 343 0x7D00 //TX_LAMBDA_PFILT_S_4 344 0x7D00 //TX_LAMBDA_PFILT_S_5 345 0x7900 //TX_LAMBDA_PFILT_S_6 346 0x7D00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x0FA0 //TX_DT_BINVAD_ENDF 358 0x0400 //TX_C_POST_FLT_DT 359 0x4000 //TX_NS_B_POST_FLT_LESSCUT 360 0x0120 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT 367 0x0050 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x03ED //TX_NOISE_TH_2 372 0x2EE0 //TX_NOISE_TH_3 373 0x5528 //TX_NOISE_TH_4 374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 379 0x000A //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x7000 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x000A //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x007A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x5000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x0000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x7FFF //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0x3000 //TX_DEREVERB_LF_MU 515 0x34CD //TX_DEREVERB_HF_MU 516 0x0007 //TX_DEREVERB_DELAY 517 0x0004 //TX_DEREVERB_COEF_LEN 518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x3A98 //TX_GSC_RTOL_TH 522 0x3A98 //TX_GSC_RTOH_TH 523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM 567 0x5654 //TX_FDEQ_GAIN_0 568 0x4E4B //TX_FDEQ_GAIN_1 569 0x4D4E //TX_FDEQ_GAIN_2 570 0x4D4B //TX_FDEQ_GAIN_3 571 0x3C3C //TX_FDEQ_GAIN_4 572 0x3C48 //TX_FDEQ_GAIN_5 573 0x4843 //TX_FDEQ_GAIN_6 574 0x3E3B //TX_FDEQ_GAIN_7 575 0x302F //TX_FDEQ_GAIN_8 576 0x3333 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D08 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0014 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0202 //TX_PREEQ_BIN_MIC0_0 642 0x0203 //TX_PREEQ_BIN_MIC0_1 643 0x0303 //TX_PREEQ_BIN_MIC0_2 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x494A //TX_PREEQ_GAIN_MIC1_6 673 0x4B4E //TX_PREEQ_GAIN_MIC1_7 674 0x4F50 //TX_PREEQ_GAIN_MIC1_8 675 0x5255 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 696 0x0708 //TX_PREEQ_BIN_MIC1_6 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0202 //TX_PREEQ_BIN_MIC2_0 740 0x0203 //TX_PREEQ_BIN_MIC2_1 741 0x0303 //TX_PREEQ_BIN_MIC2_2 742 0x0304 //TX_PREEQ_BIN_MIC2_3 743 0x0405 //TX_PREEQ_BIN_MIC2_4 744 0x0506 //TX_PREEQ_BIN_MIC2_5 745 0x0708 //TX_PREEQ_BIN_MIC2_6 746 0x090A //TX_PREEQ_BIN_MIC2_7 747 0x0B0C //TX_PREEQ_BIN_MIC2_8 748 0x0D0E //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0065 //TX_MIC_CALIBRATION_0 766 0x0065 //TX_MIC_CALIBRATION_1 767 0x0065 //TX_MIC_CALIBRATION_2 768 0x0065 //TX_MIC_CALIBRATION_3 769 0x0044 //TX_MIC_PWR_BIAS_0 770 0x0044 //TX_MIC_PWR_BIAS_1 771 0x0044 //TX_MIC_PWR_BIAS_2 772 0x0044 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x4000 //TX_TDDRC_ALPHA_UP_01 784 0x4000 //TX_TDDRC_ALPHA_UP_02 785 0x4000 //TX_TDDRC_ALPHA_UP_03 786 0x4000 //TX_TDDRC_ALPHA_UP_04 787 0x6000 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0006 //TX_DEADMIC_SILENCE_TH 817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0096 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0004 //TX_TDDRC_THRD_0 855 0x0010 //TX_TDDRC_THRD_1 856 0x1000 //TX_TDDRC_THRD_2 857 0x1200 //TX_TDDRC_THRD_3 858 0x6000 //TX_TDDRC_SLANT_0 859 0x6000 //TX_TDDRC_SLANT_1 860 0x4000 //TX_TDDRC_ALPHA_UP_00 861 0x6000 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x0FDA //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x1000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0208 //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x7E90 //TX_DTD_THR1_MICMUTE_0 912 0x7BD4 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x4000 //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x00C0 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x7FFF //TX_MIC1MUTE_RATIO_THR 940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0100 //TX_AMS_RESRV_01 944 0x1B58 //TX_AMS_RESRV_02 945 0x6590 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0xA02C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x3800 //RX_THR_PITCH_DET_0 14 0x3000 //RX_THR_PITCH_DET_1 15 0x2800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0xA02C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x3800 //RX_THR_PITCH_DET_0 171 0x3000 //RX_THR_PITCH_DET_1 172 0x2800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0073 //TX_PATCH_REG 3 0x6F7D //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x00A3 //TX_DIST2REF1 22 0x001B //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x1000 //TX_PGA_0 28 0x1000 //TX_PGA_1 29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0002 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3A66 //TX_DIST2REF_11 73 0x053D //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0C00 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7B02 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 132 0x4000 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x0300 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x6800 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x1F80 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0200 //TX_MIN_EQ_RE_EST_2 155 0x0200 //TX_MIN_EQ_RE_EST_3 156 0x0200 //TX_MIN_EQ_RE_EST_4 157 0x0200 //TX_MIN_EQ_RE_EST_5 158 0x0200 //TX_MIN_EQ_RE_EST_6 159 0x1000 //TX_MIN_EQ_RE_EST_7 160 0x1000 //TX_MIN_EQ_RE_EST_8 161 0x1000 //TX_MIN_EQ_RE_EST_9 162 0x1000 //TX_MIN_EQ_RE_EST_10 163 0x1000 //TX_MIN_EQ_RE_EST_11 164 0x1000 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x5000 //TX_GAIN_NP 169 0x02A0 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x06B0 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x765C //TX_DTD_THR1_0 198 0x765C //TX_DTD_THR1_1 199 0x765C //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 204 0x5000 //TX_DTD_THR2_0 205 0x5000 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 209 0x5000 //TX_DTD_THR2_5 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x07D0 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H 223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x0154 //TX_RATIO_DT_L_TH_HIGH 226 0x4588 //TX_RATIO_DT_H_TH_HIGH 227 0x0001 //TX_RATIO_DT_L0_TH 228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x0258 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0018 //TX_NS_LVL_CTRL_2 284 0x0016 //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 293 0x0010 //TX_MIN_GAIN_S_4 294 0x0010 //TX_MIN_GAIN_S_5 295 0x0010 //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x6000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x4000 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x50C0 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 315 0x4C00 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x6000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 341 0x7A00 //TX_LAMBDA_PFILT_S_2 342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 346 0x7C00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x4000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0180 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT 367 0x0032 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x017E //TX_NOISE_TH_1 371 0x0230 //TX_NOISE_TH_2 372 0x3492 //TX_NOISE_TH_3 373 0x4E20 //TX_NOISE_TH_4 374 0x55B8 //TX_NOISE_TH_5 375 0x49E6 //TX_NOISE_TH_5_2 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x7999 //TX_RATIODTL_CUT_TH 383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x7FFF //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0005 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x0033 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x0000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x4000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0x3000 //TX_DEREVERB_LF_MU 515 0x34CD //TX_DEREVERB_HF_MU 516 0x0007 //TX_DEREVERB_DELAY 517 0x0004 //TX_DEREVERB_COEF_LEN 518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x3A98 //TX_GSC_RTOL_TH 522 0x3A98 //TX_GSC_RTOH_TH 523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x001C //TX_FDEQ_SUBNUM 567 0x5448 //TX_FDEQ_GAIN_0 568 0x4847 //TX_FDEQ_GAIN_1 569 0x4C4E //TX_FDEQ_GAIN_2 570 0x4E49 //TX_FDEQ_GAIN_3 571 0x4440 //TX_FDEQ_GAIN_4 572 0x484E //TX_FDEQ_GAIN_5 573 0x4F53 //TX_FDEQ_GAIN_6 574 0x544C //TX_FDEQ_GAIN_7 575 0x4547 //TX_FDEQ_GAIN_8 576 0x4542 //TX_FDEQ_GAIN_9 577 0x383A //TX_FDEQ_GAIN_10 578 0x3C40 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x0E0F //TX_FDEQ_BIN_10 602 0x0F10 //TX_FDEQ_BIN_11 603 0x1011 //TX_FDEQ_BIN_12 604 0x1104 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0202 //TX_PREEQ_BIN_MIC0_0 642 0x0203 //TX_PREEQ_BIN_MIC0_1 643 0x0303 //TX_PREEQ_BIN_MIC0_2 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0F10 //TX_PREEQ_BIN_MIC0_10 652 0x1011 //TX_PREEQ_BIN_MIC0_11 653 0x1104 //TX_PREEQ_BIN_MIC0_12 654 0x101B //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x494A //TX_PREEQ_GAIN_MIC1_6 673 0x4B4E //TX_PREEQ_GAIN_MIC1_7 674 0x4F50 //TX_PREEQ_GAIN_MIC1_8 675 0x5254 //TX_PREEQ_GAIN_MIC1_9 676 0x5659 //TX_PREEQ_GAIN_MIC1_10 677 0x5C5E //TX_PREEQ_GAIN_MIC1_11 678 0x6265 //TX_PREEQ_GAIN_MIC1_12 679 0x6970 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 696 0x0708 //TX_PREEQ_BIN_MIC1_6 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0F10 //TX_PREEQ_BIN_MIC1_10 701 0x1011 //TX_PREEQ_BIN_MIC1_11 702 0x1104 //TX_PREEQ_BIN_MIC1_12 703 0x101B //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4746 //TX_PREEQ_GAIN_MIC2_14 730 0x4544 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0608 //TX_PREEQ_BIN_MIC2_0 740 0x0808 //TX_PREEQ_BIN_MIC2_1 741 0x0808 //TX_PREEQ_BIN_MIC2_2 742 0x0808 //TX_PREEQ_BIN_MIC2_3 743 0x0808 //TX_PREEQ_BIN_MIC2_4 744 0x0808 //TX_PREEQ_BIN_MIC2_5 745 0x0808 //TX_PREEQ_BIN_MIC2_6 746 0x0808 //TX_PREEQ_BIN_MIC2_7 747 0x0808 //TX_PREEQ_BIN_MIC2_8 748 0x0808 //TX_PREEQ_BIN_MIC2_9 749 0x0808 //TX_PREEQ_BIN_MIC2_10 750 0x0808 //TX_PREEQ_BIN_MIC2_11 751 0x0808 //TX_PREEQ_BIN_MIC2_12 752 0x0808 //TX_PREEQ_BIN_MIC2_13 753 0x0808 //TX_PREEQ_BIN_MIC2_14 754 0x020E //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0062 //TX_MIC_CALIBRATION_0 766 0x0062 //TX_MIC_CALIBRATION_1 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x0800 //TX_TDDRC_ALPHA_UP_01 784 0x0800 //TX_TDDRC_ALPHA_UP_02 785 0x0800 //TX_TDDRC_ALPHA_UP_03 786 0x0800 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0006 //TX_DEADMIC_SILENCE_TH 817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0096 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0001 //TX_TDDRC_THRD_0 855 0x0002 //TX_TDDRC_THRD_1 856 0x1000 //TX_TDDRC_THRD_2 857 0x1200 //TX_TDDRC_THRD_3 858 0x6000 //TX_TDDRC_SLANT_0 859 0x6000 //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x10CA //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x028A //TX_MICMUTE_RATIO_THR 900 0x026C //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x7148 //TX_DTD_THR1_MICMUTE_0 912 0x7FFF //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x3A98 //TX_DTD_THR1_MICMUTE_3 915 0x4000 //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0100 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x7FFF //TX_MIC1MUTE_RATIO_THR 940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0100 //TX_AMS_RESRV_01 944 0x3A98 //TX_AMS_RESRV_02 945 0x7000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0xA02C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x3800 //RX_THR_PITCH_DET_0 14 0x3000 //RX_THR_PITCH_DET_1 15 0x2800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0xA02C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0001 //RX_SAMPLINGFREQ_SIG 160 0x0001 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x4000 //RX_B_PE 170 0x3800 //RX_THR_PITCH_DET_0 171 0x3000 //RX_THR_PITCH_DET_1 172 0x2800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x00F3 //TX_PATCH_REG 3 0x6F7D //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x00A3 //TX_DIST2REF1 22 0x001B //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x1000 //TX_PGA_0 28 0x1000 //TX_PGA_1 29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0002 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3B33 //TX_DIST2REF_11 73 0x0A70 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0CAE //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7B02 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 132 0x4000 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x0400 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7600 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x1000 //TX_MIN_EQ_RE_EST_0 153 0x0600 //TX_MIN_EQ_RE_EST_1 154 0x3000 //TX_MIN_EQ_RE_EST_2 155 0x3000 //TX_MIN_EQ_RE_EST_3 156 0x3000 //TX_MIN_EQ_RE_EST_4 157 0x3000 //TX_MIN_EQ_RE_EST_5 158 0x3000 //TX_MIN_EQ_RE_EST_6 159 0x1000 //TX_MIN_EQ_RE_EST_7 160 0x7800 //TX_MIN_EQ_RE_EST_8 161 0x7800 //TX_MIN_EQ_RE_EST_9 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 165 0x3000 //TX_LAMBDA_RE_EST 166 0x3000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0270 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x0880 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7148 //TX_DTD_THR1_0 198 0x7148 //TX_DTD_THR1_1 199 0x7148 //TX_DTD_THR1_2 200 0x7148 //TX_DTD_THR1_3 201 0x7148 //TX_DTD_THR1_4 202 0x7700 //TX_DTD_THR1_5 203 0x7148 //TX_DTD_THR1_6 204 0x7E00 //TX_DTD_THR2_0 205 0x7E00 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 209 0x5000 //TX_DTD_THR2_5 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x1770 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x7FFF //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H 223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x02BC //TX_RATIO_DT_L_TH_HIGH 226 0x5208 //TX_RATIO_DT_H_TH_HIGH 227 0x0001 //TX_RATIO_DT_L0_TH 228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x0190 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 253 0x0000 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x001A //TX_NS_LVL_CTRL_1 283 0x0024 //TX_NS_LVL_CTRL_2 284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x0020 //TX_MIN_GAIN_S_0 290 0x0020 //TX_MIN_GAIN_S_1 291 0x0020 //TX_MIN_GAIN_S_2 292 0x0020 //TX_MIN_GAIN_S_3 293 0x0020 //TX_MIN_GAIN_S_4 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 296 0x0020 //TX_MIN_GAIN_S_7 297 0x6000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x4000 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7FFF //TX_A_POST_FILT_S_0 315 0x7FFF //TX_A_POST_FILT_S_1 316 0x7FFF //TX_A_POST_FILT_S_2 317 0x7FFF //TX_A_POST_FILT_S_3 318 0x7FFF //TX_A_POST_FILT_S_4 319 0x7FFF //TX_A_POST_FILT_S_5 320 0x7FFF //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7F00 //TX_LAMBDA_PFILT 339 0x7F00 //TX_LAMBDA_PFILT_S_0 340 0x7F00 //TX_LAMBDA_PFILT_S_1 341 0x7F00 //TX_LAMBDA_PFILT_S_2 342 0x7F00 //TX_LAMBDA_PFILT_S_3 343 0x7F00 //TX_LAMBDA_PFILT_S_4 344 0x7F00 //TX_LAMBDA_PFILT_S_5 345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7F00 //TX_LAMBDA_PFILT_S_7 347 0x1000 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0040 //TX_DT_BINVAD_TH_0 354 0x0040 //TX_DT_BINVAD_TH_1 355 0x0100 //TX_DT_BINVAD_TH_2 356 0x0100 //TX_DT_BINVAD_TH_3 357 0x36B0 //TX_DT_BINVAD_ENDF 358 0x0200 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0140 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT 367 0x0050 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x01F4 //TX_NOISE_TH_2 372 0x36B0 //TX_NOISE_TH_3 373 0x2710 //TX_NOISE_TH_4 374 0x2CEC //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 379 0x0050 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x07D0 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0005 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x0050 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x0000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x2000 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x4000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0x3000 //TX_DEREVERB_LF_MU 515 0x34CD //TX_DEREVERB_HF_MU 516 0x0007 //TX_DEREVERB_DELAY 517 0x0004 //TX_DEREVERB_COEF_LEN 518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x3A98 //TX_GSC_RTOL_TH 522 0x3A98 //TX_GSC_RTOH_TH 523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4850 //TX_FDEQ_GAIN_5 573 0x5261 //TX_FDEQ_GAIN_6 574 0x5C4C //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 576 0x484C //TX_FDEQ_GAIN_9 577 0x4E50 //TX_FDEQ_GAIN_10 578 0x5355 //TX_FDEQ_GAIN_11 579 0x5B5F //TX_FDEQ_GAIN_12 580 0x5F84 //TX_FDEQ_GAIN_13 581 0x8476 //TX_FDEQ_GAIN_14 582 0x6A71 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x1013 //TX_FDEQ_BIN_10 602 0x1719 //TX_FDEQ_BIN_11 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 606 0x284A //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0202 //TX_PREEQ_BIN_MIC0_0 642 0x0203 //TX_PREEQ_BIN_MIC0_1 643 0x0303 //TX_PREEQ_BIN_MIC0_2 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1719 //TX_PREEQ_BIN_MIC0_11 653 0x1B1E //TX_PREEQ_BIN_MIC0_12 654 0x1E1E //TX_PREEQ_BIN_MIC0_13 655 0x1E28 //TX_PREEQ_BIN_MIC0_14 656 0x3042 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x494A //TX_PREEQ_GAIN_MIC1_6 673 0x494A //TX_PREEQ_GAIN_MIC1_7 674 0x4B4C //TX_PREEQ_GAIN_MIC1_8 675 0x4D4E //TX_PREEQ_GAIN_MIC1_9 676 0x4F52 //TX_PREEQ_GAIN_MIC1_10 677 0x5458 //TX_PREEQ_GAIN_MIC1_11 678 0x5B62 //TX_PREEQ_GAIN_MIC1_12 679 0x6A66 //TX_PREEQ_GAIN_MIC1_13 680 0x543E //TX_PREEQ_GAIN_MIC1_14 681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 696 0x0708 //TX_PREEQ_BIN_MIC1_6 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x1013 //TX_PREEQ_BIN_MIC1_10 701 0x1719 //TX_PREEQ_BIN_MIC1_11 702 0x1B1E //TX_PREEQ_BIN_MIC1_12 703 0x1E1E //TX_PREEQ_BIN_MIC1_13 704 0x1E28 //TX_PREEQ_BIN_MIC1_14 705 0x3042 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4644 //TX_PREEQ_GAIN_MIC2_12 728 0x4240 //TX_PREEQ_GAIN_MIC2_13 729 0x4041 //TX_PREEQ_GAIN_MIC2_14 730 0x455E //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0202 //TX_PREEQ_BIN_MIC2_0 740 0x0203 //TX_PREEQ_BIN_MIC2_1 741 0x0303 //TX_PREEQ_BIN_MIC2_2 742 0x0304 //TX_PREEQ_BIN_MIC2_3 743 0x0405 //TX_PREEQ_BIN_MIC2_4 744 0x0506 //TX_PREEQ_BIN_MIC2_5 745 0x0708 //TX_PREEQ_BIN_MIC2_6 746 0x090A //TX_PREEQ_BIN_MIC2_7 747 0x0B0C //TX_PREEQ_BIN_MIC2_8 748 0x0D0E //TX_PREEQ_BIN_MIC2_9 749 0x1013 //TX_PREEQ_BIN_MIC2_10 750 0x1719 //TX_PREEQ_BIN_MIC2_11 751 0x1B1E //TX_PREEQ_BIN_MIC2_12 752 0x1E1E //TX_PREEQ_BIN_MIC2_13 753 0x1E28 //TX_PREEQ_BIN_MIC2_14 754 0x363C //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0050 //TX_MIC_CALIBRATION_0 766 0x0065 //TX_MIC_CALIBRATION_1 767 0x0050 //TX_MIC_CALIBRATION_2 768 0x0050 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x0800 //TX_TDDRC_ALPHA_UP_01 784 0x0800 //TX_TDDRC_ALPHA_UP_02 785 0x0800 //TX_TDDRC_ALPHA_UP_03 786 0x0800 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0006 //TX_DEADMIC_SILENCE_TH 817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0096 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0001 //TX_TDDRC_THRD_0 855 0x0002 //TX_TDDRC_THRD_1 856 0x1000 //TX_TDDRC_THRD_2 857 0x1000 //TX_TDDRC_THRD_3 858 0x6000 //TX_TDDRC_SLANT_0 859 0x6000 //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x1380 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2379 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x02A8 //TX_MICMUTE_RATIO_THR 900 0x02A8 //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x7D64 //TX_DTD_THR1_MICMUTE_0 912 0x76C0 //TX_DTD_THR1_MICMUTE_1 913 0x7530 //TX_DTD_THR1_MICMUTE_2 914 0x7F58 //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0260 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x7FFF //TX_MIC1MUTE_RATIO_THR 940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0100 //TX_AMS_RESRV_01 944 0x32C8 //TX_AMS_RESRV_02 945 0x5DC0 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x1800 //RX_THR_PITCH_DET_0 14 0x1000 //RX_THR_PITCH_DET_1 15 0x0800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0003 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x002C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x1800 //RX_THR_PITCH_DET_0 171 0x1000 //RX_THR_PITCH_DET_1 172 0x0800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0003 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x4B7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x00A4 //TX_DIST2REF1 22 0x0017 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0FF7 //TX_PGA_0 28 0x0FF7 //TX_PGA_1 29 0x0FF7 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0002 //TX_MIC_DATA_SRC0 42 0x0000 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3B33 //TX_DIST2REF_11 73 0x0A70 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0CAE //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7E56 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x1800 //TX_THR_PITCH_DET_0 131 0x1000 //TX_THR_PITCH_DET_1 132 0x0800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x0300 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7A00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x2000 //TX_MIN_EQ_RE_EST_1 154 0x2000 //TX_MIN_EQ_RE_EST_2 155 0x4000 //TX_MIN_EQ_RE_EST_3 156 0x4000 //TX_MIN_EQ_RE_EST_4 157 0x7FFF //TX_MIN_EQ_RE_EST_5 158 0x7FFF //TX_MIN_EQ_RE_EST_6 159 0x7FFF //TX_MIN_EQ_RE_EST_7 160 0x7FFF //TX_MIN_EQ_RE_EST_8 161 0x7FFF //TX_MIN_EQ_RE_EST_9 162 0x7FFF //TX_MIN_EQ_RE_EST_10 163 0x7FFF //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x0CCD //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x09C4 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7D00 //TX_DTD_THR1_0 198 0x7FF0 //TX_DTD_THR1_1 199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0DAC //TX_DT_CUT_K 214 0x0020 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x7FFF //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x2000 //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0018 //TX_NS_LVL_CTRL_2 284 0x0016 //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 293 0x0010 //TX_MIN_GAIN_S_4 294 0x0010 //TX_MIN_GAIN_S_5 295 0x0010 //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x6000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x4000 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x50C0 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 315 0x4C00 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x6000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 341 0x7A00 //TX_LAMBDA_PFILT_S_2 342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 346 0x7C00 //TX_LAMBDA_PFILT_S_7 347 0x0000 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0200 //TX_DT_BINVAD_TH_0 354 0x0200 //TX_DT_BINVAD_TH_1 355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0200 //TX_DT_BINVAD_TH_3 357 0x1F40 //TX_DT_BINVAD_ENDF 358 0x0100 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT 367 0x0050 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x0DAC //TX_NOISE_TH_2 372 0x4E20 //TX_NOISE_TH_3 373 0x4E20 //TX_NOISE_TH_4 374 0x59D8 //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x7999 //TX_RATIODTL_CUT_TH 383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x0033 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x2000 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x7FFF //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0x3000 //TX_DEREVERB_LF_MU 515 0x34CD //TX_DEREVERB_HF_MU 516 0x0007 //TX_DEREVERB_DELAY 517 0x0004 //TX_DEREVERB_COEF_LEN 518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x3A98 //TX_GSC_RTOL_TH 522 0x3A98 //TX_GSC_RTOH_TH 523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4853 //TX_FDEQ_GAIN_9 577 0x5450 //TX_FDEQ_GAIN_10 578 0x7465 //TX_FDEQ_GAIN_11 579 0x807F //TX_FDEQ_GAIN_12 580 0x82C4 //TX_FDEQ_GAIN_13 581 0xC4C4 //TX_FDEQ_GAIN_14 582 0xC4C4 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0304 //TX_FDEQ_BIN_2 594 0x0405 //TX_FDEQ_BIN_3 595 0x0607 //TX_FDEQ_BIN_4 596 0x0809 //TX_FDEQ_BIN_5 597 0x0A0B //TX_FDEQ_BIN_6 598 0x0C0D //TX_FDEQ_BIN_7 599 0x0E0F //TX_FDEQ_BIN_8 600 0x1011 //TX_FDEQ_BIN_9 601 0x1214 //TX_FDEQ_BIN_10 602 0x1618 //TX_FDEQ_BIN_11 603 0x1C1C //TX_FDEQ_BIN_12 604 0x2020 //TX_FDEQ_BIN_13 605 0x2020 //TX_FDEQ_BIN_14 606 0x2011 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 625 0x5456 //TX_PREEQ_GAIN_MIC0_8 626 0x585C //TX_PREEQ_GAIN_MIC0_9 627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 628 0x7478 //TX_PREEQ_GAIN_MIC0_11 629 0x705C //TX_PREEQ_GAIN_MIC0_12 630 0x4838 //TX_PREEQ_GAIN_MIC0_13 631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0202 //TX_PREEQ_BIN_MIC0_0 642 0x0203 //TX_PREEQ_BIN_MIC0_1 643 0x0303 //TX_PREEQ_BIN_MIC0_2 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x0909 //TX_PREEQ_BIN_MIC0_7 649 0x090B //TX_PREEQ_BIN_MIC0_8 650 0x0C10 //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1414 //TX_PREEQ_BIN_MIC0_11 653 0x1414 //TX_PREEQ_BIN_MIC0_12 654 0x1C1E //TX_PREEQ_BIN_MIC0_13 655 0x1E28 //TX_PREEQ_BIN_MIC0_14 656 0x462C //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0030 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x1812 //TX_PREEQ_BIN_MIC1_0 691 0x0A0A //TX_PREEQ_BIN_MIC1_1 692 0x0808 //TX_PREEQ_BIN_MIC1_2 693 0x080A //TX_PREEQ_BIN_MIC1_3 694 0x0B09 //TX_PREEQ_BIN_MIC1_4 695 0x0A06 //TX_PREEQ_BIN_MIC1_5 696 0x0606 //TX_PREEQ_BIN_MIC1_6 697 0x0605 //TX_PREEQ_BIN_MIC1_7 698 0x050A //TX_PREEQ_BIN_MIC1_8 699 0x1505 //TX_PREEQ_BIN_MIC1_9 700 0x0506 //TX_PREEQ_BIN_MIC1_10 701 0x0615 //TX_PREEQ_BIN_MIC1_11 702 0x1516 //TX_PREEQ_BIN_MIC1_12 703 0x2021 //TX_PREEQ_BIN_MIC1_13 704 0x2021 //TX_PREEQ_BIN_MIC1_14 705 0x2021 //TX_PREEQ_BIN_MIC1_15 706 0x0800 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0E10 //TX_PREEQ_BIN_MIC2_0 740 0x1010 //TX_PREEQ_BIN_MIC2_1 741 0x1010 //TX_PREEQ_BIN_MIC2_2 742 0x1010 //TX_PREEQ_BIN_MIC2_3 743 0x1010 //TX_PREEQ_BIN_MIC2_4 744 0x1010 //TX_PREEQ_BIN_MIC2_5 745 0x1010 //TX_PREEQ_BIN_MIC2_6 746 0x1010 //TX_PREEQ_BIN_MIC2_7 747 0x1010 //TX_PREEQ_BIN_MIC2_8 748 0x1010 //TX_PREEQ_BIN_MIC2_9 749 0x1010 //TX_PREEQ_BIN_MIC2_10 750 0x1010 //TX_PREEQ_BIN_MIC2_11 751 0x1010 //TX_PREEQ_BIN_MIC2_12 752 0x1010 //TX_PREEQ_BIN_MIC2_13 753 0x1010 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0060 //TX_MIC_CALIBRATION_0 766 0x0060 //TX_MIC_CALIBRATION_1 767 0x0070 //TX_MIC_CALIBRATION_2 768 0x0070 //TX_MIC_CALIBRATION_3 769 0x0050 //TX_MIC_PWR_BIAS_0 770 0x0040 //TX_MIC_PWR_BIAS_1 771 0x0040 //TX_MIC_PWR_BIAS_2 772 0x0040 //TX_MIC_PWR_BIAS_3 773 0x0009 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x0C00 //TX_TDDRC_ALPHA_UP_01 784 0x0C00 //TX_TDDRC_ALPHA_UP_02 785 0x0C00 //TX_TDDRC_ALPHA_UP_03 786 0x0C00 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0010 //TX_DEADMIC_SILENCE_TH 817 0x0600 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0096 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0004 //TX_FILTINDX 854 0x0004 //TX_TDDRC_THRD_0 855 0x0016 //TX_TDDRC_THRD_1 856 0x1900 //TX_TDDRC_THRD_2 857 0x1900 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x7B00 //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x0A98 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x1000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7B02 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0500 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x000A //RX_NS_LVL_CTRL 23 0xF600 //RX_THR_SN_EST 24 0x7000 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x202C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0004 //RX_SAMPLINGFREQ_SIG 160 0x0004 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7B02 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0500 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x000A //RX_NS_LVL_CTRL 180 0xF600 //RX_THR_SN_EST 181 0x7000 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-RESERVE2-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x00F3 //TX_PATCH_REG 3 0x6F7D //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x00A3 //TX_DIST2REF1 22 0x001B //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x1000 //TX_PGA_0 28 0x1000 //TX_PGA_1 29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0002 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3B33 //TX_DIST2REF_11 73 0x0A70 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0CAE //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7B02 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 132 0x4000 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x0400 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7600 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x1000 //TX_MIN_EQ_RE_EST_0 153 0x0600 //TX_MIN_EQ_RE_EST_1 154 0x3000 //TX_MIN_EQ_RE_EST_2 155 0x3000 //TX_MIN_EQ_RE_EST_3 156 0x3000 //TX_MIN_EQ_RE_EST_4 157 0x3000 //TX_MIN_EQ_RE_EST_5 158 0x3000 //TX_MIN_EQ_RE_EST_6 159 0x1000 //TX_MIN_EQ_RE_EST_7 160 0x7800 //TX_MIN_EQ_RE_EST_8 161 0x7800 //TX_MIN_EQ_RE_EST_9 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 165 0x3000 //TX_LAMBDA_RE_EST 166 0x3000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0270 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x0880 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7148 //TX_DTD_THR1_0 198 0x7148 //TX_DTD_THR1_1 199 0x7148 //TX_DTD_THR1_2 200 0x7148 //TX_DTD_THR1_3 201 0x7148 //TX_DTD_THR1_4 202 0x7700 //TX_DTD_THR1_5 203 0x7148 //TX_DTD_THR1_6 204 0x7E00 //TX_DTD_THR2_0 205 0x7E00 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 209 0x5000 //TX_DTD_THR2_5 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x1770 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x7FFF //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H 223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x02BC //TX_RATIO_DT_L_TH_HIGH 226 0x5208 //TX_RATIO_DT_H_TH_HIGH 227 0x0001 //TX_RATIO_DT_L0_TH 228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x0190 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 253 0x0000 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x001A //TX_NS_LVL_CTRL_1 283 0x0024 //TX_NS_LVL_CTRL_2 284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x0020 //TX_MIN_GAIN_S_0 290 0x0020 //TX_MIN_GAIN_S_1 291 0x0020 //TX_MIN_GAIN_S_2 292 0x0020 //TX_MIN_GAIN_S_3 293 0x0020 //TX_MIN_GAIN_S_4 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 296 0x0020 //TX_MIN_GAIN_S_7 297 0x6000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x4000 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7FFF //TX_A_POST_FILT_S_0 315 0x7FFF //TX_A_POST_FILT_S_1 316 0x7FFF //TX_A_POST_FILT_S_2 317 0x7FFF //TX_A_POST_FILT_S_3 318 0x7FFF //TX_A_POST_FILT_S_4 319 0x7FFF //TX_A_POST_FILT_S_5 320 0x7FFF //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7F00 //TX_LAMBDA_PFILT 339 0x7F00 //TX_LAMBDA_PFILT_S_0 340 0x7F00 //TX_LAMBDA_PFILT_S_1 341 0x7F00 //TX_LAMBDA_PFILT_S_2 342 0x7F00 //TX_LAMBDA_PFILT_S_3 343 0x7F00 //TX_LAMBDA_PFILT_S_4 344 0x7F00 //TX_LAMBDA_PFILT_S_5 345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7F00 //TX_LAMBDA_PFILT_S_7 347 0x1000 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0040 //TX_DT_BINVAD_TH_0 354 0x0040 //TX_DT_BINVAD_TH_1 355 0x0100 //TX_DT_BINVAD_TH_2 356 0x0100 //TX_DT_BINVAD_TH_3 357 0x36B0 //TX_DT_BINVAD_ENDF 358 0x0200 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0140 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT 367 0x0050 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x01F4 //TX_NOISE_TH_2 372 0x36B0 //TX_NOISE_TH_3 373 0x2710 //TX_NOISE_TH_4 374 0x2CEC //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 379 0x0050 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x07D0 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0005 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x0050 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x0000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x2000 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x4000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0x3000 //TX_DEREVERB_LF_MU 515 0x34CD //TX_DEREVERB_HF_MU 516 0x0007 //TX_DEREVERB_DELAY 517 0x0004 //TX_DEREVERB_COEF_LEN 518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x3A98 //TX_GSC_RTOL_TH 522 0x3A98 //TX_GSC_RTOH_TH 523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0064 //TX_DR_RESRV_5 525 0x1000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4850 //TX_FDEQ_GAIN_5 573 0x5261 //TX_FDEQ_GAIN_6 574 0x5C4C //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 576 0x484C //TX_FDEQ_GAIN_9 577 0x4E50 //TX_FDEQ_GAIN_10 578 0x5355 //TX_FDEQ_GAIN_11 579 0x5B5F //TX_FDEQ_GAIN_12 580 0x5F84 //TX_FDEQ_GAIN_13 581 0x8476 //TX_FDEQ_GAIN_14 582 0x6A71 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x1013 //TX_FDEQ_BIN_10 602 0x1719 //TX_FDEQ_BIN_11 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 606 0x284A //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0202 //TX_PREEQ_BIN_MIC0_0 642 0x0203 //TX_PREEQ_BIN_MIC0_1 643 0x0303 //TX_PREEQ_BIN_MIC0_2 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1719 //TX_PREEQ_BIN_MIC0_11 653 0x1B1E //TX_PREEQ_BIN_MIC0_12 654 0x1E1E //TX_PREEQ_BIN_MIC0_13 655 0x1E28 //TX_PREEQ_BIN_MIC0_14 656 0x3042 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x494A //TX_PREEQ_GAIN_MIC1_6 673 0x494A //TX_PREEQ_GAIN_MIC1_7 674 0x4B4C //TX_PREEQ_GAIN_MIC1_8 675 0x4D4E //TX_PREEQ_GAIN_MIC1_9 676 0x4F52 //TX_PREEQ_GAIN_MIC1_10 677 0x5458 //TX_PREEQ_GAIN_MIC1_11 678 0x5B62 //TX_PREEQ_GAIN_MIC1_12 679 0x6A66 //TX_PREEQ_GAIN_MIC1_13 680 0x543E //TX_PREEQ_GAIN_MIC1_14 681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 696 0x0708 //TX_PREEQ_BIN_MIC1_6 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x1013 //TX_PREEQ_BIN_MIC1_10 701 0x1719 //TX_PREEQ_BIN_MIC1_11 702 0x1B1E //TX_PREEQ_BIN_MIC1_12 703 0x1E1E //TX_PREEQ_BIN_MIC1_13 704 0x1E28 //TX_PREEQ_BIN_MIC1_14 705 0x3042 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4644 //TX_PREEQ_GAIN_MIC2_12 728 0x4240 //TX_PREEQ_GAIN_MIC2_13 729 0x4041 //TX_PREEQ_GAIN_MIC2_14 730 0x455E //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0202 //TX_PREEQ_BIN_MIC2_0 740 0x0203 //TX_PREEQ_BIN_MIC2_1 741 0x0303 //TX_PREEQ_BIN_MIC2_2 742 0x0304 //TX_PREEQ_BIN_MIC2_3 743 0x0405 //TX_PREEQ_BIN_MIC2_4 744 0x0506 //TX_PREEQ_BIN_MIC2_5 745 0x0708 //TX_PREEQ_BIN_MIC2_6 746 0x090A //TX_PREEQ_BIN_MIC2_7 747 0x0B0C //TX_PREEQ_BIN_MIC2_8 748 0x0D0E //TX_PREEQ_BIN_MIC2_9 749 0x1013 //TX_PREEQ_BIN_MIC2_10 750 0x1719 //TX_PREEQ_BIN_MIC2_11 751 0x1B1E //TX_PREEQ_BIN_MIC2_12 752 0x1E1E //TX_PREEQ_BIN_MIC2_13 753 0x1E28 //TX_PREEQ_BIN_MIC2_14 754 0x363C //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0050 //TX_MIC_CALIBRATION_0 766 0x0065 //TX_MIC_CALIBRATION_1 767 0x0050 //TX_MIC_CALIBRATION_2 768 0x0050 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x0800 //TX_TDDRC_ALPHA_UP_01 784 0x0800 //TX_TDDRC_ALPHA_UP_02 785 0x0800 //TX_TDDRC_ALPHA_UP_03 786 0x0800 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0006 //TX_DEADMIC_SILENCE_TH 817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0096 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0001 //TX_TDDRC_THRD_0 855 0x0002 //TX_TDDRC_THRD_1 856 0x1000 //TX_TDDRC_THRD_2 857 0x1000 //TX_TDDRC_THRD_3 858 0x6000 //TX_TDDRC_SLANT_0 859 0x6000 //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x1380 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2379 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x02A8 //TX_MICMUTE_RATIO_THR 900 0x02A8 //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x7D64 //TX_DTD_THR1_MICMUTE_0 912 0x76C0 //TX_DTD_THR1_MICMUTE_1 913 0x7530 //TX_DTD_THR1_MICMUTE_2 914 0x7F58 //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0260 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x7FFF //TX_MIC1MUTE_RATIO_THR 940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0100 //TX_AMS_RESRV_01 944 0x32C8 //TX_AMS_RESRV_02 945 0x5DC0 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x002C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x1800 //RX_THR_PITCH_DET_0 14 0x1000 //RX_THR_PITCH_DET_1 15 0x0800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0003 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x002C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x1800 //RX_THR_PITCH_DET_0 171 0x1000 //RX_THR_PITCH_DET_1 172 0x0800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0003 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x2B68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7646 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7CCC //TX_THR_PITCH_DET_0 131 0x7000 //TX_THR_PITCH_DET_1 132 0x6333 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0010 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7000 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x1000 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x0064 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x5000 //TX_DTD_THR1_0 198 0x7000 //TX_DTD_THR1_1 199 0x7F00 //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x2000 //TX_DTD_THR2_0 205 0x2000 //TX_DTD_THR2_1 206 0x2000 //TX_DTD_THR2_2 207 0x2000 //TX_DTD_THR2_3 208 0x2000 //TX_DTD_THR2_4 209 0x2000 //TX_DTD_THR2_5 210 0x2000 //TX_DTD_THR2_6 211 0x4100 //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x03E8 //TX_DT_CUT_K 214 0x1000 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0010 //TX_EPD_OFFSET_00 233 0x0010 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xFA00 //TX_THR_SN_EST_6 249 0xFA00 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0000 //TX_DELTA_THR_SN_EST_1 252 0x0000 //TX_DELTA_THR_SN_EST_2 253 0x0000 //TX_DELTA_THR_SN_EST_3 254 0x0000 //TX_DELTA_THR_SN_EST_4 255 0x0000 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0000 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x0400 //TX_B_POST_FLT_0 280 0x0400 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0010 //TX_NS_LVL_CTRL_1 283 0x0010 //TX_NS_LVL_CTRL_2 284 0x0010 //TX_NS_LVL_CTRL_3 285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 287 0x0010 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000D //TX_MIN_GAIN_S_0 290 0x000D //TX_MIN_GAIN_S_1 291 0x000D //TX_MIN_GAIN_S_2 292 0x000D //TX_MIN_GAIN_S_3 293 0x000D //TX_MIN_GAIN_S_4 294 0x000D //TX_MIN_GAIN_S_5 295 0x000D //TX_MIN_GAIN_S_6 296 0x000D //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x7FFF //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0014 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x1000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 341 0x7C29 //TX_LAMBDA_PFILT_S_2 342 0x7C29 //TX_LAMBDA_PFILT_S_3 343 0x7C29 //TX_LAMBDA_PFILT_S_4 344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x0FA0 //TX_K_PEPPER_HF 350 0x0400 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x4000 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 371 0x1F40 //TX_NOISE_TH_2 372 0x4650 //TX_NOISE_TH_3 373 0x7148 //TX_NOISE_TH_4 374 0x044C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 379 0x00C8 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY 387 0x0029 //TX_OUT_ENER_TH_NOISE 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x7FFF //TX_NOISEDET_BOOST_TH 412 0x0000 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0280 //TX_N_HOLD_HS 416 0x006E //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0333 //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2400 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x2000 //TX_WTA_EN_RTO_TH 429 0x1400 //TX_TOP_ENER_TH_F 430 0x0064 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x003C //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x0D9A //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x2A3D //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x0000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D08 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0010 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0608 //TX_PREEQ_BIN_MIC0_0 642 0x0808 //TX_PREEQ_BIN_MIC0_1 643 0x0808 //TX_PREEQ_BIN_MIC0_2 644 0x0808 //TX_PREEQ_BIN_MIC0_3 645 0x0808 //TX_PREEQ_BIN_MIC0_4 646 0x0808 //TX_PREEQ_BIN_MIC0_5 647 0x0808 //TX_PREEQ_BIN_MIC0_6 648 0x0802 //TX_PREEQ_BIN_MIC0_7 649 0x0000 //TX_PREEQ_BIN_MIC0_8 650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0010 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0608 //TX_PREEQ_BIN_MIC1_0 691 0x0808 //TX_PREEQ_BIN_MIC1_1 692 0x0808 //TX_PREEQ_BIN_MIC1_2 693 0x0808 //TX_PREEQ_BIN_MIC1_3 694 0x0808 //TX_PREEQ_BIN_MIC1_4 695 0x0808 //TX_PREEQ_BIN_MIC1_5 696 0x0808 //TX_PREEQ_BIN_MIC1_6 697 0x0802 //TX_PREEQ_BIN_MIC1_7 698 0x0000 //TX_PREEQ_BIN_MIC1_8 699 0x0000 //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0010 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0608 //TX_PREEQ_BIN_MIC2_0 740 0x0808 //TX_PREEQ_BIN_MIC2_1 741 0x0808 //TX_PREEQ_BIN_MIC2_2 742 0x0808 //TX_PREEQ_BIN_MIC2_3 743 0x0808 //TX_PREEQ_BIN_MIC2_4 744 0x0808 //TX_PREEQ_BIN_MIC2_5 745 0x0808 //TX_PREEQ_BIN_MIC2_6 746 0x0802 //TX_PREEQ_BIN_MIC2_7 747 0x0000 //TX_PREEQ_BIN_MIC2_8 748 0x0000 //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0065 //TX_MIC_CALIBRATION_0 766 0x0065 //TX_MIC_CALIBRATION_1 767 0x0065 //TX_MIC_CALIBRATION_2 768 0x0065 //TX_MIC_CALIBRATION_3 769 0x0044 //TX_MIC_PWR_BIAS_0 770 0x0044 //TX_MIC_PWR_BIAS_1 771 0x0044 //TX_MIC_PWR_BIAS_2 772 0x0044 //TX_MIC_PWR_BIAS_3 773 0x000B //TX_GAIN_LIMIT_0 774 0x000B //TX_GAIN_LIMIT_1 775 0x000B //TX_GAIN_LIMIT_2 776 0x000B //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x1000 //TX_TDDRC_ALPHA_UP_01 784 0x1000 //TX_TDDRC_ALPHA_UP_02 785 0x1000 //TX_TDDRC_ALPHA_UP_03 786 0x1000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0001 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x1000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0xF800 //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0xA024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x3800 //RX_THR_PITCH_DET_0 14 0x3000 //RX_THR_PITCH_DET_1 15 0x2800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0010 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2030 //RX_TDDRC_THRD_2 115 0x2030 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0478 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2030 //RX_TDDRC_THRD_2 115 0x2030 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0478 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2030 //RX_TDDRC_THRD_2 115 0x2030 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0478 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0014 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2030 //RX_TDDRC_THRD_2 115 0x2030 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0478 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0021 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2030 //RX_TDDRC_THRD_2 115 0x2030 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0478 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0037 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2030 //RX_TDDRC_THRD_2 115 0x2030 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0478 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2030 //RX_TDDRC_THRD_2 115 0x2030 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0478 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2030 //RX_TDDRC_THRD_2 115 0x2030 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0478 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0xA024 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x3800 //RX_THR_PITCH_DET_0 171 0x3000 //RX_THR_PITCH_DET_1 172 0x2800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0010 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2030 //RX_TDDRC_THRD_2 272 0x2030 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0478 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2030 //RX_TDDRC_THRD_2 272 0x2030 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0478 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2030 //RX_TDDRC_THRD_2 272 0x2030 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0478 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0014 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2030 //RX_TDDRC_THRD_2 272 0x2030 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0478 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0021 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2030 //RX_TDDRC_THRD_2 272 0x2030 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0478 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0037 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2030 //RX_TDDRC_THRD_2 272 0x2030 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0478 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2030 //RX_TDDRC_THRD_2 272 0x2030 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0478 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2030 //RX_TDDRC_THRD_2 272 0x2030 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0478 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x2B68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7D83 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x6800 //TX_THR_PITCH_DET_0 131 0x6000 //TX_THR_PITCH_DET_1 132 0x5800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0080 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7000 //TX_EAD_THR 151 0x0800 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x6000 //TX_C_POST_FLT 168 0x7000 //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7800 //TX_DTD_THR1_0 198 0x7000 //TX_DTD_THR1_1 199 0x7FFF //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x7FFF //TX_DTD_THR2_0 205 0x7FFF //TX_DTD_THR2_1 206 0x7FFF //TX_DTD_THR2_2 207 0x7FFF //TX_DTD_THR2_3 208 0x7FFF //TX_DTD_THR2_4 209 0x7FFF //TX_DTD_THR2_5 210 0x7FFF //TX_DTD_THR2_6 211 0x1000 //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0BB8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x0019 //TX_EPD_OFFSET_00 233 0x0019 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 246 0xF400 //TX_THR_SN_EST_4 247 0xF400 //TX_THR_SN_EST_5 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 282 0x0011 //TX_NS_LVL_CTRL_1 283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000F //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x7FFF //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x000E //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x1000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7B00 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 345 0x7B00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0800 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x00C8 //TX_NOISE_TH_2 372 0x3A98 //TX_NOISE_TH_3 373 0x0FA0 //TX_NOISE_TH_4 374 0x157C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x00F8 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x0000 //TX_NS_FP_K_METAL 411 0x7FFF //TX_NOISEDET_BOOST_TH 412 0x0000 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x001C //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x0E0F //TX_FDEQ_BIN_10 602 0x0F10 //TX_FDEQ_BIN_11 603 0x1011 //TX_FDEQ_BIN_12 604 0x1104 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0608 //TX_PREEQ_BIN_MIC0_0 642 0x0808 //TX_PREEQ_BIN_MIC0_1 643 0x0808 //TX_PREEQ_BIN_MIC0_2 644 0x0808 //TX_PREEQ_BIN_MIC0_3 645 0x0808 //TX_PREEQ_BIN_MIC0_4 646 0x0808 //TX_PREEQ_BIN_MIC0_5 647 0x0808 //TX_PREEQ_BIN_MIC0_6 648 0x0808 //TX_PREEQ_BIN_MIC0_7 649 0x0808 //TX_PREEQ_BIN_MIC0_8 650 0x0808 //TX_PREEQ_BIN_MIC0_9 651 0x0808 //TX_PREEQ_BIN_MIC0_10 652 0x0808 //TX_PREEQ_BIN_MIC0_11 653 0x0808 //TX_PREEQ_BIN_MIC0_12 654 0x0808 //TX_PREEQ_BIN_MIC0_13 655 0x0808 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0608 //TX_PREEQ_BIN_MIC1_0 691 0x0808 //TX_PREEQ_BIN_MIC1_1 692 0x0808 //TX_PREEQ_BIN_MIC1_2 693 0x0808 //TX_PREEQ_BIN_MIC1_3 694 0x0808 //TX_PREEQ_BIN_MIC1_4 695 0x0808 //TX_PREEQ_BIN_MIC1_5 696 0x0808 //TX_PREEQ_BIN_MIC1_6 697 0x0808 //TX_PREEQ_BIN_MIC1_7 698 0x0808 //TX_PREEQ_BIN_MIC1_8 699 0x0808 //TX_PREEQ_BIN_MIC1_9 700 0x0808 //TX_PREEQ_BIN_MIC1_10 701 0x0808 //TX_PREEQ_BIN_MIC1_11 702 0x0808 //TX_PREEQ_BIN_MIC1_12 703 0x0808 //TX_PREEQ_BIN_MIC1_13 704 0x0808 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0608 //TX_PREEQ_BIN_MIC2_0 740 0x0808 //TX_PREEQ_BIN_MIC2_1 741 0x0808 //TX_PREEQ_BIN_MIC2_2 742 0x0808 //TX_PREEQ_BIN_MIC2_3 743 0x0808 //TX_PREEQ_BIN_MIC2_4 744 0x0808 //TX_PREEQ_BIN_MIC2_5 745 0x0808 //TX_PREEQ_BIN_MIC2_6 746 0x0808 //TX_PREEQ_BIN_MIC2_7 747 0x0808 //TX_PREEQ_BIN_MIC2_8 748 0x0808 //TX_PREEQ_BIN_MIC2_9 749 0x0808 //TX_PREEQ_BIN_MIC2_10 750 0x0808 //TX_PREEQ_BIN_MIC2_11 751 0x0808 //TX_PREEQ_BIN_MIC2_12 752 0x0808 //TX_PREEQ_BIN_MIC2_13 753 0x0808 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0062 //TX_MIC_CALIBRATION_0 766 0x0062 //TX_MIC_CALIBRATION_1 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x000C //TX_GAIN_LIMIT_0 774 0x000C //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000C //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x1000 //TX_TDDRC_ALPHA_UP_01 784 0x1000 //TX_TDDRC_ALPHA_UP_02 785 0x1000 //TX_TDDRC_ALPHA_UP_03 786 0x1000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x0000 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0001 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x1000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0xA024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x3800 //RX_THR_PITCH_DET_0 14 0x3000 //RX_THR_PITCH_DET_1 15 0x2800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0010 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0014 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0021 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0037 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0xA024 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0001 //RX_SAMPLINGFREQ_SIG 160 0x0001 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x4000 //RX_B_PE 170 0x3800 //RX_THR_PITCH_DET_0 171 0x3000 //RX_THR_PITCH_DET_1 172 0x2800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0010 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0014 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0021 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0037 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x2B68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7EFF //TX_A_HP 129 0x4000 //TX_B_PE 130 0x1800 //TX_THR_PITCH_DET_0 131 0x1000 //TX_THR_PITCH_DET_1 132 0x0800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0080 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7000 //TX_EAD_THR 151 0x0800 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x6000 //TX_C_POST_FLT 168 0x7000 //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7800 //TX_DTD_THR1_0 198 0x7000 //TX_DTD_THR1_1 199 0x7FFF //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x7FFF //TX_DTD_THR2_0 205 0x7FFF //TX_DTD_THR2_1 206 0x7FFF //TX_DTD_THR2_2 207 0x7FFF //TX_DTD_THR2_3 208 0x7FFF //TX_DTD_THR2_4 209 0x7FFF //TX_DTD_THR2_5 210 0x7FFF //TX_DTD_THR2_6 211 0x1000 //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0BB8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x00F0 //TX_EPD_OFFSET_00 233 0x00F0 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 246 0xF400 //TX_THR_SN_EST_4 247 0xF400 //TX_THR_SN_EST_5 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 282 0x0011 //TX_NS_LVL_CTRL_1 283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000F //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x7FFF //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x000E //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x1000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7900 //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7B00 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 345 0x7B00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0000 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0800 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x00C8 //TX_NOISE_TH_2 372 0x3A98 //TX_NOISE_TH_3 373 0x0FA0 //TX_NOISE_TH_4 374 0x157C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x044C //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x1013 //TX_FDEQ_BIN_10 602 0x1719 //TX_FDEQ_BIN_11 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 606 0x282C //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4868 //TX_PREEQ_GAIN_MIC0_8 626 0x6860 //TX_PREEQ_GAIN_MIC0_9 627 0x6048 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0E10 //TX_PREEQ_BIN_MIC0_0 642 0x1010 //TX_PREEQ_BIN_MIC0_1 643 0x1010 //TX_PREEQ_BIN_MIC0_2 644 0x1010 //TX_PREEQ_BIN_MIC0_3 645 0x1010 //TX_PREEQ_BIN_MIC0_4 646 0x1010 //TX_PREEQ_BIN_MIC0_5 647 0x1010 //TX_PREEQ_BIN_MIC0_6 648 0x1010 //TX_PREEQ_BIN_MIC0_7 649 0x1010 //TX_PREEQ_BIN_MIC0_8 650 0x1010 //TX_PREEQ_BIN_MIC0_9 651 0x1010 //TX_PREEQ_BIN_MIC0_10 652 0x1010 //TX_PREEQ_BIN_MIC0_11 653 0x1010 //TX_PREEQ_BIN_MIC0_12 654 0x1010 //TX_PREEQ_BIN_MIC0_13 655 0x1010 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0E10 //TX_PREEQ_BIN_MIC1_0 691 0x1010 //TX_PREEQ_BIN_MIC1_1 692 0x1010 //TX_PREEQ_BIN_MIC1_2 693 0x1010 //TX_PREEQ_BIN_MIC1_3 694 0x1010 //TX_PREEQ_BIN_MIC1_4 695 0x1010 //TX_PREEQ_BIN_MIC1_5 696 0x1010 //TX_PREEQ_BIN_MIC1_6 697 0x1010 //TX_PREEQ_BIN_MIC1_7 698 0x1010 //TX_PREEQ_BIN_MIC1_8 699 0x1010 //TX_PREEQ_BIN_MIC1_9 700 0x1010 //TX_PREEQ_BIN_MIC1_10 701 0x1010 //TX_PREEQ_BIN_MIC1_11 702 0x1010 //TX_PREEQ_BIN_MIC1_12 703 0x1010 //TX_PREEQ_BIN_MIC1_13 704 0x1010 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0E10 //TX_PREEQ_BIN_MIC2_0 740 0x1010 //TX_PREEQ_BIN_MIC2_1 741 0x1010 //TX_PREEQ_BIN_MIC2_2 742 0x1010 //TX_PREEQ_BIN_MIC2_3 743 0x1010 //TX_PREEQ_BIN_MIC2_4 744 0x1010 //TX_PREEQ_BIN_MIC2_5 745 0x1010 //TX_PREEQ_BIN_MIC2_6 746 0x1010 //TX_PREEQ_BIN_MIC2_7 747 0x1010 //TX_PREEQ_BIN_MIC2_8 748 0x1010 //TX_PREEQ_BIN_MIC2_9 749 0x1010 //TX_PREEQ_BIN_MIC2_10 750 0x1010 //TX_PREEQ_BIN_MIC2_11 751 0x1010 //TX_PREEQ_BIN_MIC2_12 752 0x1010 //TX_PREEQ_BIN_MIC2_13 753 0x1010 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0062 //TX_MIC_CALIBRATION_0 766 0x0062 //TX_MIC_CALIBRATION_1 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x000C //TX_GAIN_LIMIT_0 774 0x000C //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000C //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0000 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x78D6 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x2024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x1800 //RX_THR_PITCH_DET_0 14 0x1000 //RX_THR_PITCH_DET_1 15 0x0800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0003 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0014 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0021 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0037 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x0024 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x1800 //RX_THR_PITCH_DET_0 171 0x1000 //RX_THR_PITCH_DET_1 172 0x0800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0003 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0014 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0021 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0037 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 2 0x0020 //TX_PATCH_REG 3 0x6B6A //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B4C //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7E56 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x6800 //TX_THR_PITCH_DET_0 131 0x6000 //TX_THR_PITCH_DET_1 132 0x5800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0200 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x61A8 //TX_EAD_THR 151 0x0400 //TX_THR_RE_EST 152 0x3000 //TX_MIN_EQ_RE_EST_0 153 0x3000 //TX_MIN_EQ_RE_EST_1 154 0x4000 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x6000 //TX_MIN_EQ_RE_EST_6 159 0x6000 //TX_MIN_EQ_RE_EST_7 160 0x6000 //TX_MIN_EQ_RE_EST_8 161 0x6000 //TX_MIN_EQ_RE_EST_9 162 0x4000 //TX_MIN_EQ_RE_EST_10 163 0x4000 //TX_MIN_EQ_RE_EST_11 164 0x4000 //TX_MIN_EQ_RE_EST_12 165 0x3000 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x3000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x0800 //TX_DTD_THR1_0 198 0x0800 //TX_DTD_THR1_1 199 0x0800 //TX_DTD_THR1_2 200 0x0800 //TX_DTD_THR1_3 201 0x0800 //TX_DTD_THR1_4 202 0x0800 //TX_DTD_THR1_5 203 0x0800 //TX_DTD_THR1_6 204 0x0800 //TX_DTD_THR2_0 205 0x0800 //TX_DTD_THR2_1 206 0x0800 //TX_DTD_THR2_2 207 0x0800 //TX_DTD_THR2_3 208 0x0800 //TX_DTD_THR2_4 209 0x0100 //TX_DTD_THR2_5 210 0x0100 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x03E8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x00C0 //TX_EPD_OFFSET_00 233 0x00C0 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF700 //TX_THR_SN_EST_0 243 0xFB00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xF700 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xF600 //TX_THR_SN_EST_5 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 251 0x0400 //TX_DELTA_THR_SN_EST_1 252 0x0300 //TX_DELTA_THR_SN_EST_2 253 0x0600 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 284 0x0019 //TX_NS_LVL_CTRL_3 285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 303 0x6000 //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x6000 //TX_A_POST_FILT_S_0 315 0x6000 //TX_A_POST_FILT_S_1 316 0x6000 //TX_A_POST_FILT_S_2 317 0x6000 //TX_A_POST_FILT_S_3 318 0x6000 //TX_A_POST_FILT_S_4 319 0x6000 //TX_A_POST_FILT_S_5 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x2000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7CCD //TX_LAMBDA_PFILT_S_0 340 0x7CCD //TX_LAMBDA_PFILT_S_1 341 0x7CCD //TX_LAMBDA_PFILT_S_2 342 0x7CCD //TX_LAMBDA_PFILT_S_3 343 0x7CCD //TX_LAMBDA_PFILT_S_4 344 0x7CCD //TX_LAMBDA_PFILT_S_5 345 0x7CCD //TX_LAMBDA_PFILT_S_6 346 0x7CCD //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0500 //TX_A_PEPPER 349 0x1600 //TX_K_PEPPER_HF 350 0x0400 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 371 0x04B0 //TX_NOISE_TH_2 372 0x3194 //TX_NOISE_TH_3 373 0x0960 //TX_NOISE_TH_4 374 0x5555 //TX_NOISE_TH_5 375 0x3FF4 //TX_NOISE_TH_5_2 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x02BC //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0304 //TX_FDEQ_BIN_2 594 0x0405 //TX_FDEQ_BIN_3 595 0x0607 //TX_FDEQ_BIN_4 596 0x0809 //TX_FDEQ_BIN_5 597 0x0A0B //TX_FDEQ_BIN_6 598 0x0C0D //TX_FDEQ_BIN_7 599 0x0E0F //TX_FDEQ_BIN_8 600 0x1011 //TX_FDEQ_BIN_9 601 0x1214 //TX_FDEQ_BIN_10 602 0x1618 //TX_FDEQ_BIN_11 603 0x1C1C //TX_FDEQ_BIN_12 604 0x2020 //TX_FDEQ_BIN_13 605 0x2020 //TX_FDEQ_BIN_14 606 0x2011 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0E10 //TX_PREEQ_BIN_MIC0_0 642 0x1010 //TX_PREEQ_BIN_MIC0_1 643 0x1010 //TX_PREEQ_BIN_MIC0_2 644 0x1010 //TX_PREEQ_BIN_MIC0_3 645 0x1010 //TX_PREEQ_BIN_MIC0_4 646 0x1010 //TX_PREEQ_BIN_MIC0_5 647 0x1010 //TX_PREEQ_BIN_MIC0_6 648 0x1010 //TX_PREEQ_BIN_MIC0_7 649 0x1010 //TX_PREEQ_BIN_MIC0_8 650 0x1010 //TX_PREEQ_BIN_MIC0_9 651 0x1010 //TX_PREEQ_BIN_MIC0_10 652 0x1010 //TX_PREEQ_BIN_MIC0_11 653 0x1010 //TX_PREEQ_BIN_MIC0_12 654 0x1010 //TX_PREEQ_BIN_MIC0_13 655 0x1010 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0E10 //TX_PREEQ_BIN_MIC1_0 691 0x1010 //TX_PREEQ_BIN_MIC1_1 692 0x1010 //TX_PREEQ_BIN_MIC1_2 693 0x1010 //TX_PREEQ_BIN_MIC1_3 694 0x1010 //TX_PREEQ_BIN_MIC1_4 695 0x1010 //TX_PREEQ_BIN_MIC1_5 696 0x1010 //TX_PREEQ_BIN_MIC1_6 697 0x1010 //TX_PREEQ_BIN_MIC1_7 698 0x1010 //TX_PREEQ_BIN_MIC1_8 699 0x1010 //TX_PREEQ_BIN_MIC1_9 700 0x1010 //TX_PREEQ_BIN_MIC1_10 701 0x1010 //TX_PREEQ_BIN_MIC1_11 702 0x1010 //TX_PREEQ_BIN_MIC1_12 703 0x1010 //TX_PREEQ_BIN_MIC1_13 704 0x1010 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0E10 //TX_PREEQ_BIN_MIC2_0 740 0x1010 //TX_PREEQ_BIN_MIC2_1 741 0x1010 //TX_PREEQ_BIN_MIC2_2 742 0x1010 //TX_PREEQ_BIN_MIC2_3 743 0x1010 //TX_PREEQ_BIN_MIC2_4 744 0x1010 //TX_PREEQ_BIN_MIC2_5 745 0x1010 //TX_PREEQ_BIN_MIC2_6 746 0x1010 //TX_PREEQ_BIN_MIC2_7 747 0x1010 //TX_PREEQ_BIN_MIC2_8 748 0x1010 //TX_PREEQ_BIN_MIC2_9 749 0x1010 //TX_PREEQ_BIN_MIC2_10 750 0x1010 //TX_PREEQ_BIN_MIC2_11 751 0x1010 //TX_PREEQ_BIN_MIC2_12 752 0x1010 //TX_PREEQ_BIN_MIC2_13 753 0x1010 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0060 //TX_MIC_CALIBRATION_0 766 0x0060 //TX_MIC_CALIBRATION_1 767 0x0070 //TX_MIC_CALIBRATION_2 768 0x0070 //TX_MIC_CALIBRATION_3 769 0x0050 //TX_MIC_PWR_BIAS_0 770 0x0040 //TX_MIC_PWR_BIAS_1 771 0x0040 //TX_MIC_PWR_BIAS_2 772 0x0040 //TX_MIC_PWR_BIAS_3 773 0x0009 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x0C00 //TX_TDDRC_ALPHA_UP_01 784 0x0C00 //TX_TDDRC_ALPHA_UP_02 785 0x0C00 //TX_TDDRC_ALPHA_UP_03 786 0x0C00 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0001 //TX_TDDRC_THRD_0 855 0x0001 //TX_TDDRC_THRD_1 856 0x1900 //TX_TDDRC_THRD_2 857 0x1900 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x7B00 //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x07F2 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7B02 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0500 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x000A //RX_NS_LVL_CTRL 23 0xF600 //RX_THR_SN_EST 24 0x7000 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x202C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0004 //RX_SAMPLINGFREQ_SIG 160 0x0004 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7B02 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0500 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x000A //RX_NS_LVL_CTRL 180 0xF600 //RX_THR_SN_EST 181 0x7000 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-RESERVE2-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x2B68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7EFF //TX_A_HP 129 0x4000 //TX_B_PE 130 0x1800 //TX_THR_PITCH_DET_0 131 0x1000 //TX_THR_PITCH_DET_1 132 0x0800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0080 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7000 //TX_EAD_THR 151 0x0800 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x6000 //TX_C_POST_FLT 168 0x7000 //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7800 //TX_DTD_THR1_0 198 0x7000 //TX_DTD_THR1_1 199 0x7FFF //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x7FFF //TX_DTD_THR2_0 205 0x7FFF //TX_DTD_THR2_1 206 0x7FFF //TX_DTD_THR2_2 207 0x7FFF //TX_DTD_THR2_3 208 0x7FFF //TX_DTD_THR2_4 209 0x7FFF //TX_DTD_THR2_5 210 0x7FFF //TX_DTD_THR2_6 211 0x1000 //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0BB8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x00F0 //TX_EPD_OFFSET_00 233 0x00F0 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 246 0xF400 //TX_THR_SN_EST_4 247 0xF400 //TX_THR_SN_EST_5 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 282 0x0011 //TX_NS_LVL_CTRL_1 283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000F //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x7FFF //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x000E //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x1000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7900 //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7B00 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 345 0x7B00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0000 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0800 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x00C8 //TX_NOISE_TH_2 372 0x3A98 //TX_NOISE_TH_3 373 0x0FA0 //TX_NOISE_TH_4 374 0x157C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x044C //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x1013 //TX_FDEQ_BIN_10 602 0x1719 //TX_FDEQ_BIN_11 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 606 0x282C //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4868 //TX_PREEQ_GAIN_MIC0_8 626 0x6860 //TX_PREEQ_GAIN_MIC0_9 627 0x6048 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0E10 //TX_PREEQ_BIN_MIC0_0 642 0x1010 //TX_PREEQ_BIN_MIC0_1 643 0x1010 //TX_PREEQ_BIN_MIC0_2 644 0x1010 //TX_PREEQ_BIN_MIC0_3 645 0x1010 //TX_PREEQ_BIN_MIC0_4 646 0x1010 //TX_PREEQ_BIN_MIC0_5 647 0x1010 //TX_PREEQ_BIN_MIC0_6 648 0x1010 //TX_PREEQ_BIN_MIC0_7 649 0x1010 //TX_PREEQ_BIN_MIC0_8 650 0x1010 //TX_PREEQ_BIN_MIC0_9 651 0x1010 //TX_PREEQ_BIN_MIC0_10 652 0x1010 //TX_PREEQ_BIN_MIC0_11 653 0x1010 //TX_PREEQ_BIN_MIC0_12 654 0x1010 //TX_PREEQ_BIN_MIC0_13 655 0x1010 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0E10 //TX_PREEQ_BIN_MIC1_0 691 0x1010 //TX_PREEQ_BIN_MIC1_1 692 0x1010 //TX_PREEQ_BIN_MIC1_2 693 0x1010 //TX_PREEQ_BIN_MIC1_3 694 0x1010 //TX_PREEQ_BIN_MIC1_4 695 0x1010 //TX_PREEQ_BIN_MIC1_5 696 0x1010 //TX_PREEQ_BIN_MIC1_6 697 0x1010 //TX_PREEQ_BIN_MIC1_7 698 0x1010 //TX_PREEQ_BIN_MIC1_8 699 0x1010 //TX_PREEQ_BIN_MIC1_9 700 0x1010 //TX_PREEQ_BIN_MIC1_10 701 0x1010 //TX_PREEQ_BIN_MIC1_11 702 0x1010 //TX_PREEQ_BIN_MIC1_12 703 0x1010 //TX_PREEQ_BIN_MIC1_13 704 0x1010 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0E10 //TX_PREEQ_BIN_MIC2_0 740 0x1010 //TX_PREEQ_BIN_MIC2_1 741 0x1010 //TX_PREEQ_BIN_MIC2_2 742 0x1010 //TX_PREEQ_BIN_MIC2_3 743 0x1010 //TX_PREEQ_BIN_MIC2_4 744 0x1010 //TX_PREEQ_BIN_MIC2_5 745 0x1010 //TX_PREEQ_BIN_MIC2_6 746 0x1010 //TX_PREEQ_BIN_MIC2_7 747 0x1010 //TX_PREEQ_BIN_MIC2_8 748 0x1010 //TX_PREEQ_BIN_MIC2_9 749 0x1010 //TX_PREEQ_BIN_MIC2_10 750 0x1010 //TX_PREEQ_BIN_MIC2_11 751 0x1010 //TX_PREEQ_BIN_MIC2_12 752 0x1010 //TX_PREEQ_BIN_MIC2_13 753 0x1010 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0062 //TX_MIC_CALIBRATION_0 766 0x0062 //TX_MIC_CALIBRATION_1 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x000C //TX_GAIN_LIMIT_0 774 0x000C //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000C //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0000 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x78D6 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x0024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x1800 //RX_THR_PITCH_DET_0 14 0x1000 //RX_THR_PITCH_DET_1 15 0x0800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0003 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0014 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0021 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0037 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x0024 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x1800 //RX_THR_PITCH_DET_0 171 0x1000 //RX_THR_PITCH_DET_1 172 0x0800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0003 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0014 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0021 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0037 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-NB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 2 0x0000 //TX_PATCH_REG 3 0x0200 //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x0078 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0000 //TX_MICS_OF_PAIR0 38 0x0000 //TX_MICS_OF_PAIR1 39 0x0000 //TX_MICS_OF_PAIR2 40 0x0000 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0003 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x0000 //TX_HD_BIN_MASK 53 0x0000 //TX_HD_SUBAND_MASK 54 0x0000 //TX_HD_FRAME_AVG_MASK 55 0x0000 //TX_HD_MIN_FRQ 56 0x0000 //TX_HD_ALPHA_PSD 57 0x0000 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0x0000 //TX_T_PSDVAT 63 0x0000 //TX_CNT 64 0x0000 //TX_ANTI_HOWL_GAIN 65 0x0000 //TX_MICFORBFMARK_0 66 0x0000 //TX_MICFORBFMARK_1 67 0x0000 //TX_MICFORBFMARK_2 68 0x0000 //TX_MICFORBFMARK_3 69 0x0000 //TX_MICFORBFMARK_4 70 0x0000 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x0000 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x0000 //TX_ADCS_GAIN 112 0x0000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x7FFF //TX_BLMIC_BLKFACTOR 116 0x7FFF //TX_BRMIC_BLKFACTOR 117 0x000A //TX_MICBLK_START_BIN 118 0x0041 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x0000 //TX_FE_ENER_TH_MTS 124 0x0000 //TX_FE_ENER_TH_EXP 125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x0000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0020 //TX_MIC_BLOCK_N 128 0x7652 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7800 //TX_THR_PITCH_DET_0 131 0x7000 //TX_THR_PITCH_DET_1 132 0x6000 //TX_THR_PITCH_DET_2 133 0x0000 //TX_PITCH_BFR_LEN 134 0x0000 //TX_SBD_PITCH_DET 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x2000 //TX_AEC_REF_GAIN_0 148 0x2000 //TX_AEC_REF_GAIN_1 149 0x2000 //TX_AEC_REF_GAIN_2 150 0x4000 //TX_EAD_THR 151 0x0200 //TX_THR_RE_EST 152 0x0100 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0100 //TX_MIN_EQ_RE_EST_2 155 0x0100 //TX_MIN_EQ_RE_EST_3 156 0x0100 //TX_MIN_EQ_RE_EST_4 157 0x0100 //TX_MIN_EQ_RE_EST_5 158 0x0100 //TX_MIN_EQ_RE_EST_6 159 0x0100 //TX_MIN_EQ_RE_EST_7 160 0x0100 //TX_MIN_EQ_RE_EST_8 161 0x0100 //TX_MIN_EQ_RE_EST_9 162 0x0100 //TX_MIN_EQ_RE_EST_10 163 0x0100 //TX_MIN_EQ_RE_EST_11 164 0x0100 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE 167 0x0000 //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0008 //TX_SE_HOLD_N 170 0x0050 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x0000 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x0000 //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0000 //TX_FRQ_LIN_LEN 184 0x0000 //TX_FRQ_AEC_LEN_RHO 185 0x0000 //TX_MU0_UNP_FRQ_AEC 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7333 //TX_DTD_THR1_0 198 0x7333 //TX_DTD_THR1_1 199 0x7333 //TX_DTD_THR1_2 200 0x7333 //TX_DTD_THR1_3 201 0x7333 //TX_DTD_THR1_4 202 0x7333 //TX_DTD_THR1_5 203 0x7333 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0400 //TX_DT_CUT_K 214 0x0000 //TX_DT_CUT_THR 215 0x0000 //TX_COMFORT_G 216 0x0000 //TX_POWER_YOUT_TH 217 0x0000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x0800 //TX_B_POST_FILT_ECHO_H 230 0x0000 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x0000 //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xF800 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0A00 //TX_N_SN_EST 267 0x0000 //TX_INBEAM_T 268 0x0000 //TX_INBEAMHOLDT 269 0x1FFF //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x1000 //TX_NE_RTO_TH_L 274 0x1000 //TX_MAINREFRTOH_TH_H 275 0x1000 //TX_MAINREFRTOH_TH_L 276 0x2000 //TX_MAINREFRTO_TH_H 277 0x1400 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 291 0x0014 //TX_MIN_GAIN_S_2 292 0x0014 //TX_MIN_GAIN_S_3 293 0x0014 //TX_MIN_GAIN_S_4 294 0x0014 //TX_MIN_GAIN_S_5 295 0x0014 //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x0000 //TX_NMOS_SUP 298 0x0064 //TX_NS_MAX_PRI_SNR_TH 299 0x7FFF //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x7FFF //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x2000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7E00 //TX_LAMBDA_PFILT_S_0 340 0x7E00 //TX_LAMBDA_PFILT_S_1 341 0x7E00 //TX_LAMBDA_PFILT_S_2 342 0x7E00 //TX_LAMBDA_PFILT_S_3 343 0x7E00 //TX_LAMBDA_PFILT_S_4 344 0x7E00 //TX_LAMBDA_PFILT_S_5 345 0x7E00 //TX_LAMBDA_PFILT_S_6 346 0x7E00 //TX_LAMBDA_PFILT_S_7 347 0x0010 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x0000 //TX_K_PEPPER_HF 350 0x0000 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x4000 //TX_HMNC_BST_THR 353 0x0000 //TX_DT_BINVAD_TH_0 354 0x0000 //TX_DT_BINVAD_TH_1 355 0x0000 //TX_DT_BINVAD_TH_2 356 0x0000 //TX_DT_BINVAD_TH_3 357 0x0000 //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0001 //TX_BF_SGRAD_FLG 362 0x0000 //TX_BF_DVG_TH 363 0x0000 //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT 367 0x003B //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 371 0x0032 //TX_NOISE_TH_2 372 0x3D54 //TX_NOISE_TH_3 373 0x012C //TX_NOISE_TH_4 374 0x07D0 //TX_NOISE_TH_5 375 0x6590 //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x00C8 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY 387 0x6400 //TX_OUT_ENER_TH_NOISE 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH 406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR 410 0x0080 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x2000 //TX_RHO_UPB 415 0x0020 //TX_N_HOLD_HS 416 0x0009 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0000 //TX_EXTRA_GAIN_MICBLOCK 419 0x0333 //TX_THR_STD_NSR 420 0x0219 //TX_THR_STD_PLH 421 0x09C4 //TX_N_HOLD_STD 422 0x0166 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x0000 //TX_SB_RTO_MEAN_TH_RUB 428 0x2000 //TX_WTA_EN_RTO_TH 429 0x1400 //TX_TOP_ENER_TH_F 430 0x0064 //TX_DESIRED_TALK_HOLDT 431 0x1000 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0000 //TX_HS_VAD_BIN 435 0x0000 //TX_THR_VAD_HS 436 0x0000 //TX_MEAN_RTO_MIN_TH2 437 0x0000 //TX_SILENCE_T 438 0x4000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x099A //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x001E //TX_DOA_VAD_THR_1 445 0x001E //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B 453 0x005A //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C 456 0x005A //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D 459 0x005A //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0172 //TX_BF_HOLDOFF_T 473 0x8000 //TX_DOA_COST_FACTOR 474 0x0D9A //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x071C //TX_DOA_TRACK_HT 477 0x0280 //TX_N1_HOLD_HF 478 0x0140 //TX_N2_HOLD_HF 479 0x2AAB //TX_BF_RESET_THR_HF 480 0x4000 //TX_DOA_SMOOTH 481 0x0000 //TX_MU_BF 482 0x0200 //TX_BF_MU_LF_B2 483 0x0000 //TX_BF_FC_END_BIN_B2 484 0x0000 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0000 //TX_N_DOA_SEED 488 0x0000 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x0000 //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x0000 //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x0000 //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0168 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0004 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0230 //TX_NOR_OFF_TH1 503 0xD333 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR 531 0x03E8 //TX_ENGY_THR 532 0x0000 //TX_CORR_HIGH_TH 533 0x0000 //TX_ENGY_THR_2 534 0x0000 //TX_MEAN_RTO_THR 535 0x0000 //TX_WNS_ENOISE_MIC0_TH 536 0x0000 //TX_RATIOMICL_TH 537 0x0000 //TX_CALIG_HS 538 0x000A //TX_LVL_CTRL 539 0x0000 //TX_WIND_SUPRTO 540 0x0000 //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH 545 0x0000 //TX_WNS_RESRV_0 546 0x0000 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0000 //TX_BVE_NOISE_FLOOR_1 554 0x0000 //TX_BVE_NOISE_FLOOR_2 555 0x0000 //TX_BVE_NOISE_FLOOR_3 556 0x0000 //TX_BVE_NOISE_FLOOR_4 557 0x0000 //TX_BVE_NOISE_FLOOR_5 558 0x0000 //TX_BVE_NOISE_FLOOR_6 559 0x0000 //TX_BVE_NOISE_FLOOR_7 560 0x0000 //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0000 //TX_FDEQ_BIN_0 592 0x0000 //TX_FDEQ_BIN_1 593 0x0000 //TX_FDEQ_BIN_2 594 0x0000 //TX_FDEQ_BIN_3 595 0x0000 //TX_FDEQ_BIN_4 596 0x0000 //TX_FDEQ_BIN_5 597 0x0000 //TX_FDEQ_BIN_6 598 0x0000 //TX_FDEQ_BIN_7 599 0x0000 //TX_FDEQ_BIN_8 600 0x0000 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0000 //TX_PREEQ_BIN_MIC0_0 642 0x0000 //TX_PREEQ_BIN_MIC0_1 643 0x0000 //TX_PREEQ_BIN_MIC0_2 644 0x0000 //TX_PREEQ_BIN_MIC0_3 645 0x0000 //TX_PREEQ_BIN_MIC0_4 646 0x0000 //TX_PREEQ_BIN_MIC0_5 647 0x0000 //TX_PREEQ_BIN_MIC0_6 648 0x0000 //TX_PREEQ_BIN_MIC0_7 649 0x0000 //TX_PREEQ_BIN_MIC0_8 650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0000 //TX_PREEQ_BIN_MIC1_0 691 0x0000 //TX_PREEQ_BIN_MIC1_1 692 0x0000 //TX_PREEQ_BIN_MIC1_2 693 0x0000 //TX_PREEQ_BIN_MIC1_3 694 0x0000 //TX_PREEQ_BIN_MIC1_4 695 0x0000 //TX_PREEQ_BIN_MIC1_5 696 0x0000 //TX_PREEQ_BIN_MIC1_6 697 0x0000 //TX_PREEQ_BIN_MIC1_7 698 0x0000 //TX_PREEQ_BIN_MIC1_8 699 0x0000 //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 743 0x0000 //TX_PREEQ_BIN_MIC2_4 744 0x0000 //TX_PREEQ_BIN_MIC2_5 745 0x0000 //TX_PREEQ_BIN_MIC2_6 746 0x0000 //TX_PREEQ_BIN_MIC2_7 747 0x0000 //TX_PREEQ_BIN_MIC2_8 748 0x0000 //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0064 //TX_MIC_CALIBRATION_0 766 0x006A //TX_MIC_CALIBRATION_1 767 0x006A //TX_MIC_CALIBRATION_2 768 0x006B //TX_MIC_CALIBRATION_3 769 0x0048 //TX_MIC_PWR_BIAS_0 770 0x003C //TX_MIC_PWR_BIAS_1 771 0x003C //TX_MIC_PWR_BIAS_2 772 0x003C //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 791 0x65AD //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0002 //TX_DEADMIC_SILENCE_TH 817 0x0147 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x0000 //TX_KS_NOISEPASTE_FACTOR 824 0x0000 //TX_KS_CONFIG 825 0x0000 //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x0000 //TX_FFP_FP_K_METAL 834 0x0000 //TX_A_POST_FLT_FP 835 0x0000 //TX_RTO_OUTBEAM_TH 836 0x0000 //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0000 //TX_FFP_RESRV_2 849 0x0000 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x0E80 //TX_TDDRC_THRD_2 857 0x3800 //TX_TDDRC_THRD_3 858 0x2A00 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x0000 //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0000 //TX_TDDRC_SMT_W 866 0x0100 //TX_TDDRC_DRC_GAIN 867 0x0000 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x1EB8 //TX_TFMASKLTH 870 0x170A //TX_TFMASKLTHL 871 0x7FFF //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x0000 //TX_FASTNS_OUTIN_TH 884 0x0000 //TX_FASTNS_TFMASK_TH 885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x247C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 10 0x065B //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0010 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM 39 0x847C //RX_FDEQ_GAIN_0 40 0x785C //RX_FDEQ_GAIN_1 41 0x6068 //RX_FDEQ_GAIN_2 42 0x7478 //RX_FDEQ_GAIN_3 43 0x7478 //RX_FDEQ_GAIN_4 44 0x705C //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0302 //RX_FDEQ_BIN_0 64 0x0104 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0C08 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x0060 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x0600 //RX_FDDRC_THRD_2_0 95 0x0600 //RX_FDDRC_THRD_2_1 96 0x0600 //RX_FDDRC_THRD_2_2 97 0x0600 //RX_FDDRC_THRD_2_3 98 0x0800 //RX_FDDRC_THRD_3_0 99 0x0800 //RX_FDDRC_THRD_3_1 100 0x0800 //RX_FDDRC_THRD_3_2 101 0x0800 //RX_FDDRC_THRD_3_3 102 0x0000 //RX_FDDRC_SLANT_0_0 103 0x0000 //RX_FDDRC_SLANT_0_1 104 0x0000 //RX_FDDRC_SLANT_0_2 105 0x0000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0004 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x1C00 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01E3 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0400 //RX_MIN_G_FP 128 0x1000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8484 //RX_FDEQ_GAIN_0 40 0x7A60 //RX_FDEQ_GAIN_1 41 0x606A //RX_FDEQ_GAIN_2 42 0x717C //RX_FDEQ_GAIN_3 43 0x807B //RX_FDEQ_GAIN_4 44 0x7065 //RX_FDEQ_GAIN_5 45 0x5D4F //RX_FDEQ_GAIN_6 46 0x4340 //RX_FDEQ_GAIN_7 47 0x4243 //RX_FDEQ_GAIN_8 48 0x4344 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0302 //RX_FDEQ_BIN_0 64 0x0104 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0C08 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x0060 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x0600 //RX_FDDRC_THRD_2_0 95 0x0600 //RX_FDDRC_THRD_2_1 96 0x0600 //RX_FDDRC_THRD_2_2 97 0x0600 //RX_FDDRC_THRD_2_3 98 0x0800 //RX_FDDRC_THRD_3_0 99 0x0800 //RX_FDDRC_THRD_3_1 100 0x0800 //RX_FDDRC_THRD_3_2 101 0x0800 //RX_FDDRC_THRD_3_3 102 0x0000 //RX_FDDRC_SLANT_0_0 103 0x0000 //RX_FDDRC_SLANT_0_1 104 0x0000 //RX_FDDRC_SLANT_0_2 105 0x0000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0051 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8484 //RX_FDEQ_GAIN_0 40 0x7A60 //RX_FDEQ_GAIN_1 41 0x606A //RX_FDEQ_GAIN_2 42 0x717C //RX_FDEQ_GAIN_3 43 0x807B //RX_FDEQ_GAIN_4 44 0x7065 //RX_FDEQ_GAIN_5 45 0x5D4F //RX_FDEQ_GAIN_6 46 0x4340 //RX_FDEQ_GAIN_7 47 0x4243 //RX_FDEQ_GAIN_8 48 0x4344 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0302 //RX_FDEQ_BIN_0 64 0x0104 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0C08 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x0060 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x0600 //RX_FDDRC_THRD_2_0 95 0x0600 //RX_FDDRC_THRD_2_1 96 0x0600 //RX_FDDRC_THRD_2_2 97 0x0600 //RX_FDDRC_THRD_2_3 98 0x0800 //RX_FDDRC_THRD_3_0 99 0x0800 //RX_FDDRC_THRD_3_1 100 0x0800 //RX_FDDRC_THRD_3_2 101 0x0800 //RX_FDDRC_THRD_3_3 102 0x0000 //RX_FDDRC_SLANT_0_0 103 0x0000 //RX_FDDRC_SLANT_0_1 104 0x0000 //RX_FDDRC_SLANT_0_2 105 0x0000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x007A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8484 //RX_FDEQ_GAIN_0 40 0x7A60 //RX_FDEQ_GAIN_1 41 0x606A //RX_FDEQ_GAIN_2 42 0x717C //RX_FDEQ_GAIN_3 43 0x807B //RX_FDEQ_GAIN_4 44 0x7065 //RX_FDEQ_GAIN_5 45 0x5D4F //RX_FDEQ_GAIN_6 46 0x4340 //RX_FDEQ_GAIN_7 47 0x4243 //RX_FDEQ_GAIN_8 48 0x4344 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0302 //RX_FDEQ_BIN_0 64 0x0104 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0C08 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x0060 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x0600 //RX_FDDRC_THRD_2_0 95 0x0600 //RX_FDDRC_THRD_2_1 96 0x0600 //RX_FDDRC_THRD_2_2 97 0x0600 //RX_FDDRC_THRD_2_3 98 0x0800 //RX_FDDRC_THRD_3_0 99 0x0800 //RX_FDDRC_THRD_3_1 100 0x0800 //RX_FDDRC_THRD_3_2 101 0x0800 //RX_FDDRC_THRD_3_3 102 0x0000 //RX_FDDRC_SLANT_0_0 103 0x0000 //RX_FDDRC_SLANT_0_1 104 0x0000 //RX_FDDRC_SLANT_0_2 105 0x0000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x00B7 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0109 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8484 //RX_FDEQ_GAIN_0 40 0x7A60 //RX_FDEQ_GAIN_1 41 0x606A //RX_FDEQ_GAIN_2 42 0x717C //RX_FDEQ_GAIN_3 43 0x807B //RX_FDEQ_GAIN_4 44 0x7065 //RX_FDEQ_GAIN_5 45 0x5D4F //RX_FDEQ_GAIN_6 46 0x4340 //RX_FDEQ_GAIN_7 47 0x4243 //RX_FDEQ_GAIN_8 48 0x4344 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0302 //RX_FDEQ_BIN_0 64 0x0104 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0C08 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x0060 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x0600 //RX_FDDRC_THRD_2_0 95 0x0600 //RX_FDDRC_THRD_2_1 96 0x0600 //RX_FDDRC_THRD_2_2 97 0x0600 //RX_FDDRC_THRD_2_3 98 0x0800 //RX_FDDRC_THRD_3_0 99 0x0800 //RX_FDDRC_THRD_3_1 100 0x0800 //RX_FDDRC_THRD_3_2 101 0x0800 //RX_FDDRC_THRD_3_3 102 0x0000 //RX_FDDRC_SLANT_0_0 103 0x0000 //RX_FDDRC_SLANT_0_1 104 0x0000 //RX_FDDRC_SLANT_0_2 105 0x0000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8484 //RX_FDEQ_GAIN_0 40 0x7A60 //RX_FDEQ_GAIN_1 41 0x606A //RX_FDEQ_GAIN_2 42 0x717C //RX_FDEQ_GAIN_3 43 0x807B //RX_FDEQ_GAIN_4 44 0x7065 //RX_FDEQ_GAIN_5 45 0x5D4F //RX_FDEQ_GAIN_6 46 0x4340 //RX_FDEQ_GAIN_7 47 0x4243 //RX_FDEQ_GAIN_8 48 0x4344 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0302 //RX_FDEQ_BIN_0 64 0x0104 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0C08 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x0060 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x0600 //RX_FDDRC_THRD_2_0 95 0x0600 //RX_FDDRC_THRD_2_1 96 0x0600 //RX_FDDRC_THRD_2_2 97 0x0600 //RX_FDDRC_THRD_2_3 98 0x0800 //RX_FDDRC_THRD_3_0 99 0x0800 //RX_FDDRC_THRD_3_1 100 0x0800 //RX_FDDRC_THRD_3_2 101 0x0800 //RX_FDDRC_THRD_3_3 102 0x0000 //RX_FDDRC_SLANT_0_0 103 0x0000 //RX_FDDRC_SLANT_0_1 104 0x0000 //RX_FDDRC_SLANT_0_2 105 0x0000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x1C00 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x02B2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8484 //RX_FDEQ_GAIN_0 40 0x7A60 //RX_FDEQ_GAIN_1 41 0x606A //RX_FDEQ_GAIN_2 42 0x7283 //RX_FDEQ_GAIN_3 43 0x8788 //RX_FDEQ_GAIN_4 44 0x7A69 //RX_FDEQ_GAIN_5 45 0x604F //RX_FDEQ_GAIN_6 46 0x3838 //RX_FDEQ_GAIN_7 47 0x343C //RX_FDEQ_GAIN_8 48 0x4044 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0302 //RX_FDEQ_BIN_0 64 0x0104 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0C08 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x0060 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x0600 //RX_FDDRC_THRD_2_0 95 0x0600 //RX_FDDRC_THRD_2_1 96 0x0600 //RX_FDDRC_THRD_2_2 97 0x0600 //RX_FDDRC_THRD_2_3 98 0x0800 //RX_FDDRC_THRD_3_0 99 0x0800 //RX_FDDRC_THRD_3_1 100 0x0800 //RX_FDDRC_THRD_3_2 101 0x0800 //RX_FDDRC_THRD_3_3 102 0x0000 //RX_FDDRC_SLANT_0_0 103 0x0000 //RX_FDDRC_SLANT_0_1 104 0x0000 //RX_FDDRC_SLANT_0_2 105 0x0000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0006 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x1C00 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x04D8 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8484 //RX_FDEQ_GAIN_0 40 0x7A60 //RX_FDEQ_GAIN_1 41 0x606A //RX_FDEQ_GAIN_2 42 0x7283 //RX_FDEQ_GAIN_3 43 0x8788 //RX_FDEQ_GAIN_4 44 0x887E //RX_FDEQ_GAIN_5 45 0x604F //RX_FDEQ_GAIN_6 46 0x3838 //RX_FDEQ_GAIN_7 47 0x3438 //RX_FDEQ_GAIN_8 48 0x3C40 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0302 //RX_FDEQ_BIN_0 64 0x0104 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0C08 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x1407 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x0060 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x0600 //RX_FDDRC_THRD_2_0 95 0x0600 //RX_FDDRC_THRD_2_1 96 0x0600 //RX_FDDRC_THRD_2_2 97 0x0600 //RX_FDDRC_THRD_2_3 98 0x0800 //RX_FDDRC_THRD_3_0 99 0x0800 //RX_FDDRC_THRD_3_1 100 0x0800 //RX_FDDRC_THRD_3_2 101 0x0800 //RX_FDDRC_THRD_3_3 102 0x0000 //RX_FDDRC_SLANT_0_0 103 0x0000 //RX_FDDRC_SLANT_0_1 104 0x0000 //RX_FDDRC_SLANT_0_2 105 0x0000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x027C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0010 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x4000 //RX_TDDRC_ALPHA_DWN_2 186 0x4000 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 197 0x8058 //RX_FDEQ_GAIN_1 198 0x5454 //RX_FDEQ_GAIN_2 199 0x545C //RX_FDEQ_GAIN_3 200 0x6448 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x5848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x485A //RX_FDEQ_GAIN_8 205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x0060 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x0600 //RX_FDDRC_THRD_2_0 252 0x0600 //RX_FDDRC_THRD_2_1 253 0x0600 //RX_FDDRC_THRD_2_2 254 0x0600 //RX_FDDRC_THRD_2_3 255 0x0800 //RX_FDDRC_THRD_3_0 256 0x0800 //RX_FDDRC_THRD_3_1 257 0x0800 //RX_FDDRC_THRD_3_2 258 0x0800 //RX_FDDRC_THRD_3_3 259 0x0000 //RX_FDDRC_SLANT_0_0 260 0x0000 //RX_FDDRC_SLANT_0_1 261 0x0000 //RX_FDDRC_SLANT_0_2 262 0x0000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0005 //RX_FILTINDX 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0700 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x0016 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x4000 //RX_TDDRC_ALPHA_DWN_2 186 0x4000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0700 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 197 0x8058 //RX_FDEQ_GAIN_1 198 0x5454 //RX_FDEQ_GAIN_2 199 0x545C //RX_FDEQ_GAIN_3 200 0x6448 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x5848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x485A //RX_FDEQ_GAIN_8 205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x0060 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x0600 //RX_FDDRC_THRD_2_0 252 0x0600 //RX_FDDRC_THRD_2_1 253 0x0600 //RX_FDDRC_THRD_2_2 254 0x0600 //RX_FDDRC_THRD_2_3 255 0x0800 //RX_FDDRC_THRD_3_0 256 0x0800 //RX_FDDRC_THRD_3_1 257 0x0800 //RX_FDDRC_THRD_3_2 258 0x0800 //RX_FDDRC_THRD_3_3 259 0x0000 //RX_FDDRC_SLANT_0_0 260 0x0000 //RX_FDDRC_SLANT_0_1 261 0x0000 //RX_FDDRC_SLANT_0_2 262 0x0000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0016 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x4000 //RX_TDDRC_ALPHA_DWN_2 186 0x4000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0700 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 197 0x8058 //RX_FDEQ_GAIN_1 198 0x5454 //RX_FDEQ_GAIN_2 199 0x545C //RX_FDEQ_GAIN_3 200 0x6448 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x5848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x485A //RX_FDEQ_GAIN_8 205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x0060 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x0600 //RX_FDDRC_THRD_2_0 252 0x0600 //RX_FDDRC_THRD_2_1 253 0x0600 //RX_FDDRC_THRD_2_2 254 0x0600 //RX_FDDRC_THRD_2_3 255 0x0800 //RX_FDDRC_THRD_3_0 256 0x0800 //RX_FDDRC_THRD_3_1 257 0x0800 //RX_FDDRC_THRD_3_2 258 0x0800 //RX_FDDRC_THRD_3_3 259 0x0000 //RX_FDDRC_SLANT_0_0 260 0x0000 //RX_FDDRC_SLANT_0_1 261 0x0000 //RX_FDDRC_SLANT_0_2 262 0x0000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x4000 //RX_TDDRC_ALPHA_DWN_2 186 0x4000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0700 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 197 0x8058 //RX_FDEQ_GAIN_1 198 0x5454 //RX_FDEQ_GAIN_2 199 0x545C //RX_FDEQ_GAIN_3 200 0x6448 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x5848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x485A //RX_FDEQ_GAIN_8 205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x0060 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x0600 //RX_FDDRC_THRD_2_0 252 0x0600 //RX_FDDRC_THRD_2_1 253 0x0600 //RX_FDDRC_THRD_2_2 254 0x0600 //RX_FDDRC_THRD_2_3 255 0x0800 //RX_FDDRC_THRD_3_0 256 0x0800 //RX_FDDRC_THRD_3_1 257 0x0800 //RX_FDDRC_THRD_3_2 258 0x0800 //RX_FDDRC_THRD_3_3 259 0x0000 //RX_FDDRC_SLANT_0_0 260 0x0000 //RX_FDDRC_SLANT_0_1 261 0x0000 //RX_FDDRC_SLANT_0_2 262 0x0000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x002E //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x4000 //RX_TDDRC_ALPHA_DWN_2 186 0x4000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0700 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 197 0x8058 //RX_FDEQ_GAIN_1 198 0x5454 //RX_FDEQ_GAIN_2 199 0x545C //RX_FDEQ_GAIN_3 200 0x6448 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x5848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x485A //RX_FDEQ_GAIN_8 205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x0060 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x0600 //RX_FDDRC_THRD_2_0 252 0x0600 //RX_FDDRC_THRD_2_1 253 0x0600 //RX_FDDRC_THRD_2_2 254 0x0600 //RX_FDDRC_THRD_2_3 255 0x0800 //RX_FDDRC_THRD_3_0 256 0x0800 //RX_FDDRC_THRD_3_1 257 0x0800 //RX_FDDRC_THRD_3_2 258 0x0800 //RX_FDDRC_THRD_3_3 259 0x0000 //RX_FDDRC_SLANT_0_0 260 0x0000 //RX_FDDRC_SLANT_0_1 261 0x0000 //RX_FDDRC_SLANT_0_2 262 0x0000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0041 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x4000 //RX_TDDRC_ALPHA_DWN_2 186 0x4000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0700 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 197 0x8058 //RX_FDEQ_GAIN_1 198 0x5454 //RX_FDEQ_GAIN_2 199 0x545C //RX_FDEQ_GAIN_3 200 0x6448 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x5848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x485A //RX_FDEQ_GAIN_8 205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x0060 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x0600 //RX_FDDRC_THRD_2_0 252 0x0600 //RX_FDDRC_THRD_2_1 253 0x0600 //RX_FDDRC_THRD_2_2 254 0x0600 //RX_FDDRC_THRD_2_3 255 0x0800 //RX_FDDRC_THRD_3_0 256 0x0800 //RX_FDDRC_THRD_3_1 257 0x0800 //RX_FDDRC_THRD_3_2 258 0x0800 //RX_FDDRC_THRD_3_3 259 0x0000 //RX_FDDRC_SLANT_0_0 260 0x0000 //RX_FDDRC_SLANT_0_1 261 0x0000 //RX_FDDRC_SLANT_0_2 262 0x0000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x4000 //RX_TDDRC_ALPHA_DWN_2 186 0x4000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0700 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 197 0x8058 //RX_FDEQ_GAIN_1 198 0x5454 //RX_FDEQ_GAIN_2 199 0x545C //RX_FDEQ_GAIN_3 200 0x6448 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x5848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x485A //RX_FDEQ_GAIN_8 205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x0060 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x0600 //RX_FDDRC_THRD_2_0 252 0x0600 //RX_FDDRC_THRD_2_1 253 0x0600 //RX_FDDRC_THRD_2_2 254 0x0600 //RX_FDDRC_THRD_2_3 255 0x0800 //RX_FDDRC_THRD_3_0 256 0x0800 //RX_FDDRC_THRD_3_1 257 0x0800 //RX_FDDRC_THRD_3_2 258 0x0800 //RX_FDDRC_THRD_3_3 259 0x0000 //RX_FDDRC_SLANT_0_0 260 0x0000 //RX_FDDRC_SLANT_0_1 261 0x0000 //RX_FDDRC_SLANT_0_2 262 0x0000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x008A //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x4000 //RX_TDDRC_ALPHA_DWN_2 186 0x4000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0700 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x8080 //RX_FDEQ_GAIN_0 197 0x8058 //RX_FDEQ_GAIN_1 198 0x5454 //RX_FDEQ_GAIN_2 199 0x545C //RX_FDEQ_GAIN_3 200 0x6448 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x5848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x485A //RX_FDEQ_GAIN_8 205 0x5A58 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x0060 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x0600 //RX_FDDRC_THRD_2_0 252 0x0600 //RX_FDDRC_THRD_2_1 253 0x0600 //RX_FDDRC_THRD_2_2 254 0x0600 //RX_FDDRC_THRD_2_3 255 0x0800 //RX_FDDRC_THRD_3_0 256 0x0800 //RX_FDDRC_THRD_3_1 257 0x0800 //RX_FDDRC_THRD_3_2 258 0x0800 //RX_FDDRC_THRD_3_3 259 0x0000 //RX_FDDRC_SLANT_0_0 260 0x0000 //RX_FDDRC_SLANT_0_1 261 0x0000 //RX_FDDRC_SLANT_0_2 262 0x0000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-WB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 2 0x0000 //TX_PATCH_REG 3 0x0200 //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x0078 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0000 //TX_MICS_OF_PAIR0 38 0x0000 //TX_MICS_OF_PAIR1 39 0x0000 //TX_MICS_OF_PAIR2 40 0x0000 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0003 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x0000 //TX_HD_BIN_MASK 53 0x0000 //TX_HD_SUBAND_MASK 54 0x0000 //TX_HD_FRAME_AVG_MASK 55 0x0000 //TX_HD_MIN_FRQ 56 0x0000 //TX_HD_ALPHA_PSD 57 0x0000 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0x0000 //TX_T_PSDVAT 63 0x0000 //TX_CNT 64 0x0000 //TX_ANTI_HOWL_GAIN 65 0x0000 //TX_MICFORBFMARK_0 66 0x0000 //TX_MICFORBFMARK_1 67 0x0000 //TX_MICFORBFMARK_2 68 0x0000 //TX_MICFORBFMARK_3 69 0x0000 //TX_MICFORBFMARK_4 70 0x0000 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x0000 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x0000 //TX_ADCS_GAIN 112 0x0000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x7FFF //TX_BLMIC_BLKFACTOR 116 0x7FFF //TX_BRMIC_BLKFACTOR 117 0x000A //TX_MICBLK_START_BIN 118 0x0041 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x0000 //TX_FE_ENER_TH_MTS 124 0x0000 //TX_FE_ENER_TH_EXP 125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x0000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0020 //TX_MIC_BLOCK_N 128 0x7652 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7800 //TX_THR_PITCH_DET_0 131 0x7000 //TX_THR_PITCH_DET_1 132 0x6000 //TX_THR_PITCH_DET_2 133 0x0000 //TX_PITCH_BFR_LEN 134 0x0000 //TX_SBD_PITCH_DET 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x2000 //TX_AEC_REF_GAIN_0 148 0x2000 //TX_AEC_REF_GAIN_1 149 0x2000 //TX_AEC_REF_GAIN_2 150 0x4000 //TX_EAD_THR 151 0x0200 //TX_THR_RE_EST 152 0x0100 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0100 //TX_MIN_EQ_RE_EST_2 155 0x0100 //TX_MIN_EQ_RE_EST_3 156 0x0100 //TX_MIN_EQ_RE_EST_4 157 0x0100 //TX_MIN_EQ_RE_EST_5 158 0x0100 //TX_MIN_EQ_RE_EST_6 159 0x0100 //TX_MIN_EQ_RE_EST_7 160 0x0100 //TX_MIN_EQ_RE_EST_8 161 0x0100 //TX_MIN_EQ_RE_EST_9 162 0x0100 //TX_MIN_EQ_RE_EST_10 163 0x0100 //TX_MIN_EQ_RE_EST_11 164 0x0100 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE 167 0x0000 //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0008 //TX_SE_HOLD_N 170 0x0050 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x0000 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x0000 //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0000 //TX_FRQ_LIN_LEN 184 0x0000 //TX_FRQ_AEC_LEN_RHO 185 0x0000 //TX_MU0_UNP_FRQ_AEC 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7333 //TX_DTD_THR1_0 198 0x7333 //TX_DTD_THR1_1 199 0x7333 //TX_DTD_THR1_2 200 0x7333 //TX_DTD_THR1_3 201 0x7333 //TX_DTD_THR1_4 202 0x7333 //TX_DTD_THR1_5 203 0x7333 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0400 //TX_DT_CUT_K 214 0x0000 //TX_DT_CUT_THR 215 0x0000 //TX_COMFORT_G 216 0x0000 //TX_POWER_YOUT_TH 217 0x0000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x0800 //TX_B_POST_FILT_ECHO_H 230 0x0000 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x0000 //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xF800 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0A00 //TX_N_SN_EST 267 0x0000 //TX_INBEAM_T 268 0x0000 //TX_INBEAMHOLDT 269 0x1FFF //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x1000 //TX_NE_RTO_TH_L 274 0x1000 //TX_MAINREFRTOH_TH_H 275 0x1000 //TX_MAINREFRTOH_TH_L 276 0x2000 //TX_MAINREFRTO_TH_H 277 0x1400 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 291 0x0014 //TX_MIN_GAIN_S_2 292 0x0014 //TX_MIN_GAIN_S_3 293 0x0014 //TX_MIN_GAIN_S_4 294 0x0014 //TX_MIN_GAIN_S_5 295 0x0014 //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x0000 //TX_NMOS_SUP 298 0x0064 //TX_NS_MAX_PRI_SNR_TH 299 0x7FFF //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x7FFF //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x2000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7E00 //TX_LAMBDA_PFILT_S_0 340 0x7E00 //TX_LAMBDA_PFILT_S_1 341 0x7E00 //TX_LAMBDA_PFILT_S_2 342 0x7E00 //TX_LAMBDA_PFILT_S_3 343 0x7E00 //TX_LAMBDA_PFILT_S_4 344 0x7E00 //TX_LAMBDA_PFILT_S_5 345 0x7E00 //TX_LAMBDA_PFILT_S_6 346 0x7E00 //TX_LAMBDA_PFILT_S_7 347 0x0010 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x0000 //TX_K_PEPPER_HF 350 0x0000 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x4000 //TX_HMNC_BST_THR 353 0x0000 //TX_DT_BINVAD_TH_0 354 0x0000 //TX_DT_BINVAD_TH_1 355 0x0000 //TX_DT_BINVAD_TH_2 356 0x0000 //TX_DT_BINVAD_TH_3 357 0x0000 //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0001 //TX_BF_SGRAD_FLG 362 0x0000 //TX_BF_DVG_TH 363 0x0000 //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT 367 0x0102 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 371 0x0032 //TX_NOISE_TH_2 372 0x3D54 //TX_NOISE_TH_3 373 0x012C //TX_NOISE_TH_4 374 0x07D0 //TX_NOISE_TH_5 375 0x6590 //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x00F8 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY 387 0x6400 //TX_OUT_ENER_TH_NOISE 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH 406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR 410 0x0080 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x2000 //TX_RHO_UPB 415 0x0020 //TX_N_HOLD_HS 416 0x0009 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0000 //TX_EXTRA_GAIN_MICBLOCK 419 0x0333 //TX_THR_STD_NSR 420 0x0219 //TX_THR_STD_PLH 421 0x09C4 //TX_N_HOLD_STD 422 0x0166 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x0000 //TX_SB_RTO_MEAN_TH_RUB 428 0x2000 //TX_WTA_EN_RTO_TH 429 0x1400 //TX_TOP_ENER_TH_F 430 0x0064 //TX_DESIRED_TALK_HOLDT 431 0x1000 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0000 //TX_HS_VAD_BIN 435 0x0000 //TX_THR_VAD_HS 436 0x0000 //TX_MEAN_RTO_MIN_TH2 437 0x0000 //TX_SILENCE_T 438 0x4000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x099A //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x001E //TX_DOA_VAD_THR_1 445 0x001E //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B 453 0x005A //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C 456 0x005A //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D 459 0x005A //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0172 //TX_BF_HOLDOFF_T 473 0x8000 //TX_DOA_COST_FACTOR 474 0x0D9A //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x071C //TX_DOA_TRACK_HT 477 0x0280 //TX_N1_HOLD_HF 478 0x0140 //TX_N2_HOLD_HF 479 0x2AAB //TX_BF_RESET_THR_HF 480 0x4000 //TX_DOA_SMOOTH 481 0x0000 //TX_MU_BF 482 0x0200 //TX_BF_MU_LF_B2 483 0x0000 //TX_BF_FC_END_BIN_B2 484 0x0000 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0000 //TX_N_DOA_SEED 488 0x0000 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x0000 //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x0000 //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x0000 //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0168 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0004 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0230 //TX_NOR_OFF_TH1 503 0xD333 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR 531 0x03E8 //TX_ENGY_THR 532 0x0000 //TX_CORR_HIGH_TH 533 0x0000 //TX_ENGY_THR_2 534 0x0000 //TX_MEAN_RTO_THR 535 0x0000 //TX_WNS_ENOISE_MIC0_TH 536 0x0000 //TX_RATIOMICL_TH 537 0x0000 //TX_CALIG_HS 538 0x000A //TX_LVL_CTRL 539 0x0000 //TX_WIND_SUPRTO 540 0x0000 //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH 545 0x0000 //TX_WNS_RESRV_0 546 0x0000 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0000 //TX_BVE_NOISE_FLOOR_1 554 0x0000 //TX_BVE_NOISE_FLOOR_2 555 0x0000 //TX_BVE_NOISE_FLOOR_3 556 0x0000 //TX_BVE_NOISE_FLOOR_4 557 0x0000 //TX_BVE_NOISE_FLOOR_5 558 0x0000 //TX_BVE_NOISE_FLOOR_6 559 0x0000 //TX_BVE_NOISE_FLOOR_7 560 0x0000 //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0000 //TX_FDEQ_BIN_0 592 0x0000 //TX_FDEQ_BIN_1 593 0x0000 //TX_FDEQ_BIN_2 594 0x0000 //TX_FDEQ_BIN_3 595 0x0000 //TX_FDEQ_BIN_4 596 0x0000 //TX_FDEQ_BIN_5 597 0x0000 //TX_FDEQ_BIN_6 598 0x0000 //TX_FDEQ_BIN_7 599 0x0000 //TX_FDEQ_BIN_8 600 0x0000 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0000 //TX_PREEQ_BIN_MIC0_0 642 0x0000 //TX_PREEQ_BIN_MIC0_1 643 0x0000 //TX_PREEQ_BIN_MIC0_2 644 0x0000 //TX_PREEQ_BIN_MIC0_3 645 0x0000 //TX_PREEQ_BIN_MIC0_4 646 0x0000 //TX_PREEQ_BIN_MIC0_5 647 0x0000 //TX_PREEQ_BIN_MIC0_6 648 0x0000 //TX_PREEQ_BIN_MIC0_7 649 0x0000 //TX_PREEQ_BIN_MIC0_8 650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0000 //TX_PREEQ_BIN_MIC1_0 691 0x0000 //TX_PREEQ_BIN_MIC1_1 692 0x0000 //TX_PREEQ_BIN_MIC1_2 693 0x0000 //TX_PREEQ_BIN_MIC1_3 694 0x0000 //TX_PREEQ_BIN_MIC1_4 695 0x0000 //TX_PREEQ_BIN_MIC1_5 696 0x0000 //TX_PREEQ_BIN_MIC1_6 697 0x0000 //TX_PREEQ_BIN_MIC1_7 698 0x0000 //TX_PREEQ_BIN_MIC1_8 699 0x0000 //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 743 0x0000 //TX_PREEQ_BIN_MIC2_4 744 0x0000 //TX_PREEQ_BIN_MIC2_5 745 0x0000 //TX_PREEQ_BIN_MIC2_6 746 0x0000 //TX_PREEQ_BIN_MIC2_7 747 0x0000 //TX_PREEQ_BIN_MIC2_8 748 0x0000 //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0064 //TX_MIC_CALIBRATION_0 766 0x006A //TX_MIC_CALIBRATION_1 767 0x006A //TX_MIC_CALIBRATION_2 768 0x006B //TX_MIC_CALIBRATION_3 769 0x0048 //TX_MIC_PWR_BIAS_0 770 0x003C //TX_MIC_PWR_BIAS_1 771 0x003C //TX_MIC_PWR_BIAS_2 772 0x003C //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 791 0x65AD //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0002 //TX_DEADMIC_SILENCE_TH 817 0x0147 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x0000 //TX_KS_NOISEPASTE_FACTOR 824 0x0000 //TX_KS_CONFIG 825 0x0000 //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x0000 //TX_FFP_FP_K_METAL 834 0x0000 //TX_A_POST_FLT_FP 835 0x0000 //TX_RTO_OUTBEAM_TH 836 0x0000 //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0000 //TX_FFP_RESRV_2 849 0x0000 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x0E80 //TX_TDDRC_THRD_2 857 0x3800 //TX_TDDRC_THRD_3 858 0x2A00 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x0000 //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0000 //TX_TDDRC_SMT_W 866 0x0100 //TX_TDDRC_DRC_GAIN 867 0x0000 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x1EB8 //TX_TFMASKLTH 870 0x170A //TX_TFMASKLTHL 871 0x7FFF //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x0000 //TX_FASTNS_OUTIN_TH 884 0x0000 //TX_FASTNS_TFMASK_TH 885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x247C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7B02 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0010 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM 39 0x8474 //RX_FDEQ_GAIN_0 40 0x6864 //RX_FDEQ_GAIN_1 41 0x6460 //RX_FDEQ_GAIN_2 42 0x6868 //RX_FDEQ_GAIN_3 43 0x6066 //RX_FDEQ_GAIN_4 44 0x605A //RX_FDEQ_GAIN_5 45 0x4C52 //RX_FDEQ_GAIN_6 46 0x4C4E //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x4E4C //RX_FDEQ_GAIN_9 49 0x4C4C //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0401 //RX_FDEQ_BIN_0 64 0x0104 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1006 //RX_FDEQ_BIN_10 74 0x1614 //RX_FDEQ_BIN_11 75 0x1414 //RX_FDEQ_BIN_12 76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x0CE0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0400 //RX_MIN_G_FP 128 0x1000 //RX_MAX_G_FP 129 0x0063 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x5357 //RX_FDEQ_GAIN_2 42 0x6571 //RX_FDEQ_GAIN_3 43 0x766D //RX_FDEQ_GAIN_4 44 0x6263 //RX_FDEQ_GAIN_5 45 0x605D //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A52 //RX_FDEQ_GAIN_11 51 0x4E4E //RX_FDEQ_GAIN_12 52 0x4B48 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1006 //RX_FDEQ_BIN_10 74 0x1614 //RX_FDEQ_BIN_11 75 0x1414 //RX_FDEQ_BIN_12 76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0042 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x5357 //RX_FDEQ_GAIN_2 42 0x6571 //RX_FDEQ_GAIN_3 43 0x766D //RX_FDEQ_GAIN_4 44 0x6263 //RX_FDEQ_GAIN_5 45 0x605D //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A52 //RX_FDEQ_GAIN_11 51 0x4E4E //RX_FDEQ_GAIN_12 52 0x4B48 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1006 //RX_FDEQ_BIN_10 74 0x1614 //RX_FDEQ_BIN_11 75 0x1414 //RX_FDEQ_BIN_12 76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0063 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x5357 //RX_FDEQ_GAIN_2 42 0x6571 //RX_FDEQ_GAIN_3 43 0x766D //RX_FDEQ_GAIN_4 44 0x6263 //RX_FDEQ_GAIN_5 45 0x605D //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A52 //RX_FDEQ_GAIN_11 51 0x4E4E //RX_FDEQ_GAIN_12 52 0x4B48 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1006 //RX_FDEQ_BIN_10 74 0x1614 //RX_FDEQ_BIN_11 75 0x1414 //RX_FDEQ_BIN_12 76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0097 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x5357 //RX_FDEQ_GAIN_2 42 0x6571 //RX_FDEQ_GAIN_3 43 0x766D //RX_FDEQ_GAIN_4 44 0x6263 //RX_FDEQ_GAIN_5 45 0x605D //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A52 //RX_FDEQ_GAIN_11 51 0x4E4E //RX_FDEQ_GAIN_12 52 0x4B48 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1006 //RX_FDEQ_BIN_10 74 0x1614 //RX_FDEQ_BIN_11 75 0x1414 //RX_FDEQ_BIN_12 76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x00DF //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x015A //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x5357 //RX_FDEQ_GAIN_2 42 0x6571 //RX_FDEQ_GAIN_3 43 0x766D //RX_FDEQ_GAIN_4 44 0x6263 //RX_FDEQ_GAIN_5 45 0x605D //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A52 //RX_FDEQ_GAIN_11 51 0x4E4E //RX_FDEQ_GAIN_12 52 0x4B48 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1006 //RX_FDEQ_BIN_10 74 0x1614 //RX_FDEQ_BIN_11 75 0x1414 //RX_FDEQ_BIN_12 76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x1C00 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x029A //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x8468 //RX_FDEQ_GAIN_0 40 0x5454 //RX_FDEQ_GAIN_1 41 0x6369 //RX_FDEQ_GAIN_2 42 0x7486 //RX_FDEQ_GAIN_3 43 0x8B86 //RX_FDEQ_GAIN_4 44 0x7572 //RX_FDEQ_GAIN_5 45 0x6F62 //RX_FDEQ_GAIN_6 46 0x6256 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A52 //RX_FDEQ_GAIN_11 51 0x4E4E //RX_FDEQ_GAIN_12 52 0x4B48 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1006 //RX_FDEQ_BIN_10 74 0x1614 //RX_FDEQ_BIN_11 75 0x1414 //RX_FDEQ_BIN_12 76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0006 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x1C00 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0504 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x8468 //RX_FDEQ_GAIN_0 40 0x5454 //RX_FDEQ_GAIN_1 41 0x6369 //RX_FDEQ_GAIN_2 42 0x7074 //RX_FDEQ_GAIN_3 43 0x808D //RX_FDEQ_GAIN_4 44 0x8D85 //RX_FDEQ_GAIN_5 45 0x7062 //RX_FDEQ_GAIN_6 46 0x5252 //RX_FDEQ_GAIN_7 47 0x5154 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A52 //RX_FDEQ_GAIN_11 51 0x4E4E //RX_FDEQ_GAIN_12 52 0x4B48 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1006 //RX_FDEQ_BIN_10 74 0x1614 //RX_FDEQ_BIN_11 75 0x1414 //RX_FDEQ_BIN_12 76 0x1404 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x027C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0001 //RX_SAMPLINGFREQ_SIG 160 0x0001 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x6000 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7B02 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0010 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x001C //RX_FDEQ_SUBNUM 196 0x6868 //RX_FDEQ_GAIN_0 197 0x6858 //RX_FDEQ_GAIN_1 198 0x5858 //RX_FDEQ_GAIN_2 199 0x5858 //RX_FDEQ_GAIN_3 200 0x5C5C //RX_FDEQ_GAIN_4 201 0x5854 //RX_FDEQ_GAIN_5 202 0x544C //RX_FDEQ_GAIN_6 203 0x4C4C //RX_FDEQ_GAIN_7 204 0x4C60 //RX_FDEQ_GAIN_8 205 0x6068 //RX_FDEQ_GAIN_9 206 0x7070 //RX_FDEQ_GAIN_10 207 0x8070 //RX_FDEQ_GAIN_11 208 0x6060 //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0204 //RX_FDEQ_BIN_5 226 0x0A0A //RX_FDEQ_BIN_6 227 0x0A0A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1C00 //RX_TDDRC_THRD_2 272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x06AF //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x0014 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x6000 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1C00 //RX_TDDRC_THRD_2 272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x06AF //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x6868 //RX_FDEQ_GAIN_0 197 0x6858 //RX_FDEQ_GAIN_1 198 0x5858 //RX_FDEQ_GAIN_2 199 0x5858 //RX_FDEQ_GAIN_3 200 0x5C5C //RX_FDEQ_GAIN_4 201 0x5854 //RX_FDEQ_GAIN_5 202 0x544C //RX_FDEQ_GAIN_6 203 0x4C4C //RX_FDEQ_GAIN_7 204 0x4C60 //RX_FDEQ_GAIN_8 205 0x6068 //RX_FDEQ_GAIN_9 206 0x7070 //RX_FDEQ_GAIN_10 207 0x8070 //RX_FDEQ_GAIN_11 208 0x6060 //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0204 //RX_FDEQ_BIN_5 226 0x0A0A //RX_FDEQ_BIN_6 227 0x0A0A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0014 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x6000 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1C00 //RX_TDDRC_THRD_2 272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x06AF //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x6868 //RX_FDEQ_GAIN_0 197 0x6858 //RX_FDEQ_GAIN_1 198 0x5858 //RX_FDEQ_GAIN_2 199 0x5858 //RX_FDEQ_GAIN_3 200 0x5C5C //RX_FDEQ_GAIN_4 201 0x5854 //RX_FDEQ_GAIN_5 202 0x544C //RX_FDEQ_GAIN_6 203 0x4C4C //RX_FDEQ_GAIN_7 204 0x4C60 //RX_FDEQ_GAIN_8 205 0x6068 //RX_FDEQ_GAIN_9 206 0x7070 //RX_FDEQ_GAIN_10 207 0x8070 //RX_FDEQ_GAIN_11 208 0x6060 //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0204 //RX_FDEQ_BIN_5 226 0x0A0A //RX_FDEQ_BIN_6 227 0x0A0A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x001A //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x6000 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1C00 //RX_TDDRC_THRD_2 272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x06AF //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x6868 //RX_FDEQ_GAIN_0 197 0x6858 //RX_FDEQ_GAIN_1 198 0x5858 //RX_FDEQ_GAIN_2 199 0x5858 //RX_FDEQ_GAIN_3 200 0x5C5C //RX_FDEQ_GAIN_4 201 0x5854 //RX_FDEQ_GAIN_5 202 0x544C //RX_FDEQ_GAIN_6 203 0x4C4C //RX_FDEQ_GAIN_7 204 0x4C60 //RX_FDEQ_GAIN_8 205 0x6068 //RX_FDEQ_GAIN_9 206 0x7070 //RX_FDEQ_GAIN_10 207 0x8070 //RX_FDEQ_GAIN_11 208 0x6060 //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0204 //RX_FDEQ_BIN_5 226 0x0A0A //RX_FDEQ_BIN_6 227 0x0A0A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0026 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x6000 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1C00 //RX_TDDRC_THRD_2 272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x06AF //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x6868 //RX_FDEQ_GAIN_0 197 0x6858 //RX_FDEQ_GAIN_1 198 0x5858 //RX_FDEQ_GAIN_2 199 0x5858 //RX_FDEQ_GAIN_3 200 0x5C5C //RX_FDEQ_GAIN_4 201 0x5854 //RX_FDEQ_GAIN_5 202 0x544C //RX_FDEQ_GAIN_6 203 0x4C4C //RX_FDEQ_GAIN_7 204 0x4C60 //RX_FDEQ_GAIN_8 205 0x6068 //RX_FDEQ_GAIN_9 206 0x7070 //RX_FDEQ_GAIN_10 207 0x8070 //RX_FDEQ_GAIN_11 208 0x6060 //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0204 //RX_FDEQ_BIN_5 226 0x0A0A //RX_FDEQ_BIN_6 227 0x0A0A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0035 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x6000 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1C00 //RX_TDDRC_THRD_2 272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x06AF //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x7878 //RX_FDEQ_GAIN_0 197 0x786C //RX_FDEQ_GAIN_1 198 0x6C6C //RX_FDEQ_GAIN_2 199 0x6262 //RX_FDEQ_GAIN_3 200 0x5A60 //RX_FDEQ_GAIN_4 201 0x7A54 //RX_FDEQ_GAIN_5 202 0x5448 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4860 //RX_FDEQ_GAIN_8 205 0x6068 //RX_FDEQ_GAIN_9 206 0x7070 //RX_FDEQ_GAIN_10 207 0x8070 //RX_FDEQ_GAIN_11 208 0x6060 //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0204 //RX_FDEQ_BIN_5 226 0x0A0A //RX_FDEQ_BIN_6 227 0x0A0A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0058 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x6000 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1C00 //RX_TDDRC_THRD_2 272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x06AF //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x7878 //RX_FDEQ_GAIN_0 197 0x786C //RX_FDEQ_GAIN_1 198 0x6C6C //RX_FDEQ_GAIN_2 199 0x6262 //RX_FDEQ_GAIN_3 200 0x5A60 //RX_FDEQ_GAIN_4 201 0x7A54 //RX_FDEQ_GAIN_5 202 0x5448 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4860 //RX_FDEQ_GAIN_8 205 0x6068 //RX_FDEQ_GAIN_9 206 0x7070 //RX_FDEQ_GAIN_10 207 0x8070 //RX_FDEQ_GAIN_11 208 0x6060 //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0204 //RX_FDEQ_BIN_5 226 0x0A0A //RX_FDEQ_BIN_6 227 0x0A0A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0085 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x6000 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1C00 //RX_TDDRC_THRD_2 272 0x1C00 //RX_TDDRC_THRD_3 273 0x7FFF //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x06AF //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x7878 //RX_FDEQ_GAIN_0 197 0x786C //RX_FDEQ_GAIN_1 198 0x6C6C //RX_FDEQ_GAIN_2 199 0x6262 //RX_FDEQ_GAIN_3 200 0x5A60 //RX_FDEQ_GAIN_4 201 0x7A54 //RX_FDEQ_GAIN_5 202 0x5448 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4860 //RX_FDEQ_GAIN_8 205 0x6068 //RX_FDEQ_GAIN_9 206 0x7070 //RX_FDEQ_GAIN_10 207 0x8070 //RX_FDEQ_GAIN_11 208 0x6060 //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0204 //RX_FDEQ_BIN_5 226 0x0A0A //RX_FDEQ_BIN_6 227 0x0A0A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 2 0x0000 //TX_PATCH_REG 3 0x0200 //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x0078 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0000 //TX_MICS_OF_PAIR0 38 0x0000 //TX_MICS_OF_PAIR1 39 0x0000 //TX_MICS_OF_PAIR2 40 0x0000 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0003 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x0000 //TX_HD_BIN_MASK 53 0x0000 //TX_HD_SUBAND_MASK 54 0x0000 //TX_HD_FRAME_AVG_MASK 55 0x0000 //TX_HD_MIN_FRQ 56 0x0000 //TX_HD_ALPHA_PSD 57 0x0000 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0x0000 //TX_T_PSDVAT 63 0x0000 //TX_CNT 64 0x0000 //TX_ANTI_HOWL_GAIN 65 0x0000 //TX_MICFORBFMARK_0 66 0x0000 //TX_MICFORBFMARK_1 67 0x0000 //TX_MICFORBFMARK_2 68 0x0000 //TX_MICFORBFMARK_3 69 0x0000 //TX_MICFORBFMARK_4 70 0x0000 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x0000 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x0000 //TX_ADCS_GAIN 112 0x0000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x7FFF //TX_BLMIC_BLKFACTOR 116 0x7FFF //TX_BRMIC_BLKFACTOR 117 0x000A //TX_MICBLK_START_BIN 118 0x0041 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x0000 //TX_FE_ENER_TH_MTS 124 0x0000 //TX_FE_ENER_TH_EXP 125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x0000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0020 //TX_MIC_BLOCK_N 128 0x7652 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7800 //TX_THR_PITCH_DET_0 131 0x7000 //TX_THR_PITCH_DET_1 132 0x6000 //TX_THR_PITCH_DET_2 133 0x0000 //TX_PITCH_BFR_LEN 134 0x0000 //TX_SBD_PITCH_DET 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x2000 //TX_AEC_REF_GAIN_0 148 0x2000 //TX_AEC_REF_GAIN_1 149 0x2000 //TX_AEC_REF_GAIN_2 150 0x4000 //TX_EAD_THR 151 0x0200 //TX_THR_RE_EST 152 0x0100 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0100 //TX_MIN_EQ_RE_EST_2 155 0x0100 //TX_MIN_EQ_RE_EST_3 156 0x0100 //TX_MIN_EQ_RE_EST_4 157 0x0100 //TX_MIN_EQ_RE_EST_5 158 0x0100 //TX_MIN_EQ_RE_EST_6 159 0x0100 //TX_MIN_EQ_RE_EST_7 160 0x0100 //TX_MIN_EQ_RE_EST_8 161 0x0100 //TX_MIN_EQ_RE_EST_9 162 0x0100 //TX_MIN_EQ_RE_EST_10 163 0x0100 //TX_MIN_EQ_RE_EST_11 164 0x0100 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE 167 0x0000 //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0008 //TX_SE_HOLD_N 170 0x0050 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x0000 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x0000 //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0000 //TX_FRQ_LIN_LEN 184 0x0000 //TX_FRQ_AEC_LEN_RHO 185 0x0000 //TX_MU0_UNP_FRQ_AEC 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7333 //TX_DTD_THR1_0 198 0x7333 //TX_DTD_THR1_1 199 0x7333 //TX_DTD_THR1_2 200 0x7333 //TX_DTD_THR1_3 201 0x7333 //TX_DTD_THR1_4 202 0x7333 //TX_DTD_THR1_5 203 0x7333 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0400 //TX_DT_CUT_K 214 0x0000 //TX_DT_CUT_THR 215 0x0000 //TX_COMFORT_G 216 0x0000 //TX_POWER_YOUT_TH 217 0x0000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x0800 //TX_B_POST_FILT_ECHO_H 230 0x0000 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x0000 //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xF800 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0A00 //TX_N_SN_EST 267 0x0000 //TX_INBEAM_T 268 0x0000 //TX_INBEAMHOLDT 269 0x1FFF //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x1000 //TX_NE_RTO_TH_L 274 0x1000 //TX_MAINREFRTOH_TH_H 275 0x1000 //TX_MAINREFRTOH_TH_L 276 0x2000 //TX_MAINREFRTO_TH_H 277 0x1400 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 291 0x0014 //TX_MIN_GAIN_S_2 292 0x0014 //TX_MIN_GAIN_S_3 293 0x0014 //TX_MIN_GAIN_S_4 294 0x0014 //TX_MIN_GAIN_S_5 295 0x0014 //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x0000 //TX_NMOS_SUP 298 0x0064 //TX_NS_MAX_PRI_SNR_TH 299 0x7FFF //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x7FFF //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x2000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7E00 //TX_LAMBDA_PFILT_S_0 340 0x7E00 //TX_LAMBDA_PFILT_S_1 341 0x7E00 //TX_LAMBDA_PFILT_S_2 342 0x7E00 //TX_LAMBDA_PFILT_S_3 343 0x7E00 //TX_LAMBDA_PFILT_S_4 344 0x7E00 //TX_LAMBDA_PFILT_S_5 345 0x7E00 //TX_LAMBDA_PFILT_S_6 346 0x7E00 //TX_LAMBDA_PFILT_S_7 347 0x0010 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x0000 //TX_K_PEPPER_HF 350 0x0000 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x4000 //TX_HMNC_BST_THR 353 0x0000 //TX_DT_BINVAD_TH_0 354 0x0000 //TX_DT_BINVAD_TH_1 355 0x0000 //TX_DT_BINVAD_TH_2 356 0x0000 //TX_DT_BINVAD_TH_3 357 0x0000 //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0001 //TX_BF_SGRAD_FLG 362 0x0000 //TX_BF_DVG_TH 363 0x0000 //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT 367 0x0383 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 371 0x0032 //TX_NOISE_TH_2 372 0x3D54 //TX_NOISE_TH_3 373 0x012C //TX_NOISE_TH_4 374 0x07D0 //TX_NOISE_TH_5 375 0x6590 //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x044C //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY 387 0x6400 //TX_OUT_ENER_TH_NOISE 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH 406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR 410 0x0080 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x2000 //TX_RHO_UPB 415 0x0020 //TX_N_HOLD_HS 416 0x0009 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0000 //TX_EXTRA_GAIN_MICBLOCK 419 0x0333 //TX_THR_STD_NSR 420 0x0219 //TX_THR_STD_PLH 421 0x09C4 //TX_N_HOLD_STD 422 0x0166 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x0000 //TX_SB_RTO_MEAN_TH_RUB 428 0x2000 //TX_WTA_EN_RTO_TH 429 0x1400 //TX_TOP_ENER_TH_F 430 0x0064 //TX_DESIRED_TALK_HOLDT 431 0x1000 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0000 //TX_HS_VAD_BIN 435 0x0000 //TX_THR_VAD_HS 436 0x0000 //TX_MEAN_RTO_MIN_TH2 437 0x0000 //TX_SILENCE_T 438 0x4000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x099A //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x001E //TX_DOA_VAD_THR_1 445 0x001E //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B 453 0x005A //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C 456 0x005A //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D 459 0x005A //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0172 //TX_BF_HOLDOFF_T 473 0x8000 //TX_DOA_COST_FACTOR 474 0x0D9A //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x071C //TX_DOA_TRACK_HT 477 0x0280 //TX_N1_HOLD_HF 478 0x0140 //TX_N2_HOLD_HF 479 0x2AAB //TX_BF_RESET_THR_HF 480 0x4000 //TX_DOA_SMOOTH 481 0x0000 //TX_MU_BF 482 0x0200 //TX_BF_MU_LF_B2 483 0x0000 //TX_BF_FC_END_BIN_B2 484 0x0000 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0000 //TX_N_DOA_SEED 488 0x0000 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x0000 //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x0000 //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x0000 //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0168 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0004 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0230 //TX_NOR_OFF_TH1 503 0xD333 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR 531 0x03E8 //TX_ENGY_THR 532 0x0000 //TX_CORR_HIGH_TH 533 0x0000 //TX_ENGY_THR_2 534 0x0000 //TX_MEAN_RTO_THR 535 0x0000 //TX_WNS_ENOISE_MIC0_TH 536 0x0000 //TX_RATIOMICL_TH 537 0x0000 //TX_CALIG_HS 538 0x000A //TX_LVL_CTRL 539 0x0000 //TX_WIND_SUPRTO 540 0x0000 //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH 545 0x0000 //TX_WNS_RESRV_0 546 0x0000 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0000 //TX_BVE_NOISE_FLOOR_1 554 0x0000 //TX_BVE_NOISE_FLOOR_2 555 0x0000 //TX_BVE_NOISE_FLOOR_3 556 0x0000 //TX_BVE_NOISE_FLOOR_4 557 0x0000 //TX_BVE_NOISE_FLOOR_5 558 0x0000 //TX_BVE_NOISE_FLOOR_6 559 0x0000 //TX_BVE_NOISE_FLOOR_7 560 0x0000 //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0000 //TX_FDEQ_BIN_0 592 0x0000 //TX_FDEQ_BIN_1 593 0x0000 //TX_FDEQ_BIN_2 594 0x0000 //TX_FDEQ_BIN_3 595 0x0000 //TX_FDEQ_BIN_4 596 0x0000 //TX_FDEQ_BIN_5 597 0x0000 //TX_FDEQ_BIN_6 598 0x0000 //TX_FDEQ_BIN_7 599 0x0000 //TX_FDEQ_BIN_8 600 0x0000 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0000 //TX_PREEQ_BIN_MIC0_0 642 0x0000 //TX_PREEQ_BIN_MIC0_1 643 0x0000 //TX_PREEQ_BIN_MIC0_2 644 0x0000 //TX_PREEQ_BIN_MIC0_3 645 0x0000 //TX_PREEQ_BIN_MIC0_4 646 0x0000 //TX_PREEQ_BIN_MIC0_5 647 0x0000 //TX_PREEQ_BIN_MIC0_6 648 0x0000 //TX_PREEQ_BIN_MIC0_7 649 0x0000 //TX_PREEQ_BIN_MIC0_8 650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0000 //TX_PREEQ_BIN_MIC1_0 691 0x0000 //TX_PREEQ_BIN_MIC1_1 692 0x0000 //TX_PREEQ_BIN_MIC1_2 693 0x0000 //TX_PREEQ_BIN_MIC1_3 694 0x0000 //TX_PREEQ_BIN_MIC1_4 695 0x0000 //TX_PREEQ_BIN_MIC1_5 696 0x0000 //TX_PREEQ_BIN_MIC1_6 697 0x0000 //TX_PREEQ_BIN_MIC1_7 698 0x0000 //TX_PREEQ_BIN_MIC1_8 699 0x0000 //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 743 0x0000 //TX_PREEQ_BIN_MIC2_4 744 0x0000 //TX_PREEQ_BIN_MIC2_5 745 0x0000 //TX_PREEQ_BIN_MIC2_6 746 0x0000 //TX_PREEQ_BIN_MIC2_7 747 0x0000 //TX_PREEQ_BIN_MIC2_8 748 0x0000 //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0064 //TX_MIC_CALIBRATION_0 766 0x006A //TX_MIC_CALIBRATION_1 767 0x006A //TX_MIC_CALIBRATION_2 768 0x006B //TX_MIC_CALIBRATION_3 769 0x0048 //TX_MIC_PWR_BIAS_0 770 0x003C //TX_MIC_PWR_BIAS_1 771 0x003C //TX_MIC_PWR_BIAS_2 772 0x003C //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 791 0x65AD //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0002 //TX_DEADMIC_SILENCE_TH 817 0x0147 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x0000 //TX_KS_NOISEPASTE_FACTOR 824 0x0000 //TX_KS_CONFIG 825 0x0000 //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x0000 //TX_FFP_FP_K_METAL 834 0x0000 //TX_A_POST_FLT_FP 835 0x0000 //TX_RTO_OUTBEAM_TH 836 0x0000 //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0000 //TX_FFP_RESRV_2 849 0x0000 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x0E80 //TX_TDDRC_THRD_2 857 0x3800 //TX_TDDRC_THRD_3 858 0x2A00 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x0000 //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0000 //TX_TDDRC_SMT_W 866 0x0100 //TX_TDDRC_DRC_GAIN 867 0x0000 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x1EB8 //TX_TFMASKLTH 870 0x170A //TX_TFMASKLTHL 871 0x7FFF //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x0000 //TX_FASTNS_OUTIN_TH 884 0x0000 //TX_FASTNS_TFMASK_TH 885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0x8000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x247C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0010 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x7C5C //RX_FDEQ_GAIN_0 40 0x5454 //RX_FDEQ_GAIN_1 41 0x5E66 //RX_FDEQ_GAIN_2 42 0x707E //RX_FDEQ_GAIN_3 43 0x867E //RX_FDEQ_GAIN_4 44 0x7572 //RX_FDEQ_GAIN_5 45 0x6F62 //RX_FDEQ_GAIN_6 46 0x6256 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0002 //RX_TDDRC_THRD_0 113 0x0006 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0400 //RX_MIN_G_FP 128 0x1000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x535A //RX_FDEQ_GAIN_2 42 0x6C76 //RX_FDEQ_GAIN_3 43 0x7D73 //RX_FDEQ_GAIN_4 44 0x6A69 //RX_FDEQ_GAIN_5 45 0x6660 //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0049 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x535A //RX_FDEQ_GAIN_2 42 0x6C76 //RX_FDEQ_GAIN_3 43 0x7D73 //RX_FDEQ_GAIN_4 44 0x6A69 //RX_FDEQ_GAIN_5 45 0x6660 //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x006B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x535A //RX_FDEQ_GAIN_2 42 0x6C76 //RX_FDEQ_GAIN_3 43 0x7D73 //RX_FDEQ_GAIN_4 44 0x6A69 //RX_FDEQ_GAIN_5 45 0x6660 //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x00A3 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x535A //RX_FDEQ_GAIN_2 42 0x6C76 //RX_FDEQ_GAIN_3 43 0x7D73 //RX_FDEQ_GAIN_4 44 0x6A69 //RX_FDEQ_GAIN_5 45 0x6660 //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x00F6 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0177 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x535A //RX_FDEQ_GAIN_2 42 0x6C76 //RX_FDEQ_GAIN_3 43 0x7D73 //RX_FDEQ_GAIN_4 44 0x6A69 //RX_FDEQ_GAIN_5 45 0x6660 //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x1C00 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x028B //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x8468 //RX_FDEQ_GAIN_0 40 0x5454 //RX_FDEQ_GAIN_1 41 0x6369 //RX_FDEQ_GAIN_2 42 0x7486 //RX_FDEQ_GAIN_3 43 0x8B86 //RX_FDEQ_GAIN_4 44 0x7572 //RX_FDEQ_GAIN_5 45 0x6F62 //RX_FDEQ_GAIN_6 46 0x6256 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0006 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x1C00 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0478 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x8468 //RX_FDEQ_GAIN_0 40 0x5454 //RX_FDEQ_GAIN_1 41 0x6369 //RX_FDEQ_GAIN_2 42 0x7074 //RX_FDEQ_GAIN_3 43 0x808D //RX_FDEQ_GAIN_4 44 0x8D85 //RX_FDEQ_GAIN_5 45 0x7062 //RX_FDEQ_GAIN_6 46 0x5252 //RX_FDEQ_GAIN_7 47 0x5154 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x027C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x6000 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0010 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x484E //RX_FDEQ_GAIN_0 197 0x4E4E //RX_FDEQ_GAIN_1 198 0x4E4E //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x484E //RX_FDEQ_GAIN_4 201 0x6E4E //RX_FDEQ_GAIN_5 202 0x4850 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4860 //RX_FDEQ_GAIN_8 205 0x7468 //RX_FDEQ_GAIN_9 206 0x6060 //RX_FDEQ_GAIN_10 207 0x6666 //RX_FDEQ_GAIN_11 208 0x6666 //RX_FDEQ_GAIN_12 209 0x6666 //RX_FDEQ_GAIN_13 210 0x6060 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0209 //RX_FDEQ_BIN_5 226 0x0808 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x7EB8 //RX_TDDRC_SLANT_0 274 0x2500 //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04BC //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x0019 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x0340 //RX_TDDRC_THRD_2 272 0x19C0 //RX_TDDRC_THRD_3 273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x7755 //RX_FDEQ_GAIN_0 197 0x4A4A //RX_FDEQ_GAIN_1 198 0x535A //RX_FDEQ_GAIN_2 199 0x6C76 //RX_FDEQ_GAIN_3 200 0x7D73 //RX_FDEQ_GAIN_4 201 0x6A69 //RX_FDEQ_GAIN_5 202 0x6660 //RX_FDEQ_GAIN_6 203 0x5756 //RX_FDEQ_GAIN_7 204 0x5554 //RX_FDEQ_GAIN_8 205 0x5B56 //RX_FDEQ_GAIN_9 206 0x5A5A //RX_FDEQ_GAIN_10 207 0x5A56 //RX_FDEQ_GAIN_11 208 0x5448 //RX_FDEQ_GAIN_12 209 0x5C6C //RX_FDEQ_GAIN_13 210 0x6056 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0301 //RX_FDEQ_BIN_0 221 0x0105 //RX_FDEQ_BIN_1 222 0x0203 //RX_FDEQ_BIN_2 223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0605 //RX_FDEQ_BIN_5 226 0x0410 //RX_FDEQ_BIN_6 227 0x050A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x100E //RX_FDEQ_BIN_10 231 0x0E32 //RX_FDEQ_BIN_11 232 0x1423 //RX_FDEQ_BIN_12 233 0x151E //RX_FDEQ_BIN_13 234 0x1E2D //RX_FDEQ_BIN_14 235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0049 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x0340 //RX_TDDRC_THRD_2 272 0x19C0 //RX_TDDRC_THRD_3 273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x7755 //RX_FDEQ_GAIN_0 197 0x4A4A //RX_FDEQ_GAIN_1 198 0x535A //RX_FDEQ_GAIN_2 199 0x6C76 //RX_FDEQ_GAIN_3 200 0x7D73 //RX_FDEQ_GAIN_4 201 0x6A69 //RX_FDEQ_GAIN_5 202 0x6660 //RX_FDEQ_GAIN_6 203 0x5756 //RX_FDEQ_GAIN_7 204 0x5554 //RX_FDEQ_GAIN_8 205 0x5B56 //RX_FDEQ_GAIN_9 206 0x5A5A //RX_FDEQ_GAIN_10 207 0x5A56 //RX_FDEQ_GAIN_11 208 0x5448 //RX_FDEQ_GAIN_12 209 0x5C6C //RX_FDEQ_GAIN_13 210 0x6056 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0301 //RX_FDEQ_BIN_0 221 0x0105 //RX_FDEQ_BIN_1 222 0x0203 //RX_FDEQ_BIN_2 223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0605 //RX_FDEQ_BIN_5 226 0x0410 //RX_FDEQ_BIN_6 227 0x050A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x100E //RX_FDEQ_BIN_10 231 0x0E32 //RX_FDEQ_BIN_11 232 0x1423 //RX_FDEQ_BIN_12 233 0x151E //RX_FDEQ_BIN_13 234 0x1E2D //RX_FDEQ_BIN_14 235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x006B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x0340 //RX_TDDRC_THRD_2 272 0x19C0 //RX_TDDRC_THRD_3 273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x7755 //RX_FDEQ_GAIN_0 197 0x4A4A //RX_FDEQ_GAIN_1 198 0x535A //RX_FDEQ_GAIN_2 199 0x6C76 //RX_FDEQ_GAIN_3 200 0x7D73 //RX_FDEQ_GAIN_4 201 0x6A69 //RX_FDEQ_GAIN_5 202 0x6660 //RX_FDEQ_GAIN_6 203 0x5756 //RX_FDEQ_GAIN_7 204 0x5554 //RX_FDEQ_GAIN_8 205 0x5B56 //RX_FDEQ_GAIN_9 206 0x5A5A //RX_FDEQ_GAIN_10 207 0x5A56 //RX_FDEQ_GAIN_11 208 0x5448 //RX_FDEQ_GAIN_12 209 0x5C6C //RX_FDEQ_GAIN_13 210 0x6056 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0301 //RX_FDEQ_BIN_0 221 0x0105 //RX_FDEQ_BIN_1 222 0x0203 //RX_FDEQ_BIN_2 223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0605 //RX_FDEQ_BIN_5 226 0x0410 //RX_FDEQ_BIN_6 227 0x050A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x100E //RX_FDEQ_BIN_10 231 0x0E32 //RX_FDEQ_BIN_11 232 0x1423 //RX_FDEQ_BIN_12 233 0x151E //RX_FDEQ_BIN_13 234 0x1E2D //RX_FDEQ_BIN_14 235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x00A3 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x0340 //RX_TDDRC_THRD_2 272 0x19C0 //RX_TDDRC_THRD_3 273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x7755 //RX_FDEQ_GAIN_0 197 0x4A4A //RX_FDEQ_GAIN_1 198 0x535A //RX_FDEQ_GAIN_2 199 0x6C76 //RX_FDEQ_GAIN_3 200 0x7D73 //RX_FDEQ_GAIN_4 201 0x6A69 //RX_FDEQ_GAIN_5 202 0x6660 //RX_FDEQ_GAIN_6 203 0x5756 //RX_FDEQ_GAIN_7 204 0x5554 //RX_FDEQ_GAIN_8 205 0x5B56 //RX_FDEQ_GAIN_9 206 0x5A5A //RX_FDEQ_GAIN_10 207 0x5A56 //RX_FDEQ_GAIN_11 208 0x5448 //RX_FDEQ_GAIN_12 209 0x5C6C //RX_FDEQ_GAIN_13 210 0x6056 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0301 //RX_FDEQ_BIN_0 221 0x0105 //RX_FDEQ_BIN_1 222 0x0203 //RX_FDEQ_BIN_2 223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0605 //RX_FDEQ_BIN_5 226 0x0410 //RX_FDEQ_BIN_6 227 0x050A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x100E //RX_FDEQ_BIN_10 231 0x0E32 //RX_FDEQ_BIN_11 232 0x1423 //RX_FDEQ_BIN_12 233 0x151E //RX_FDEQ_BIN_13 234 0x1E2D //RX_FDEQ_BIN_14 235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x00F6 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x0340 //RX_TDDRC_THRD_2 272 0x19C0 //RX_TDDRC_THRD_3 273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0177 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x7755 //RX_FDEQ_GAIN_0 197 0x4A4A //RX_FDEQ_GAIN_1 198 0x535A //RX_FDEQ_GAIN_2 199 0x6C76 //RX_FDEQ_GAIN_3 200 0x7D73 //RX_FDEQ_GAIN_4 201 0x6A69 //RX_FDEQ_GAIN_5 202 0x6660 //RX_FDEQ_GAIN_6 203 0x5756 //RX_FDEQ_GAIN_7 204 0x5554 //RX_FDEQ_GAIN_8 205 0x5B56 //RX_FDEQ_GAIN_9 206 0x5A5A //RX_FDEQ_GAIN_10 207 0x5A56 //RX_FDEQ_GAIN_11 208 0x5448 //RX_FDEQ_GAIN_12 209 0x5C6C //RX_FDEQ_GAIN_13 210 0x6056 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0301 //RX_FDEQ_BIN_0 221 0x0105 //RX_FDEQ_BIN_1 222 0x0203 //RX_FDEQ_BIN_2 223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0605 //RX_FDEQ_BIN_5 226 0x0410 //RX_FDEQ_BIN_6 227 0x050A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x100E //RX_FDEQ_BIN_10 231 0x0E32 //RX_FDEQ_BIN_11 232 0x1423 //RX_FDEQ_BIN_12 233 0x151E //RX_FDEQ_BIN_13 234 0x1E2D //RX_FDEQ_BIN_14 235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x0340 //RX_TDDRC_THRD_2 272 0x1C00 //RX_TDDRC_THRD_3 273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x028B //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x8468 //RX_FDEQ_GAIN_0 197 0x5454 //RX_FDEQ_GAIN_1 198 0x6369 //RX_FDEQ_GAIN_2 199 0x7486 //RX_FDEQ_GAIN_3 200 0x8B86 //RX_FDEQ_GAIN_4 201 0x7572 //RX_FDEQ_GAIN_5 202 0x6F62 //RX_FDEQ_GAIN_6 203 0x6256 //RX_FDEQ_GAIN_7 204 0x5554 //RX_FDEQ_GAIN_8 205 0x5B56 //RX_FDEQ_GAIN_9 206 0x5A5A //RX_FDEQ_GAIN_10 207 0x5A56 //RX_FDEQ_GAIN_11 208 0x5448 //RX_FDEQ_GAIN_12 209 0x5C6C //RX_FDEQ_GAIN_13 210 0x6056 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0301 //RX_FDEQ_BIN_0 221 0x0105 //RX_FDEQ_BIN_1 222 0x0203 //RX_FDEQ_BIN_2 223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0605 //RX_FDEQ_BIN_5 226 0x0410 //RX_FDEQ_BIN_6 227 0x050A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x100E //RX_FDEQ_BIN_10 231 0x0E32 //RX_FDEQ_BIN_11 232 0x1423 //RX_FDEQ_BIN_12 233 0x151E //RX_FDEQ_BIN_13 234 0x1E2D //RX_FDEQ_BIN_14 235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0006 //RX_TDDRC_THRD_1 271 0x0340 //RX_TDDRC_THRD_2 272 0x1C00 //RX_TDDRC_THRD_3 273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0478 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x8468 //RX_FDEQ_GAIN_0 197 0x5454 //RX_FDEQ_GAIN_1 198 0x6369 //RX_FDEQ_GAIN_2 199 0x7074 //RX_FDEQ_GAIN_3 200 0x808D //RX_FDEQ_GAIN_4 201 0x8D85 //RX_FDEQ_GAIN_5 202 0x7062 //RX_FDEQ_GAIN_6 203 0x5252 //RX_FDEQ_GAIN_7 204 0x5154 //RX_FDEQ_GAIN_8 205 0x5B56 //RX_FDEQ_GAIN_9 206 0x5A5A //RX_FDEQ_GAIN_10 207 0x5A56 //RX_FDEQ_GAIN_11 208 0x5448 //RX_FDEQ_GAIN_12 209 0x5C6C //RX_FDEQ_GAIN_13 210 0x6056 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0301 //RX_FDEQ_BIN_0 221 0x0105 //RX_FDEQ_BIN_1 222 0x0203 //RX_FDEQ_BIN_2 223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0605 //RX_FDEQ_BIN_5 226 0x0410 //RX_FDEQ_BIN_6 227 0x050A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x100E //RX_FDEQ_BIN_10 231 0x0E32 //RX_FDEQ_BIN_11 232 0x1423 //RX_FDEQ_BIN_12 233 0x151E //RX_FDEQ_BIN_13 234 0x1E2D //RX_FDEQ_BIN_14 235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-FB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 2 0x0000 //TX_PATCH_REG 3 0x0200 //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x0078 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0000 //TX_MICS_OF_PAIR0 38 0x0000 //TX_MICS_OF_PAIR1 39 0x0000 //TX_MICS_OF_PAIR2 40 0x0000 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0003 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x0000 //TX_HD_BIN_MASK 53 0x0000 //TX_HD_SUBAND_MASK 54 0x0000 //TX_HD_FRAME_AVG_MASK 55 0x0000 //TX_HD_MIN_FRQ 56 0x0000 //TX_HD_ALPHA_PSD 57 0x0000 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0x0000 //TX_T_PSDVAT 63 0x0000 //TX_CNT 64 0x0000 //TX_ANTI_HOWL_GAIN 65 0x0000 //TX_MICFORBFMARK_0 66 0x0000 //TX_MICFORBFMARK_1 67 0x0000 //TX_MICFORBFMARK_2 68 0x0000 //TX_MICFORBFMARK_3 69 0x0000 //TX_MICFORBFMARK_4 70 0x0000 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x0000 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x0000 //TX_ADCS_GAIN 112 0x0000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x7FFF //TX_BLMIC_BLKFACTOR 116 0x7FFF //TX_BRMIC_BLKFACTOR 117 0x000A //TX_MICBLK_START_BIN 118 0x0041 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x0000 //TX_FE_ENER_TH_MTS 124 0x0000 //TX_FE_ENER_TH_EXP 125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x0000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0020 //TX_MIC_BLOCK_N 128 0x7652 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7800 //TX_THR_PITCH_DET_0 131 0x7000 //TX_THR_PITCH_DET_1 132 0x6000 //TX_THR_PITCH_DET_2 133 0x0000 //TX_PITCH_BFR_LEN 134 0x0000 //TX_SBD_PITCH_DET 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x2000 //TX_AEC_REF_GAIN_0 148 0x2000 //TX_AEC_REF_GAIN_1 149 0x2000 //TX_AEC_REF_GAIN_2 150 0x4000 //TX_EAD_THR 151 0x0200 //TX_THR_RE_EST 152 0x0100 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0100 //TX_MIN_EQ_RE_EST_2 155 0x0100 //TX_MIN_EQ_RE_EST_3 156 0x0100 //TX_MIN_EQ_RE_EST_4 157 0x0100 //TX_MIN_EQ_RE_EST_5 158 0x0100 //TX_MIN_EQ_RE_EST_6 159 0x0100 //TX_MIN_EQ_RE_EST_7 160 0x0100 //TX_MIN_EQ_RE_EST_8 161 0x0100 //TX_MIN_EQ_RE_EST_9 162 0x0100 //TX_MIN_EQ_RE_EST_10 163 0x0100 //TX_MIN_EQ_RE_EST_11 164 0x0100 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE 167 0x0000 //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0008 //TX_SE_HOLD_N 170 0x0050 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x0000 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x0000 //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0000 //TX_FRQ_LIN_LEN 184 0x0000 //TX_FRQ_AEC_LEN_RHO 185 0x0000 //TX_MU0_UNP_FRQ_AEC 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7333 //TX_DTD_THR1_0 198 0x7333 //TX_DTD_THR1_1 199 0x7333 //TX_DTD_THR1_2 200 0x7333 //TX_DTD_THR1_3 201 0x7333 //TX_DTD_THR1_4 202 0x7333 //TX_DTD_THR1_5 203 0x7333 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0400 //TX_DT_CUT_K 214 0x0000 //TX_DT_CUT_THR 215 0x0000 //TX_COMFORT_G 216 0x0000 //TX_POWER_YOUT_TH 217 0x0000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x0800 //TX_B_POST_FILT_ECHO_H 230 0x0000 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x0000 //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF700 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xF800 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0A00 //TX_N_SN_EST 267 0x0000 //TX_INBEAM_T 268 0x0000 //TX_INBEAMHOLDT 269 0x1FFF //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x1000 //TX_NE_RTO_TH_L 274 0x1000 //TX_MAINREFRTOH_TH_H 275 0x1000 //TX_MAINREFRTOH_TH_L 276 0x2000 //TX_MAINREFRTO_TH_H 277 0x1400 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 291 0x0014 //TX_MIN_GAIN_S_2 292 0x0014 //TX_MIN_GAIN_S_3 293 0x0014 //TX_MIN_GAIN_S_4 294 0x0014 //TX_MIN_GAIN_S_5 295 0x0014 //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x0000 //TX_NMOS_SUP 298 0x0064 //TX_NS_MAX_PRI_SNR_TH 299 0x7FFF //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x7FFF //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x2000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7E00 //TX_LAMBDA_PFILT_S_0 340 0x7E00 //TX_LAMBDA_PFILT_S_1 341 0x7E00 //TX_LAMBDA_PFILT_S_2 342 0x7E00 //TX_LAMBDA_PFILT_S_3 343 0x7E00 //TX_LAMBDA_PFILT_S_4 344 0x7E00 //TX_LAMBDA_PFILT_S_5 345 0x7E00 //TX_LAMBDA_PFILT_S_6 346 0x7E00 //TX_LAMBDA_PFILT_S_7 347 0x0010 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x0000 //TX_K_PEPPER_HF 350 0x0000 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x4000 //TX_HMNC_BST_THR 353 0x0000 //TX_DT_BINVAD_TH_0 354 0x0000 //TX_DT_BINVAD_TH_1 355 0x0000 //TX_DT_BINVAD_TH_2 356 0x0000 //TX_DT_BINVAD_TH_3 357 0x0000 //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0001 //TX_BF_SGRAD_FLG 362 0x0000 //TX_BF_DVG_TH 363 0x0000 //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT 367 0x04E8 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 371 0x0032 //TX_NOISE_TH_2 372 0x3D54 //TX_NOISE_TH_3 373 0x012C //TX_NOISE_TH_4 374 0x07D0 //TX_NOISE_TH_5 375 0x6590 //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x02BC //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x1482 //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY 387 0x6400 //TX_OUT_ENER_TH_NOISE 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH 406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR 410 0x0080 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x2000 //TX_RHO_UPB 415 0x0020 //TX_N_HOLD_HS 416 0x0009 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0000 //TX_EXTRA_GAIN_MICBLOCK 419 0x0333 //TX_THR_STD_NSR 420 0x0219 //TX_THR_STD_PLH 421 0x09C4 //TX_N_HOLD_STD 422 0x0166 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x0000 //TX_SB_RTO_MEAN_TH_RUB 428 0x2000 //TX_WTA_EN_RTO_TH 429 0x1400 //TX_TOP_ENER_TH_F 430 0x0064 //TX_DESIRED_TALK_HOLDT 431 0x1000 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0000 //TX_HS_VAD_BIN 435 0x0000 //TX_THR_VAD_HS 436 0x0000 //TX_MEAN_RTO_MIN_TH2 437 0x0000 //TX_SILENCE_T 438 0x4000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x099A //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x001E //TX_DOA_VAD_THR_1 445 0x001E //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B 453 0x005A //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C 456 0x005A //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D 459 0x005A //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0172 //TX_BF_HOLDOFF_T 473 0x8000 //TX_DOA_COST_FACTOR 474 0x0D9A //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x071C //TX_DOA_TRACK_HT 477 0x0280 //TX_N1_HOLD_HF 478 0x0140 //TX_N2_HOLD_HF 479 0x2AAB //TX_BF_RESET_THR_HF 480 0x4000 //TX_DOA_SMOOTH 481 0x0000 //TX_MU_BF 482 0x0200 //TX_BF_MU_LF_B2 483 0x0000 //TX_BF_FC_END_BIN_B2 484 0x0000 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0000 //TX_N_DOA_SEED 488 0x0000 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x0000 //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x0000 //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x0000 //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0168 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0004 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0230 //TX_NOR_OFF_TH1 503 0xD333 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR 531 0x03E8 //TX_ENGY_THR 532 0x0000 //TX_CORR_HIGH_TH 533 0x0000 //TX_ENGY_THR_2 534 0x0000 //TX_MEAN_RTO_THR 535 0x0000 //TX_WNS_ENOISE_MIC0_TH 536 0x0000 //TX_RATIOMICL_TH 537 0x0000 //TX_CALIG_HS 538 0x000A //TX_LVL_CTRL 539 0x0000 //TX_WIND_SUPRTO 540 0x0000 //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH 545 0x0000 //TX_WNS_RESRV_0 546 0x0000 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0000 //TX_BVE_NOISE_FLOOR_1 554 0x0000 //TX_BVE_NOISE_FLOOR_2 555 0x0000 //TX_BVE_NOISE_FLOOR_3 556 0x0000 //TX_BVE_NOISE_FLOOR_4 557 0x0000 //TX_BVE_NOISE_FLOOR_5 558 0x0000 //TX_BVE_NOISE_FLOOR_6 559 0x0000 //TX_BVE_NOISE_FLOOR_7 560 0x0000 //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0000 //TX_FDEQ_BIN_0 592 0x0000 //TX_FDEQ_BIN_1 593 0x0000 //TX_FDEQ_BIN_2 594 0x0000 //TX_FDEQ_BIN_3 595 0x0000 //TX_FDEQ_BIN_4 596 0x0000 //TX_FDEQ_BIN_5 597 0x0000 //TX_FDEQ_BIN_6 598 0x0000 //TX_FDEQ_BIN_7 599 0x0000 //TX_FDEQ_BIN_8 600 0x0000 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0000 //TX_PREEQ_BIN_MIC0_0 642 0x0000 //TX_PREEQ_BIN_MIC0_1 643 0x0000 //TX_PREEQ_BIN_MIC0_2 644 0x0000 //TX_PREEQ_BIN_MIC0_3 645 0x0000 //TX_PREEQ_BIN_MIC0_4 646 0x0000 //TX_PREEQ_BIN_MIC0_5 647 0x0000 //TX_PREEQ_BIN_MIC0_6 648 0x0000 //TX_PREEQ_BIN_MIC0_7 649 0x0000 //TX_PREEQ_BIN_MIC0_8 650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0000 //TX_PREEQ_BIN_MIC1_0 691 0x0000 //TX_PREEQ_BIN_MIC1_1 692 0x0000 //TX_PREEQ_BIN_MIC1_2 693 0x0000 //TX_PREEQ_BIN_MIC1_3 694 0x0000 //TX_PREEQ_BIN_MIC1_4 695 0x0000 //TX_PREEQ_BIN_MIC1_5 696 0x0000 //TX_PREEQ_BIN_MIC1_6 697 0x0000 //TX_PREEQ_BIN_MIC1_7 698 0x0000 //TX_PREEQ_BIN_MIC1_8 699 0x0000 //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 743 0x0000 //TX_PREEQ_BIN_MIC2_4 744 0x0000 //TX_PREEQ_BIN_MIC2_5 745 0x0000 //TX_PREEQ_BIN_MIC2_6 746 0x0000 //TX_PREEQ_BIN_MIC2_7 747 0x0000 //TX_PREEQ_BIN_MIC2_8 748 0x0000 //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0064 //TX_MIC_CALIBRATION_0 766 0x006A //TX_MIC_CALIBRATION_1 767 0x006A //TX_MIC_CALIBRATION_2 768 0x006B //TX_MIC_CALIBRATION_3 769 0x0048 //TX_MIC_PWR_BIAS_0 770 0x003C //TX_MIC_PWR_BIAS_1 771 0x003C //TX_MIC_PWR_BIAS_2 772 0x003C //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 791 0x65AD //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0002 //TX_DEADMIC_SILENCE_TH 817 0x0147 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x0000 //TX_KS_NOISEPASTE_FACTOR 824 0x0000 //TX_KS_CONFIG 825 0x0000 //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x0000 //TX_FFP_FP_K_METAL 834 0x0000 //TX_A_POST_FLT_FP 835 0x0000 //TX_RTO_OUTBEAM_TH 836 0x0000 //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0000 //TX_FFP_RESRV_2 849 0x0000 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x0E80 //TX_TDDRC_THRD_2 857 0x3800 //TX_TDDRC_THRD_3 858 0x2A00 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x0000 //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0000 //TX_TDDRC_SMT_W 866 0x0100 //TX_TDDRC_DRC_GAIN 867 0x0000 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x1EB8 //TX_TFMASKLTH 870 0x170A //TX_TFMASKLTHL 871 0x7FFF //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x0000 //TX_FASTNS_OUTIN_TH 884 0x0000 //TX_FASTNS_TFMASK_TH 885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK 891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x4000 //RX_TDDRC_ALPHA_UP_1 7 0x4000 //RX_TDDRC_ALPHA_UP_2 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7E56 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0014 //RX_NS_LVL_CTRL 23 0xF400 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4850 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4568 //RX_FDEQ_GAIN_6 46 0x485C //RX_FDEQ_GAIN_7 47 0x5C60 //RX_FDEQ_GAIN_8 48 0x685C //RX_FDEQ_GAIN_9 49 0x5648 //RX_FDEQ_GAIN_10 50 0x484C //RX_FDEQ_GAIN_11 51 0x706C //RX_FDEQ_GAIN_12 52 0x7070 //RX_FDEQ_GAIN_13 53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0402 //RX_FDEQ_BIN_3 67 0x0504 //RX_FDEQ_BIN_4 68 0x0209 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x6000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x02D2 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x4000 //RX_TDDRC_ALPHA_UP_1 7 0x4000 //RX_TDDRC_ALPHA_UP_2 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x6000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4850 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4568 //RX_FDEQ_GAIN_6 46 0x485C //RX_FDEQ_GAIN_7 47 0x5C60 //RX_FDEQ_GAIN_8 48 0x685C //RX_FDEQ_GAIN_9 49 0x5648 //RX_FDEQ_GAIN_10 50 0x484C //RX_FDEQ_GAIN_11 51 0x706C //RX_FDEQ_GAIN_12 52 0x7070 //RX_FDEQ_GAIN_13 53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0402 //RX_FDEQ_BIN_3 67 0x0504 //RX_FDEQ_BIN_4 68 0x0209 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x4000 //RX_TDDRC_ALPHA_UP_1 7 0x4000 //RX_TDDRC_ALPHA_UP_2 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x6000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4850 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4568 //RX_FDEQ_GAIN_6 46 0x485C //RX_FDEQ_GAIN_7 47 0x5C60 //RX_FDEQ_GAIN_8 48 0x685C //RX_FDEQ_GAIN_9 49 0x5648 //RX_FDEQ_GAIN_10 50 0x484C //RX_FDEQ_GAIN_11 51 0x706C //RX_FDEQ_GAIN_12 52 0x7070 //RX_FDEQ_GAIN_13 53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0402 //RX_FDEQ_BIN_3 67 0x0504 //RX_FDEQ_BIN_4 68 0x0209 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x001C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x4000 //RX_TDDRC_ALPHA_UP_1 7 0x4000 //RX_TDDRC_ALPHA_UP_2 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x6000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4850 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4568 //RX_FDEQ_GAIN_6 46 0x485C //RX_FDEQ_GAIN_7 47 0x5C60 //RX_FDEQ_GAIN_8 48 0x685C //RX_FDEQ_GAIN_9 49 0x5648 //RX_FDEQ_GAIN_10 50 0x484C //RX_FDEQ_GAIN_11 51 0x706C //RX_FDEQ_GAIN_12 52 0x7070 //RX_FDEQ_GAIN_13 53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0402 //RX_FDEQ_BIN_3 67 0x0504 //RX_FDEQ_BIN_4 68 0x0209 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0028 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x4000 //RX_TDDRC_ALPHA_UP_1 7 0x4000 //RX_TDDRC_ALPHA_UP_2 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x6000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4850 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4568 //RX_FDEQ_GAIN_6 46 0x485C //RX_FDEQ_GAIN_7 47 0x5C60 //RX_FDEQ_GAIN_8 48 0x685C //RX_FDEQ_GAIN_9 49 0x5648 //RX_FDEQ_GAIN_10 50 0x484C //RX_FDEQ_GAIN_11 51 0x706C //RX_FDEQ_GAIN_12 52 0x7070 //RX_FDEQ_GAIN_13 53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0402 //RX_FDEQ_BIN_3 67 0x0504 //RX_FDEQ_BIN_4 68 0x0209 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0028 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x4000 //RX_TDDRC_ALPHA_UP_1 7 0x4000 //RX_TDDRC_ALPHA_UP_2 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x6000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4C4C //RX_FDEQ_GAIN_0 40 0x4C4C //RX_FDEQ_GAIN_1 41 0x4C48 //RX_FDEQ_GAIN_2 42 0x4870 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4568 //RX_FDEQ_GAIN_6 46 0x485C //RX_FDEQ_GAIN_7 47 0x5C60 //RX_FDEQ_GAIN_8 48 0x685C //RX_FDEQ_GAIN_9 49 0x5648 //RX_FDEQ_GAIN_10 50 0x484C //RX_FDEQ_GAIN_11 51 0x706C //RX_FDEQ_GAIN_12 52 0x7070 //RX_FDEQ_GAIN_13 53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0402 //RX_FDEQ_BIN_3 67 0x0504 //RX_FDEQ_BIN_4 68 0x0209 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0052 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x4000 //RX_TDDRC_ALPHA_UP_1 7 0x4000 //RX_TDDRC_ALPHA_UP_2 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x6000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4C4C //RX_FDEQ_GAIN_0 40 0x4C4C //RX_FDEQ_GAIN_1 41 0x4C48 //RX_FDEQ_GAIN_2 42 0x4870 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4568 //RX_FDEQ_GAIN_6 46 0x485C //RX_FDEQ_GAIN_7 47 0x5C60 //RX_FDEQ_GAIN_8 48 0x685C //RX_FDEQ_GAIN_9 49 0x5648 //RX_FDEQ_GAIN_10 50 0x484C //RX_FDEQ_GAIN_11 51 0x706C //RX_FDEQ_GAIN_12 52 0x7070 //RX_FDEQ_GAIN_13 53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0402 //RX_FDEQ_BIN_3 67 0x0504 //RX_FDEQ_BIN_4 68 0x0209 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0078 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x4000 //RX_TDDRC_ALPHA_UP_1 7 0x4000 //RX_TDDRC_ALPHA_UP_2 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x6000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4C4C //RX_FDEQ_GAIN_0 40 0x4C4C //RX_FDEQ_GAIN_1 41 0x4C48 //RX_FDEQ_GAIN_2 42 0x4870 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4568 //RX_FDEQ_GAIN_6 46 0x485C //RX_FDEQ_GAIN_7 47 0x5C60 //RX_FDEQ_GAIN_8 48 0x685C //RX_FDEQ_GAIN_9 49 0x5648 //RX_FDEQ_GAIN_10 50 0x484C //RX_FDEQ_GAIN_11 51 0x706C //RX_FDEQ_GAIN_12 52 0x7070 //RX_FDEQ_GAIN_13 53 0x6868 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0402 //RX_FDEQ_BIN_3 67 0x0504 //RX_FDEQ_BIN_4 68 0x0209 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x006C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0004 //RX_SAMPLINGFREQ_SIG 160 0x0004 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x4000 //RX_TDDRC_ALPHA_UP_1 164 0x4000 //RX_TDDRC_ALPHA_UP_2 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7E56 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0014 //RX_NS_LVL_CTRL 180 0xF400 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4850 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4568 //RX_FDEQ_GAIN_6 203 0x485C //RX_FDEQ_GAIN_7 204 0x5C60 //RX_FDEQ_GAIN_8 205 0x685C //RX_FDEQ_GAIN_9 206 0x5648 //RX_FDEQ_GAIN_10 207 0x484C //RX_FDEQ_GAIN_11 208 0x706C //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0402 //RX_FDEQ_BIN_3 224 0x0504 //RX_FDEQ_BIN_4 225 0x0209 //RX_FDEQ_BIN_5 226 0x0808 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x6000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x02D2 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x4000 //RX_TDDRC_ALPHA_UP_1 164 0x4000 //RX_TDDRC_ALPHA_UP_2 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x6000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x02D2 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4850 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4568 //RX_FDEQ_GAIN_6 203 0x485C //RX_FDEQ_GAIN_7 204 0x5C60 //RX_FDEQ_GAIN_8 205 0x685C //RX_FDEQ_GAIN_9 206 0x5648 //RX_FDEQ_GAIN_10 207 0x484C //RX_FDEQ_GAIN_11 208 0x706C //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0402 //RX_FDEQ_BIN_3 224 0x0504 //RX_FDEQ_BIN_4 225 0x0209 //RX_FDEQ_BIN_5 226 0x0808 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x4000 //RX_TDDRC_ALPHA_UP_1 164 0x4000 //RX_TDDRC_ALPHA_UP_2 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x6000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x02D2 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4850 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4568 //RX_FDEQ_GAIN_6 203 0x485C //RX_FDEQ_GAIN_7 204 0x5C60 //RX_FDEQ_GAIN_8 205 0x685C //RX_FDEQ_GAIN_9 206 0x5648 //RX_FDEQ_GAIN_10 207 0x484C //RX_FDEQ_GAIN_11 208 0x706C //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0402 //RX_FDEQ_BIN_3 224 0x0504 //RX_FDEQ_BIN_4 225 0x0209 //RX_FDEQ_BIN_5 226 0x0808 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x001C //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x4000 //RX_TDDRC_ALPHA_UP_1 164 0x4000 //RX_TDDRC_ALPHA_UP_2 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x6000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x02D2 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4850 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4568 //RX_FDEQ_GAIN_6 203 0x485C //RX_FDEQ_GAIN_7 204 0x5C60 //RX_FDEQ_GAIN_8 205 0x685C //RX_FDEQ_GAIN_9 206 0x5648 //RX_FDEQ_GAIN_10 207 0x484C //RX_FDEQ_GAIN_11 208 0x706C //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0402 //RX_FDEQ_BIN_3 224 0x0504 //RX_FDEQ_BIN_4 225 0x0209 //RX_FDEQ_BIN_5 226 0x0808 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0028 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x4000 //RX_TDDRC_ALPHA_UP_1 164 0x4000 //RX_TDDRC_ALPHA_UP_2 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x6000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x02D2 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4850 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4568 //RX_FDEQ_GAIN_6 203 0x485C //RX_FDEQ_GAIN_7 204 0x5C60 //RX_FDEQ_GAIN_8 205 0x685C //RX_FDEQ_GAIN_9 206 0x5648 //RX_FDEQ_GAIN_10 207 0x484C //RX_FDEQ_GAIN_11 208 0x706C //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0402 //RX_FDEQ_BIN_3 224 0x0504 //RX_FDEQ_BIN_4 225 0x0209 //RX_FDEQ_BIN_5 226 0x0808 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0035 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x4000 //RX_TDDRC_ALPHA_UP_1 164 0x4000 //RX_TDDRC_ALPHA_UP_2 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x6000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x02D2 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4C4C //RX_FDEQ_GAIN_0 197 0x4C4C //RX_FDEQ_GAIN_1 198 0x4C48 //RX_FDEQ_GAIN_2 199 0x4870 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4568 //RX_FDEQ_GAIN_6 203 0x485C //RX_FDEQ_GAIN_7 204 0x5C60 //RX_FDEQ_GAIN_8 205 0x685C //RX_FDEQ_GAIN_9 206 0x5648 //RX_FDEQ_GAIN_10 207 0x484C //RX_FDEQ_GAIN_11 208 0x706C //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0402 //RX_FDEQ_BIN_3 224 0x0504 //RX_FDEQ_BIN_4 225 0x0209 //RX_FDEQ_BIN_5 226 0x0808 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0052 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x4000 //RX_TDDRC_ALPHA_UP_1 164 0x4000 //RX_TDDRC_ALPHA_UP_2 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x6000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x02D2 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4C4C //RX_FDEQ_GAIN_0 197 0x4C4C //RX_FDEQ_GAIN_1 198 0x4C48 //RX_FDEQ_GAIN_2 199 0x4870 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4568 //RX_FDEQ_GAIN_6 203 0x485C //RX_FDEQ_GAIN_7 204 0x5C60 //RX_FDEQ_GAIN_8 205 0x685C //RX_FDEQ_GAIN_9 206 0x5648 //RX_FDEQ_GAIN_10 207 0x484C //RX_FDEQ_GAIN_11 208 0x706C //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0402 //RX_FDEQ_BIN_3 224 0x0504 //RX_FDEQ_BIN_4 225 0x0209 //RX_FDEQ_BIN_5 226 0x0808 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0078 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x4000 //RX_TDDRC_ALPHA_UP_1 164 0x4000 //RX_TDDRC_ALPHA_UP_2 165 0x4000 //RX_TDDRC_ALPHA_UP_3 166 0x4000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0001 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x1800 //RX_TDDRC_THRD_2 272 0x1800 //RX_TDDRC_THRD_3 273 0x6000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x4000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x02D2 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4C4C //RX_FDEQ_GAIN_0 197 0x4C4C //RX_FDEQ_GAIN_1 198 0x4C48 //RX_FDEQ_GAIN_2 199 0x4870 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4568 //RX_FDEQ_GAIN_6 203 0x485C //RX_FDEQ_GAIN_7 204 0x5C60 //RX_FDEQ_GAIN_8 205 0x685C //RX_FDEQ_GAIN_9 206 0x5648 //RX_FDEQ_GAIN_10 207 0x484C //RX_FDEQ_GAIN_11 208 0x706C //RX_FDEQ_GAIN_12 209 0x7070 //RX_FDEQ_GAIN_13 210 0x6868 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0402 //RX_FDEQ_BIN_3 224 0x0504 //RX_FDEQ_BIN_4 225 0x0209 //RX_FDEQ_BIN_5 226 0x0808 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-RESERVE2-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 2 0x0000 //TX_PATCH_REG 3 0x0200 //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x0078 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0000 //TX_MICS_OF_PAIR0 38 0x0000 //TX_MICS_OF_PAIR1 39 0x0000 //TX_MICS_OF_PAIR2 40 0x0000 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0003 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x0000 //TX_HD_BIN_MASK 53 0x0000 //TX_HD_SUBAND_MASK 54 0x0000 //TX_HD_FRAME_AVG_MASK 55 0x0000 //TX_HD_MIN_FRQ 56 0x0000 //TX_HD_ALPHA_PSD 57 0x0000 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0x0000 //TX_T_PSDVAT 63 0x0000 //TX_CNT 64 0x0000 //TX_ANTI_HOWL_GAIN 65 0x0000 //TX_MICFORBFMARK_0 66 0x0000 //TX_MICFORBFMARK_1 67 0x0000 //TX_MICFORBFMARK_2 68 0x0000 //TX_MICFORBFMARK_3 69 0x0000 //TX_MICFORBFMARK_4 70 0x0000 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x0000 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x0000 //TX_ADCS_GAIN 112 0x0000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x7FFF //TX_BLMIC_BLKFACTOR 116 0x7FFF //TX_BRMIC_BLKFACTOR 117 0x000A //TX_MICBLK_START_BIN 118 0x0041 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x0000 //TX_FE_ENER_TH_MTS 124 0x0000 //TX_FE_ENER_TH_EXP 125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x0000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0020 //TX_MIC_BLOCK_N 128 0x7652 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7800 //TX_THR_PITCH_DET_0 131 0x7000 //TX_THR_PITCH_DET_1 132 0x6000 //TX_THR_PITCH_DET_2 133 0x0000 //TX_PITCH_BFR_LEN 134 0x0000 //TX_SBD_PITCH_DET 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x2000 //TX_AEC_REF_GAIN_0 148 0x2000 //TX_AEC_REF_GAIN_1 149 0x2000 //TX_AEC_REF_GAIN_2 150 0x4000 //TX_EAD_THR 151 0x0200 //TX_THR_RE_EST 152 0x0100 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0100 //TX_MIN_EQ_RE_EST_2 155 0x0100 //TX_MIN_EQ_RE_EST_3 156 0x0100 //TX_MIN_EQ_RE_EST_4 157 0x0100 //TX_MIN_EQ_RE_EST_5 158 0x0100 //TX_MIN_EQ_RE_EST_6 159 0x0100 //TX_MIN_EQ_RE_EST_7 160 0x0100 //TX_MIN_EQ_RE_EST_8 161 0x0100 //TX_MIN_EQ_RE_EST_9 162 0x0100 //TX_MIN_EQ_RE_EST_10 163 0x0100 //TX_MIN_EQ_RE_EST_11 164 0x0100 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE 167 0x0000 //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0008 //TX_SE_HOLD_N 170 0x0050 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x0000 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x0000 //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0000 //TX_FRQ_LIN_LEN 184 0x0000 //TX_FRQ_AEC_LEN_RHO 185 0x0000 //TX_MU0_UNP_FRQ_AEC 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7333 //TX_DTD_THR1_0 198 0x7333 //TX_DTD_THR1_1 199 0x7333 //TX_DTD_THR1_2 200 0x7333 //TX_DTD_THR1_3 201 0x7333 //TX_DTD_THR1_4 202 0x7333 //TX_DTD_THR1_5 203 0x7333 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0400 //TX_DT_CUT_K 214 0x0000 //TX_DT_CUT_THR 215 0x0000 //TX_COMFORT_G 216 0x0000 //TX_POWER_YOUT_TH 217 0x0000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x0800 //TX_B_POST_FILT_ECHO_H 230 0x0000 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x0000 //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xF800 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0A00 //TX_N_SN_EST 267 0x0000 //TX_INBEAM_T 268 0x0000 //TX_INBEAMHOLDT 269 0x1FFF //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x1000 //TX_NE_RTO_TH_L 274 0x1000 //TX_MAINREFRTOH_TH_H 275 0x1000 //TX_MAINREFRTOH_TH_L 276 0x2000 //TX_MAINREFRTO_TH_H 277 0x1400 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 291 0x0014 //TX_MIN_GAIN_S_2 292 0x0014 //TX_MIN_GAIN_S_3 293 0x0014 //TX_MIN_GAIN_S_4 294 0x0014 //TX_MIN_GAIN_S_5 295 0x0014 //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x0000 //TX_NMOS_SUP 298 0x0064 //TX_NS_MAX_PRI_SNR_TH 299 0x7FFF //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x7FFF //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x2000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7E00 //TX_LAMBDA_PFILT_S_0 340 0x7E00 //TX_LAMBDA_PFILT_S_1 341 0x7E00 //TX_LAMBDA_PFILT_S_2 342 0x7E00 //TX_LAMBDA_PFILT_S_3 343 0x7E00 //TX_LAMBDA_PFILT_S_4 344 0x7E00 //TX_LAMBDA_PFILT_S_5 345 0x7E00 //TX_LAMBDA_PFILT_S_6 346 0x7E00 //TX_LAMBDA_PFILT_S_7 347 0x0010 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x0000 //TX_K_PEPPER_HF 350 0x0000 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x4000 //TX_HMNC_BST_THR 353 0x0000 //TX_DT_BINVAD_TH_0 354 0x0000 //TX_DT_BINVAD_TH_1 355 0x0000 //TX_DT_BINVAD_TH_2 356 0x0000 //TX_DT_BINVAD_TH_3 357 0x0000 //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0001 //TX_BF_SGRAD_FLG 362 0x0000 //TX_BF_DVG_TH 363 0x0000 //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT 367 0x0383 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 371 0x0032 //TX_NOISE_TH_2 372 0x3D54 //TX_NOISE_TH_3 373 0x012C //TX_NOISE_TH_4 374 0x07D0 //TX_NOISE_TH_5 375 0x6590 //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x044C //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY 387 0x6400 //TX_OUT_ENER_TH_NOISE 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH 406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR 410 0x0080 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x2000 //TX_RHO_UPB 415 0x0020 //TX_N_HOLD_HS 416 0x0009 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0000 //TX_EXTRA_GAIN_MICBLOCK 419 0x0333 //TX_THR_STD_NSR 420 0x0219 //TX_THR_STD_PLH 421 0x09C4 //TX_N_HOLD_STD 422 0x0166 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x0000 //TX_SB_RTO_MEAN_TH_RUB 428 0x2000 //TX_WTA_EN_RTO_TH 429 0x1400 //TX_TOP_ENER_TH_F 430 0x0064 //TX_DESIRED_TALK_HOLDT 431 0x1000 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0000 //TX_HS_VAD_BIN 435 0x0000 //TX_THR_VAD_HS 436 0x0000 //TX_MEAN_RTO_MIN_TH2 437 0x0000 //TX_SILENCE_T 438 0x4000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x099A //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x001E //TX_DOA_VAD_THR_1 445 0x001E //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B 453 0x005A //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C 456 0x005A //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D 459 0x005A //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0172 //TX_BF_HOLDOFF_T 473 0x8000 //TX_DOA_COST_FACTOR 474 0x0D9A //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x071C //TX_DOA_TRACK_HT 477 0x0280 //TX_N1_HOLD_HF 478 0x0140 //TX_N2_HOLD_HF 479 0x2AAB //TX_BF_RESET_THR_HF 480 0x4000 //TX_DOA_SMOOTH 481 0x0000 //TX_MU_BF 482 0x0200 //TX_BF_MU_LF_B2 483 0x0000 //TX_BF_FC_END_BIN_B2 484 0x0000 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0000 //TX_N_DOA_SEED 488 0x0000 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x0000 //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x0000 //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x0000 //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0168 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0004 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0230 //TX_NOR_OFF_TH1 503 0xD333 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR 531 0x03E8 //TX_ENGY_THR 532 0x0000 //TX_CORR_HIGH_TH 533 0x0000 //TX_ENGY_THR_2 534 0x0000 //TX_MEAN_RTO_THR 535 0x0000 //TX_WNS_ENOISE_MIC0_TH 536 0x0000 //TX_RATIOMICL_TH 537 0x0000 //TX_CALIG_HS 538 0x000A //TX_LVL_CTRL 539 0x0000 //TX_WIND_SUPRTO 540 0x0000 //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH 545 0x0000 //TX_WNS_RESRV_0 546 0x0000 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0000 //TX_BVE_NOISE_FLOOR_1 554 0x0000 //TX_BVE_NOISE_FLOOR_2 555 0x0000 //TX_BVE_NOISE_FLOOR_3 556 0x0000 //TX_BVE_NOISE_FLOOR_4 557 0x0000 //TX_BVE_NOISE_FLOOR_5 558 0x0000 //TX_BVE_NOISE_FLOOR_6 559 0x0000 //TX_BVE_NOISE_FLOOR_7 560 0x0000 //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0000 //TX_FDEQ_BIN_0 592 0x0000 //TX_FDEQ_BIN_1 593 0x0000 //TX_FDEQ_BIN_2 594 0x0000 //TX_FDEQ_BIN_3 595 0x0000 //TX_FDEQ_BIN_4 596 0x0000 //TX_FDEQ_BIN_5 597 0x0000 //TX_FDEQ_BIN_6 598 0x0000 //TX_FDEQ_BIN_7 599 0x0000 //TX_FDEQ_BIN_8 600 0x0000 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0000 //TX_PREEQ_BIN_MIC0_0 642 0x0000 //TX_PREEQ_BIN_MIC0_1 643 0x0000 //TX_PREEQ_BIN_MIC0_2 644 0x0000 //TX_PREEQ_BIN_MIC0_3 645 0x0000 //TX_PREEQ_BIN_MIC0_4 646 0x0000 //TX_PREEQ_BIN_MIC0_5 647 0x0000 //TX_PREEQ_BIN_MIC0_6 648 0x0000 //TX_PREEQ_BIN_MIC0_7 649 0x0000 //TX_PREEQ_BIN_MIC0_8 650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0000 //TX_PREEQ_BIN_MIC1_0 691 0x0000 //TX_PREEQ_BIN_MIC1_1 692 0x0000 //TX_PREEQ_BIN_MIC1_2 693 0x0000 //TX_PREEQ_BIN_MIC1_3 694 0x0000 //TX_PREEQ_BIN_MIC1_4 695 0x0000 //TX_PREEQ_BIN_MIC1_5 696 0x0000 //TX_PREEQ_BIN_MIC1_6 697 0x0000 //TX_PREEQ_BIN_MIC1_7 698 0x0000 //TX_PREEQ_BIN_MIC1_8 699 0x0000 //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 743 0x0000 //TX_PREEQ_BIN_MIC2_4 744 0x0000 //TX_PREEQ_BIN_MIC2_5 745 0x0000 //TX_PREEQ_BIN_MIC2_6 746 0x0000 //TX_PREEQ_BIN_MIC2_7 747 0x0000 //TX_PREEQ_BIN_MIC2_8 748 0x0000 //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0064 //TX_MIC_CALIBRATION_0 766 0x006A //TX_MIC_CALIBRATION_1 767 0x006A //TX_MIC_CALIBRATION_2 768 0x006B //TX_MIC_CALIBRATION_3 769 0x0048 //TX_MIC_PWR_BIAS_0 770 0x003C //TX_MIC_PWR_BIAS_1 771 0x003C //TX_MIC_PWR_BIAS_2 772 0x003C //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 791 0x65AD //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0002 //TX_DEADMIC_SILENCE_TH 817 0x0147 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x0000 //TX_KS_NOISEPASTE_FACTOR 824 0x0000 //TX_KS_CONFIG 825 0x0000 //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x0000 //TX_FFP_FP_K_METAL 834 0x0000 //TX_A_POST_FLT_FP 835 0x0000 //TX_RTO_OUTBEAM_TH 836 0x0000 //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0000 //TX_FFP_RESRV_2 849 0x0000 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x0E80 //TX_TDDRC_THRD_2 857 0x3800 //TX_TDDRC_THRD_3 858 0x2A00 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x0000 //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0000 //TX_TDDRC_SMT_W 866 0x0100 //TX_TDDRC_DRC_GAIN 867 0x0000 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x1EB8 //TX_TFMASKLTH 870 0x170A //TX_TFMASKLTHL 871 0x7FFF //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x0000 //TX_FASTNS_OUTIN_TH 884 0x0000 //TX_FASTNS_TFMASK_TH 885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0x8000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x047C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0010 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x7C5C //RX_FDEQ_GAIN_0 40 0x5454 //RX_FDEQ_GAIN_1 41 0x5E66 //RX_FDEQ_GAIN_2 42 0x707E //RX_FDEQ_GAIN_3 43 0x867E //RX_FDEQ_GAIN_4 44 0x7572 //RX_FDEQ_GAIN_5 45 0x6F62 //RX_FDEQ_GAIN_6 46 0x6256 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0002 //RX_TDDRC_THRD_0 113 0x0006 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0400 //RX_MIN_G_FP 128 0x1000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x535A //RX_FDEQ_GAIN_2 42 0x6C76 //RX_FDEQ_GAIN_3 43 0x7D73 //RX_FDEQ_GAIN_4 44 0x6A69 //RX_FDEQ_GAIN_5 45 0x6660 //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0049 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x535A //RX_FDEQ_GAIN_2 42 0x6C76 //RX_FDEQ_GAIN_3 43 0x7D73 //RX_FDEQ_GAIN_4 44 0x6A69 //RX_FDEQ_GAIN_5 45 0x6660 //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x006B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x535A //RX_FDEQ_GAIN_2 42 0x6C76 //RX_FDEQ_GAIN_3 43 0x7D73 //RX_FDEQ_GAIN_4 44 0x6A69 //RX_FDEQ_GAIN_5 45 0x6660 //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x00A3 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x535A //RX_FDEQ_GAIN_2 42 0x6C76 //RX_FDEQ_GAIN_3 43 0x7D73 //RX_FDEQ_GAIN_4 44 0x6A69 //RX_FDEQ_GAIN_5 45 0x6660 //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x00F6 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x19C0 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0177 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x7755 //RX_FDEQ_GAIN_0 40 0x4A4A //RX_FDEQ_GAIN_1 41 0x535A //RX_FDEQ_GAIN_2 42 0x6C76 //RX_FDEQ_GAIN_3 43 0x7D73 //RX_FDEQ_GAIN_4 44 0x6A69 //RX_FDEQ_GAIN_5 45 0x6660 //RX_FDEQ_GAIN_6 46 0x5756 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x1C00 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x028B //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x8468 //RX_FDEQ_GAIN_0 40 0x5454 //RX_FDEQ_GAIN_1 41 0x6369 //RX_FDEQ_GAIN_2 42 0x7486 //RX_FDEQ_GAIN_3 43 0x8B86 //RX_FDEQ_GAIN_4 44 0x7572 //RX_FDEQ_GAIN_5 45 0x6F62 //RX_FDEQ_GAIN_6 46 0x6256 //RX_FDEQ_GAIN_7 47 0x5554 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x7EB8 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x6000 //RX_TDDRC_ALPHA_DWN_3 32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0006 //RX_TDDRC_THRD_1 114 0x0340 //RX_TDDRC_THRD_2 115 0x1C00 //RX_TDDRC_THRD_3 116 0x0000 //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0478 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x8468 //RX_FDEQ_GAIN_0 40 0x5454 //RX_FDEQ_GAIN_1 41 0x6369 //RX_FDEQ_GAIN_2 42 0x7074 //RX_FDEQ_GAIN_3 43 0x808D //RX_FDEQ_GAIN_4 44 0x8D85 //RX_FDEQ_GAIN_5 45 0x7062 //RX_FDEQ_GAIN_6 46 0x5252 //RX_FDEQ_GAIN_7 47 0x5154 //RX_FDEQ_GAIN_8 48 0x5B56 //RX_FDEQ_GAIN_9 49 0x5A5A //RX_FDEQ_GAIN_10 50 0x5A56 //RX_FDEQ_GAIN_11 51 0x5448 //RX_FDEQ_GAIN_12 52 0x5C6C //RX_FDEQ_GAIN_13 53 0x6056 //RX_FDEQ_GAIN_14 54 0x9898 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0301 //RX_FDEQ_BIN_0 64 0x0105 //RX_FDEQ_BIN_1 65 0x0203 //RX_FDEQ_BIN_2 66 0x0205 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 68 0x0605 //RX_FDEQ_BIN_5 69 0x0410 //RX_FDEQ_BIN_6 70 0x050A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x100E //RX_FDEQ_BIN_10 74 0x0E32 //RX_FDEQ_BIN_11 75 0x1423 //RX_FDEQ_BIN_12 76 0x151E //RX_FDEQ_BIN_13 77 0x1E2D //RX_FDEQ_BIN_14 78 0x2D40 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0035 //RX_FDDRC_BAND_MARGIN_1 91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 92 0x0120 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x2000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x2000 //RX_FDDRC_THRD_3_2 101 0x5000 //RX_FDDRC_THRD_3_3 102 0x4000 //RX_FDDRC_SLANT_0_0 103 0x4000 //RX_FDDRC_SLANT_0_1 104 0x4000 //RX_FDDRC_SLANT_0_2 105 0x4000 //RX_FDDRC_SLANT_0_3 106 0x7FFF //RX_FDDRC_SLANT_1_0 107 0x7FFF //RX_FDDRC_SLANT_1_1 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x047C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x6000 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0010 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x484E //RX_FDEQ_GAIN_0 197 0x4E4E //RX_FDEQ_GAIN_1 198 0x4E4E //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x484E //RX_FDEQ_GAIN_4 201 0x6E4E //RX_FDEQ_GAIN_5 202 0x4850 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4860 //RX_FDEQ_GAIN_8 205 0x7468 //RX_FDEQ_GAIN_9 206 0x6060 //RX_FDEQ_GAIN_10 207 0x6666 //RX_FDEQ_GAIN_11 208 0x6666 //RX_FDEQ_GAIN_12 209 0x6666 //RX_FDEQ_GAIN_13 210 0x6060 //RX_FDEQ_GAIN_14 211 0x6060 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0209 //RX_FDEQ_BIN_5 226 0x0808 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0002 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x7EB8 //RX_TDDRC_SLANT_0 274 0x2500 //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x04BC //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x13E0 //RX_TPKA_FP 284 0x0400 //RX_MIN_G_FP 285 0x1000 //RX_MAX_G_FP 286 0x0019 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x0340 //RX_TDDRC_THRD_2 272 0x19C0 //RX_TDDRC_THRD_3 273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x7755 //RX_FDEQ_GAIN_0 197 0x4A4A //RX_FDEQ_GAIN_1 198 0x535A //RX_FDEQ_GAIN_2 199 0x6C76 //RX_FDEQ_GAIN_3 200 0x7D73 //RX_FDEQ_GAIN_4 201 0x6A69 //RX_FDEQ_GAIN_5 202 0x6660 //RX_FDEQ_GAIN_6 203 0x5756 //RX_FDEQ_GAIN_7 204 0x5554 //RX_FDEQ_GAIN_8 205 0x5B56 //RX_FDEQ_GAIN_9 206 0x5A5A //RX_FDEQ_GAIN_10 207 0x5A56 //RX_FDEQ_GAIN_11 208 0x5448 //RX_FDEQ_GAIN_12 209 0x5C6C //RX_FDEQ_GAIN_13 210 0x6056 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0301 //RX_FDEQ_BIN_0 221 0x0105 //RX_FDEQ_BIN_1 222 0x0203 //RX_FDEQ_BIN_2 223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0605 //RX_FDEQ_BIN_5 226 0x0410 //RX_FDEQ_BIN_6 227 0x050A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x100E //RX_FDEQ_BIN_10 231 0x0E32 //RX_FDEQ_BIN_11 232 0x1423 //RX_FDEQ_BIN_12 233 0x151E //RX_FDEQ_BIN_13 234 0x1E2D //RX_FDEQ_BIN_14 235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0049 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x0340 //RX_TDDRC_THRD_2 272 0x19C0 //RX_TDDRC_THRD_3 273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x7755 //RX_FDEQ_GAIN_0 197 0x4A4A //RX_FDEQ_GAIN_1 198 0x535A //RX_FDEQ_GAIN_2 199 0x6C76 //RX_FDEQ_GAIN_3 200 0x7D73 //RX_FDEQ_GAIN_4 201 0x6A69 //RX_FDEQ_GAIN_5 202 0x6660 //RX_FDEQ_GAIN_6 203 0x5756 //RX_FDEQ_GAIN_7 204 0x5554 //RX_FDEQ_GAIN_8 205 0x5B56 //RX_FDEQ_GAIN_9 206 0x5A5A //RX_FDEQ_GAIN_10 207 0x5A56 //RX_FDEQ_GAIN_11 208 0x5448 //RX_FDEQ_GAIN_12 209 0x5C6C //RX_FDEQ_GAIN_13 210 0x6056 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0301 //RX_FDEQ_BIN_0 221 0x0105 //RX_FDEQ_BIN_1 222 0x0203 //RX_FDEQ_BIN_2 223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0605 //RX_FDEQ_BIN_5 226 0x0410 //RX_FDEQ_BIN_6 227 0x050A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x100E //RX_FDEQ_BIN_10 231 0x0E32 //RX_FDEQ_BIN_11 232 0x1423 //RX_FDEQ_BIN_12 233 0x151E //RX_FDEQ_BIN_13 234 0x1E2D //RX_FDEQ_BIN_14 235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x006B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x0340 //RX_TDDRC_THRD_2 272 0x19C0 //RX_TDDRC_THRD_3 273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x7755 //RX_FDEQ_GAIN_0 197 0x4A4A //RX_FDEQ_GAIN_1 198 0x535A //RX_FDEQ_GAIN_2 199 0x6C76 //RX_FDEQ_GAIN_3 200 0x7D73 //RX_FDEQ_GAIN_4 201 0x6A69 //RX_FDEQ_GAIN_5 202 0x6660 //RX_FDEQ_GAIN_6 203 0x5756 //RX_FDEQ_GAIN_7 204 0x5554 //RX_FDEQ_GAIN_8 205 0x5B56 //RX_FDEQ_GAIN_9 206 0x5A5A //RX_FDEQ_GAIN_10 207 0x5A56 //RX_FDEQ_GAIN_11 208 0x5448 //RX_FDEQ_GAIN_12 209 0x5C6C //RX_FDEQ_GAIN_13 210 0x6056 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0301 //RX_FDEQ_BIN_0 221 0x0105 //RX_FDEQ_BIN_1 222 0x0203 //RX_FDEQ_BIN_2 223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0605 //RX_FDEQ_BIN_5 226 0x0410 //RX_FDEQ_BIN_6 227 0x050A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x100E //RX_FDEQ_BIN_10 231 0x0E32 //RX_FDEQ_BIN_11 232 0x1423 //RX_FDEQ_BIN_12 233 0x151E //RX_FDEQ_BIN_13 234 0x1E2D //RX_FDEQ_BIN_14 235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x00A3 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0002 //RX_TDDRC_THRD_1 271 0x0340 //RX_TDDRC_THRD_2 272 0x19C0 //RX_TDDRC_THRD_3 273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x7755 //RX_FDEQ_GAIN_0 197 0x4A4A //RX_FDEQ_GAIN_1 198 0x535A //RX_FDEQ_GAIN_2 199 0x6C76 //RX_FDEQ_GAIN_3 200 0x7D73 //RX_FDEQ_GAIN_4 201 0x6A69 //RX_FDEQ_GAIN_5 202 0x6660 //RX_FDEQ_GAIN_6 203 0x5756 //RX_FDEQ_GAIN_7 204 0x5554 //RX_FDEQ_GAIN_8 205 0x5B56 //RX_FDEQ_GAIN_9 206 0x5A5A //RX_FDEQ_GAIN_10 207 0x5A56 //RX_FDEQ_GAIN_11 208 0x5448 //RX_FDEQ_GAIN_12 209 0x5C6C //RX_FDEQ_GAIN_13 210 0x6056 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0301 //RX_FDEQ_BIN_0 221 0x0105 //RX_FDEQ_BIN_1 222 0x0203 //RX_FDEQ_BIN_2 223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0605 //RX_FDEQ_BIN_5 226 0x0410 //RX_FDEQ_BIN_6 227 0x050A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x100E //RX_FDEQ_BIN_10 231 0x0E32 //RX_FDEQ_BIN_11 232 0x1423 //RX_FDEQ_BIN_12 233 0x151E //RX_FDEQ_BIN_13 234 0x1E2D //RX_FDEQ_BIN_14 235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x00F6 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x0340 //RX_TDDRC_THRD_2 272 0x19C0 //RX_TDDRC_THRD_3 273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0177 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x7755 //RX_FDEQ_GAIN_0 197 0x4A4A //RX_FDEQ_GAIN_1 198 0x535A //RX_FDEQ_GAIN_2 199 0x6C76 //RX_FDEQ_GAIN_3 200 0x7D73 //RX_FDEQ_GAIN_4 201 0x6A69 //RX_FDEQ_GAIN_5 202 0x6660 //RX_FDEQ_GAIN_6 203 0x5756 //RX_FDEQ_GAIN_7 204 0x5554 //RX_FDEQ_GAIN_8 205 0x5B56 //RX_FDEQ_GAIN_9 206 0x5A5A //RX_FDEQ_GAIN_10 207 0x5A56 //RX_FDEQ_GAIN_11 208 0x5448 //RX_FDEQ_GAIN_12 209 0x5C6C //RX_FDEQ_GAIN_13 210 0x6056 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0301 //RX_FDEQ_BIN_0 221 0x0105 //RX_FDEQ_BIN_1 222 0x0203 //RX_FDEQ_BIN_2 223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0605 //RX_FDEQ_BIN_5 226 0x0410 //RX_FDEQ_BIN_6 227 0x050A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x100E //RX_FDEQ_BIN_10 231 0x0E32 //RX_FDEQ_BIN_11 232 0x1423 //RX_FDEQ_BIN_12 233 0x151E //RX_FDEQ_BIN_13 234 0x1E2D //RX_FDEQ_BIN_14 235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0004 //RX_TDDRC_THRD_1 271 0x0340 //RX_TDDRC_THRD_2 272 0x1C00 //RX_TDDRC_THRD_3 273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x028B //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x8468 //RX_FDEQ_GAIN_0 197 0x5454 //RX_FDEQ_GAIN_1 198 0x6369 //RX_FDEQ_GAIN_2 199 0x7486 //RX_FDEQ_GAIN_3 200 0x8B86 //RX_FDEQ_GAIN_4 201 0x7572 //RX_FDEQ_GAIN_5 202 0x6F62 //RX_FDEQ_GAIN_6 203 0x6256 //RX_FDEQ_GAIN_7 204 0x5554 //RX_FDEQ_GAIN_8 205 0x5B56 //RX_FDEQ_GAIN_9 206 0x5A5A //RX_FDEQ_GAIN_10 207 0x5A56 //RX_FDEQ_GAIN_11 208 0x5448 //RX_FDEQ_GAIN_12 209 0x5C6C //RX_FDEQ_GAIN_13 210 0x6056 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0301 //RX_FDEQ_BIN_0 221 0x0105 //RX_FDEQ_BIN_1 222 0x0203 //RX_FDEQ_BIN_2 223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0605 //RX_FDEQ_BIN_5 226 0x0410 //RX_FDEQ_BIN_6 227 0x050A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x100E //RX_FDEQ_BIN_10 231 0x0E32 //RX_FDEQ_BIN_11 232 0x1423 //RX_FDEQ_BIN_12 233 0x151E //RX_FDEQ_BIN_13 234 0x1E2D //RX_FDEQ_BIN_14 235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x6000 //RX_TDDRC_ALPHA_UP_1 164 0x7EB8 //RX_TDDRC_ALPHA_UP_2 165 0x6000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x6000 //RX_TDDRC_ALPHA_DWN_3 189 0x4000 //RX_TDDRC_ALPHA_DWN_4 190 0x7214 //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0002 //RX_TDDRC_THRD_0 270 0x0006 //RX_TDDRC_THRD_1 271 0x0340 //RX_TDDRC_THRD_2 272 0x1C00 //RX_TDDRC_THRD_3 273 0x0000 //RX_TDDRC_SLANT_0 274 0x7FFF //RX_TDDRC_SLANT_1 275 0x6000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0478 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x8468 //RX_FDEQ_GAIN_0 197 0x5454 //RX_FDEQ_GAIN_1 198 0x6369 //RX_FDEQ_GAIN_2 199 0x7074 //RX_FDEQ_GAIN_3 200 0x808D //RX_FDEQ_GAIN_4 201 0x8D85 //RX_FDEQ_GAIN_5 202 0x7062 //RX_FDEQ_GAIN_6 203 0x5252 //RX_FDEQ_GAIN_7 204 0x5154 //RX_FDEQ_GAIN_8 205 0x5B56 //RX_FDEQ_GAIN_9 206 0x5A5A //RX_FDEQ_GAIN_10 207 0x5A56 //RX_FDEQ_GAIN_11 208 0x5448 //RX_FDEQ_GAIN_12 209 0x5C6C //RX_FDEQ_GAIN_13 210 0x6056 //RX_FDEQ_GAIN_14 211 0x9898 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0301 //RX_FDEQ_BIN_0 221 0x0105 //RX_FDEQ_BIN_1 222 0x0203 //RX_FDEQ_BIN_2 223 0x0205 //RX_FDEQ_BIN_3 224 0x0404 //RX_FDEQ_BIN_4 225 0x0605 //RX_FDEQ_BIN_5 226 0x0410 //RX_FDEQ_BIN_6 227 0x050A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x100E //RX_FDEQ_BIN_10 231 0x0E32 //RX_FDEQ_BIN_11 232 0x1423 //RX_FDEQ_BIN_12 233 0x151E //RX_FDEQ_BIN_13 234 0x1E2D //RX_FDEQ_BIN_14 235 0x2D40 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0035 //RX_FDDRC_BAND_MARGIN_1 248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 249 0x0120 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x2000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x2000 //RX_FDDRC_THRD_3_2 258 0x5000 //RX_FDDRC_THRD_3_3 259 0x4000 //RX_FDDRC_SLANT_0_0 260 0x4000 //RX_FDDRC_SLANT_0_1 261 0x4000 //RX_FDDRC_SLANT_0_2 262 0x4000 //RX_FDDRC_SLANT_0_3 263 0x7FFF //RX_FDDRC_SLANT_1_0 264 0x7FFF //RX_FDDRC_SLANT_1_1 265 0x7FFF //RX_FDDRC_SLANT_1_2 266 0x7FFF //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-NB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0073 //TX_PATCH_REG 3 0x6F7D //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x00A3 //TX_DIST2REF1 22 0x001B //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x1000 //TX_PGA_0 28 0x1000 //TX_PGA_1 29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0002 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3A66 //TX_DIST2REF_11 73 0x053D //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0CAE //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7652 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 132 0x4000 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x0100 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7A00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x1000 //TX_MIN_EQ_RE_EST_0 153 0x0200 //TX_MIN_EQ_RE_EST_1 154 0x0200 //TX_MIN_EQ_RE_EST_2 155 0x0200 //TX_MIN_EQ_RE_EST_3 156 0x0200 //TX_MIN_EQ_RE_EST_4 157 0x0200 //TX_MIN_EQ_RE_EST_5 158 0x0200 //TX_MIN_EQ_RE_EST_6 159 0x1800 //TX_MIN_EQ_RE_EST_7 160 0x1800 //TX_MIN_EQ_RE_EST_8 161 0x3000 //TX_MIN_EQ_RE_EST_9 162 0x4000 //TX_MIN_EQ_RE_EST_10 163 0x6000 //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x05DC //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x6D60 //TX_DTD_THR1_0 198 0x6D60 //TX_DTD_THR1_1 199 0x6D60 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x157C //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x1000 //TX_ADPT_STRICT_L 222 0x1000 //TX_ADPT_STRICT_H 223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x044C //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x0001 //TX_RATIO_DT_L0_TH 228 0x4000 //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x0118 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xF900 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x7F00 //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0800 //TX_MAINREFRTO_TH_EQ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0017 //TX_NS_LVL_CTRL_1 283 0x0015 //TX_NS_LVL_CTRL_2 284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x000D //TX_MIN_GAIN_S_1 291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 294 0x0010 //TX_MIN_GAIN_S_5 295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x1000 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 303 0x2400 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x2000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x1000 //TX_A_POST_FILT_S_3 318 0x3000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 325 0x5000 //TX_B_POST_FILT_3 326 0x3000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 334 0x6000 //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 340 0x7400 //TX_LAMBDA_PFILT_S_1 341 0x7900 //TX_LAMBDA_PFILT_S_2 342 0x7000 //TX_LAMBDA_PFILT_S_3 343 0x7D00 //TX_LAMBDA_PFILT_S_4 344 0x7D00 //TX_LAMBDA_PFILT_S_5 345 0x7900 //TX_LAMBDA_PFILT_S_6 346 0x7D00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x0FA0 //TX_DT_BINVAD_ENDF 358 0x0400 //TX_C_POST_FLT_DT 359 0x4000 //TX_NS_B_POST_FLT_LESSCUT 360 0x0120 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT 367 0x0050 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x03ED //TX_NOISE_TH_2 372 0x2EE0 //TX_NOISE_TH_3 373 0x5528 //TX_NOISE_TH_4 374 0x7FFF //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 379 0x000A //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x7000 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x000A //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x007A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x5000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x0000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x7FFF //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0x3000 //TX_DEREVERB_LF_MU 515 0x34CD //TX_DEREVERB_HF_MU 516 0x0007 //TX_DEREVERB_DELAY 517 0x0004 //TX_DEREVERB_COEF_LEN 518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x3A98 //TX_GSC_RTOL_TH 522 0x3A98 //TX_GSC_RTOH_TH 523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM 567 0x5654 //TX_FDEQ_GAIN_0 568 0x4E4B //TX_FDEQ_GAIN_1 569 0x4D4E //TX_FDEQ_GAIN_2 570 0x4D4B //TX_FDEQ_GAIN_3 571 0x3C3C //TX_FDEQ_GAIN_4 572 0x3C48 //TX_FDEQ_GAIN_5 573 0x4843 //TX_FDEQ_GAIN_6 574 0x3E3B //TX_FDEQ_GAIN_7 575 0x302F //TX_FDEQ_GAIN_8 576 0x3333 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D08 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0014 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0202 //TX_PREEQ_BIN_MIC0_0 642 0x0203 //TX_PREEQ_BIN_MIC0_1 643 0x0303 //TX_PREEQ_BIN_MIC0_2 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x494A //TX_PREEQ_GAIN_MIC1_6 673 0x4B4E //TX_PREEQ_GAIN_MIC1_7 674 0x4F50 //TX_PREEQ_GAIN_MIC1_8 675 0x5255 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 696 0x0708 //TX_PREEQ_BIN_MIC1_6 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0202 //TX_PREEQ_BIN_MIC2_0 740 0x0203 //TX_PREEQ_BIN_MIC2_1 741 0x0303 //TX_PREEQ_BIN_MIC2_2 742 0x0304 //TX_PREEQ_BIN_MIC2_3 743 0x0405 //TX_PREEQ_BIN_MIC2_4 744 0x0506 //TX_PREEQ_BIN_MIC2_5 745 0x0708 //TX_PREEQ_BIN_MIC2_6 746 0x090A //TX_PREEQ_BIN_MIC2_7 747 0x0B0C //TX_PREEQ_BIN_MIC2_8 748 0x0D0E //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0065 //TX_MIC_CALIBRATION_0 766 0x0065 //TX_MIC_CALIBRATION_1 767 0x0065 //TX_MIC_CALIBRATION_2 768 0x0065 //TX_MIC_CALIBRATION_3 769 0x0044 //TX_MIC_PWR_BIAS_0 770 0x0044 //TX_MIC_PWR_BIAS_1 771 0x0044 //TX_MIC_PWR_BIAS_2 772 0x0044 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x4000 //TX_TDDRC_ALPHA_UP_01 784 0x4000 //TX_TDDRC_ALPHA_UP_02 785 0x4000 //TX_TDDRC_ALPHA_UP_03 786 0x4000 //TX_TDDRC_ALPHA_UP_04 787 0x6000 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0006 //TX_DEADMIC_SILENCE_TH 817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0096 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0004 //TX_TDDRC_THRD_0 855 0x0010 //TX_TDDRC_THRD_1 856 0x1000 //TX_TDDRC_THRD_2 857 0x1200 //TX_TDDRC_THRD_3 858 0x6000 //TX_TDDRC_SLANT_0 859 0x6000 //TX_TDDRC_SLANT_1 860 0x4000 //TX_TDDRC_ALPHA_UP_00 861 0x6000 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x0FDA //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x1000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0208 //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x7E90 //TX_DTD_THR1_MICMUTE_0 912 0x7BD4 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x4000 //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x00C0 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x7FFF //TX_MIC1MUTE_RATIO_THR 940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0100 //TX_AMS_RESRV_01 944 0x1B58 //TX_AMS_RESRV_02 945 0x6590 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x050D //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0000 //RX_PITCH_BFR_LEN 17 0x0000 //RX_SBD_PITCH_DET 18 0x0000 //RX_PP_RESRV_0 19 0x0000 //RX_PP_RESRV_1 20 0xF800 //RX_N_SN_EST 21 0x0000 //RX_N2_SN_EST 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0000 //RX_FENS_RESRV_1 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 30 0x0000 //RX_EXTRA_NS_L 31 0x0000 //RX_EXTRA_NS_A 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x0000 //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0003 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0010 //RX_MAXLEVEL_CNG 132 0x0000 //RX_BWE_UV_TH 133 0x0000 //RX_BWE_UV_TH2 134 0x0000 //RX_BWE_UV_TH3 135 0x0000 //RX_BWE_V_TH 136 0x0000 //RX_BWE_GAIN1_V_TH1 137 0x0000 //RX_BWE_GAIN1_V_TH2 138 0x0000 //RX_BWE_UV_EQ 139 0x0000 //RX_BWE_V_EQ 140 0x0000 //RX_BWE_TONE_TH 141 0x0000 //RX_BWE_UV_HOLD_T 142 0x0000 //RX_BWE_GAIN2_ALPHA 143 0x0000 //RX_BWE_GAIN3_ALPHA 144 0x0000 //RX_BWE_CUTOFF 145 0x0000 //RX_BWE_GAINFILL 146 0x0000 //RX_BWE_MAXTH_TONE 147 0x0000 //RX_BWE_EQ_0 148 0x0000 //RX_BWE_EQ_1 149 0x0000 //RX_BWE_EQ_2 150 0x0000 //RX_BWE_EQ_3 151 0x0000 //RX_BWE_EQ_4 152 0x0000 //RX_BWE_EQ_5 153 0x0000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x2040 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x050D //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0000 //RX_PITCH_BFR_LEN 174 0x0000 //RX_SBD_PITCH_DET 175 0x0000 //RX_PP_RESRV_0 176 0x0000 //RX_PP_RESRV_1 177 0xF800 //RX_N_SN_EST 178 0x0000 //RX_N2_SN_EST 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0000 //RX_FENS_RESRV_1 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 187 0x0000 //RX_EXTRA_NS_L 188 0x0000 //RX_EXTRA_NS_A 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x0000 //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0003 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x0080 //RX_MIN_G_FP 285 0x2000 //RX_MAX_G_FP 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0010 //RX_MAXLEVEL_CNG 289 0x0000 //RX_BWE_UV_TH 290 0x0000 //RX_BWE_UV_TH2 291 0x0000 //RX_BWE_UV_TH3 292 0x0000 //RX_BWE_V_TH 293 0x0000 //RX_BWE_GAIN1_V_TH1 294 0x0000 //RX_BWE_GAIN1_V_TH2 295 0x0000 //RX_BWE_UV_EQ 296 0x0000 //RX_BWE_V_EQ 297 0x0000 //RX_BWE_TONE_TH 298 0x0000 //RX_BWE_UV_HOLD_T 299 0x0000 //RX_BWE_GAIN2_ALPHA 300 0x0000 //RX_BWE_GAIN3_ALPHA 301 0x0000 //RX_BWE_CUTOFF 302 0x0000 //RX_BWE_GAINFILL 303 0x0000 //RX_BWE_MAXTH_TONE 304 0x0000 //RX_BWE_EQ_0 305 0x0000 //RX_BWE_EQ_1 306 0x0000 //RX_BWE_EQ_2 307 0x0000 //RX_BWE_EQ_3 308 0x0000 //RX_BWE_EQ_4 309 0x0000 //RX_BWE_EQ_5 310 0x0000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-WB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0073 //TX_PATCH_REG 3 0x6F7D //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x00A3 //TX_DIST2REF1 22 0x001B //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x1000 //TX_PGA_0 28 0x1000 //TX_PGA_1 29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0002 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3A66 //TX_DIST2REF_11 73 0x053D //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0C00 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7B02 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 132 0x4000 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x0300 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x6800 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x1F80 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0200 //TX_MIN_EQ_RE_EST_2 155 0x0200 //TX_MIN_EQ_RE_EST_3 156 0x0200 //TX_MIN_EQ_RE_EST_4 157 0x0200 //TX_MIN_EQ_RE_EST_5 158 0x0200 //TX_MIN_EQ_RE_EST_6 159 0x1000 //TX_MIN_EQ_RE_EST_7 160 0x1000 //TX_MIN_EQ_RE_EST_8 161 0x1000 //TX_MIN_EQ_RE_EST_9 162 0x1000 //TX_MIN_EQ_RE_EST_10 163 0x1000 //TX_MIN_EQ_RE_EST_11 164 0x1000 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x5000 //TX_GAIN_NP 169 0x02A0 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x06B0 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x765C //TX_DTD_THR1_0 198 0x765C //TX_DTD_THR1_1 199 0x765C //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 204 0x5000 //TX_DTD_THR2_0 205 0x5000 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 209 0x5000 //TX_DTD_THR2_5 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x07D0 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H 223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x0154 //TX_RATIO_DT_L_TH_HIGH 226 0x4588 //TX_RATIO_DT_H_TH_HIGH 227 0x0001 //TX_RATIO_DT_L0_TH 228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x0258 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0018 //TX_NS_LVL_CTRL_2 284 0x0016 //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 293 0x0010 //TX_MIN_GAIN_S_4 294 0x0010 //TX_MIN_GAIN_S_5 295 0x0010 //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x6000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x4000 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x50C0 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 315 0x4C00 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x6000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 341 0x7A00 //TX_LAMBDA_PFILT_S_2 342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 346 0x7C00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x4000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0180 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT 367 0x0032 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x017E //TX_NOISE_TH_1 371 0x0230 //TX_NOISE_TH_2 372 0x3492 //TX_NOISE_TH_3 373 0x4E20 //TX_NOISE_TH_4 374 0x55B8 //TX_NOISE_TH_5 375 0x49E6 //TX_NOISE_TH_5_2 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x7999 //TX_RATIODTL_CUT_TH 383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x7FFF //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0005 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x0033 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x0000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x4000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0x3000 //TX_DEREVERB_LF_MU 515 0x34CD //TX_DEREVERB_HF_MU 516 0x0007 //TX_DEREVERB_DELAY 517 0x0004 //TX_DEREVERB_COEF_LEN 518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x3A98 //TX_GSC_RTOL_TH 522 0x3A98 //TX_GSC_RTOH_TH 523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x001C //TX_FDEQ_SUBNUM 567 0x5448 //TX_FDEQ_GAIN_0 568 0x4847 //TX_FDEQ_GAIN_1 569 0x4C4E //TX_FDEQ_GAIN_2 570 0x4E49 //TX_FDEQ_GAIN_3 571 0x4440 //TX_FDEQ_GAIN_4 572 0x484E //TX_FDEQ_GAIN_5 573 0x4F53 //TX_FDEQ_GAIN_6 574 0x544C //TX_FDEQ_GAIN_7 575 0x4547 //TX_FDEQ_GAIN_8 576 0x4542 //TX_FDEQ_GAIN_9 577 0x383A //TX_FDEQ_GAIN_10 578 0x3C40 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x0E0F //TX_FDEQ_BIN_10 602 0x0F10 //TX_FDEQ_BIN_11 603 0x1011 //TX_FDEQ_BIN_12 604 0x1104 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0202 //TX_PREEQ_BIN_MIC0_0 642 0x0203 //TX_PREEQ_BIN_MIC0_1 643 0x0303 //TX_PREEQ_BIN_MIC0_2 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0F10 //TX_PREEQ_BIN_MIC0_10 652 0x1011 //TX_PREEQ_BIN_MIC0_11 653 0x1104 //TX_PREEQ_BIN_MIC0_12 654 0x101B //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x494A //TX_PREEQ_GAIN_MIC1_6 673 0x4B4E //TX_PREEQ_GAIN_MIC1_7 674 0x4F50 //TX_PREEQ_GAIN_MIC1_8 675 0x5254 //TX_PREEQ_GAIN_MIC1_9 676 0x5659 //TX_PREEQ_GAIN_MIC1_10 677 0x5C5E //TX_PREEQ_GAIN_MIC1_11 678 0x6265 //TX_PREEQ_GAIN_MIC1_12 679 0x6970 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 696 0x0708 //TX_PREEQ_BIN_MIC1_6 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0F10 //TX_PREEQ_BIN_MIC1_10 701 0x1011 //TX_PREEQ_BIN_MIC1_11 702 0x1104 //TX_PREEQ_BIN_MIC1_12 703 0x101B //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4746 //TX_PREEQ_GAIN_MIC2_14 730 0x4544 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0608 //TX_PREEQ_BIN_MIC2_0 740 0x0808 //TX_PREEQ_BIN_MIC2_1 741 0x0808 //TX_PREEQ_BIN_MIC2_2 742 0x0808 //TX_PREEQ_BIN_MIC2_3 743 0x0808 //TX_PREEQ_BIN_MIC2_4 744 0x0808 //TX_PREEQ_BIN_MIC2_5 745 0x0808 //TX_PREEQ_BIN_MIC2_6 746 0x0808 //TX_PREEQ_BIN_MIC2_7 747 0x0808 //TX_PREEQ_BIN_MIC2_8 748 0x0808 //TX_PREEQ_BIN_MIC2_9 749 0x0808 //TX_PREEQ_BIN_MIC2_10 750 0x0808 //TX_PREEQ_BIN_MIC2_11 751 0x0808 //TX_PREEQ_BIN_MIC2_12 752 0x0808 //TX_PREEQ_BIN_MIC2_13 753 0x0808 //TX_PREEQ_BIN_MIC2_14 754 0x020E //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0062 //TX_MIC_CALIBRATION_0 766 0x0062 //TX_MIC_CALIBRATION_1 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x0800 //TX_TDDRC_ALPHA_UP_01 784 0x0800 //TX_TDDRC_ALPHA_UP_02 785 0x0800 //TX_TDDRC_ALPHA_UP_03 786 0x0800 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0006 //TX_DEADMIC_SILENCE_TH 817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0096 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0001 //TX_TDDRC_THRD_0 855 0x0002 //TX_TDDRC_THRD_1 856 0x1000 //TX_TDDRC_THRD_2 857 0x1200 //TX_TDDRC_THRD_3 858 0x6000 //TX_TDDRC_SLANT_0 859 0x6000 //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x10CA //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x028A //TX_MICMUTE_RATIO_THR 900 0x026C //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0C00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x7148 //TX_DTD_THR1_MICMUTE_0 912 0x7FFF //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x3A98 //TX_DTD_THR1_MICMUTE_3 915 0x4000 //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0100 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x7FFF //TX_MIC1MUTE_RATIO_THR 940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0100 //TX_AMS_RESRV_01 944 0x3A98 //TX_AMS_RESRV_02 945 0x7000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x050D //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0000 //RX_PITCH_BFR_LEN 17 0x0000 //RX_SBD_PITCH_DET 18 0x0000 //RX_PP_RESRV_0 19 0x0000 //RX_PP_RESRV_1 20 0xF800 //RX_N_SN_EST 21 0x0000 //RX_N2_SN_EST 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0000 //RX_FENS_RESRV_1 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 30 0x0000 //RX_EXTRA_NS_L 31 0x0000 //RX_EXTRA_NS_A 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x0000 //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0003 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0010 //RX_MAXLEVEL_CNG 132 0x0000 //RX_BWE_UV_TH 133 0x0000 //RX_BWE_UV_TH2 134 0x0000 //RX_BWE_UV_TH3 135 0x0000 //RX_BWE_V_TH 136 0x0000 //RX_BWE_GAIN1_V_TH1 137 0x0000 //RX_BWE_GAIN1_V_TH2 138 0x0000 //RX_BWE_UV_EQ 139 0x0000 //RX_BWE_V_EQ 140 0x0000 //RX_BWE_TONE_TH 141 0x0000 //RX_BWE_UV_HOLD_T 142 0x0000 //RX_BWE_GAIN2_ALPHA 143 0x0000 //RX_BWE_GAIN3_ALPHA 144 0x0000 //RX_BWE_CUTOFF 145 0x0000 //RX_BWE_GAINFILL 146 0x0000 //RX_BWE_MAXTH_TONE 147 0x0000 //RX_BWE_EQ_0 148 0x0000 //RX_BWE_EQ_1 149 0x0000 //RX_BWE_EQ_2 150 0x0000 //RX_BWE_EQ_3 151 0x0000 //RX_BWE_EQ_4 152 0x0000 //RX_BWE_EQ_5 153 0x0000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x2040 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x050D //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0000 //RX_PITCH_BFR_LEN 174 0x0000 //RX_SBD_PITCH_DET 175 0x0000 //RX_PP_RESRV_0 176 0x0000 //RX_PP_RESRV_1 177 0xF800 //RX_N_SN_EST 178 0x0000 //RX_N2_SN_EST 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0000 //RX_FENS_RESRV_1 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 187 0x0000 //RX_EXTRA_NS_L 188 0x0000 //RX_EXTRA_NS_A 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x0000 //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0003 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x0080 //RX_MIN_G_FP 285 0x2000 //RX_MAX_G_FP 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0010 //RX_MAXLEVEL_CNG 289 0x0000 //RX_BWE_UV_TH 290 0x0000 //RX_BWE_UV_TH2 291 0x0000 //RX_BWE_UV_TH3 292 0x0000 //RX_BWE_V_TH 293 0x0000 //RX_BWE_GAIN1_V_TH1 294 0x0000 //RX_BWE_GAIN1_V_TH2 295 0x0000 //RX_BWE_UV_EQ 296 0x0000 //RX_BWE_V_EQ 297 0x0000 //RX_BWE_TONE_TH 298 0x0000 //RX_BWE_UV_HOLD_T 299 0x0000 //RX_BWE_GAIN2_ALPHA 300 0x0000 //RX_BWE_GAIN3_ALPHA 301 0x0000 //RX_BWE_CUTOFF 302 0x0000 //RX_BWE_GAINFILL 303 0x0000 //RX_BWE_MAXTH_TONE 304 0x0000 //RX_BWE_EQ_0 305 0x0000 //RX_BWE_EQ_1 306 0x0000 //RX_BWE_EQ_2 307 0x0000 //RX_BWE_EQ_3 308 0x0000 //RX_BWE_EQ_4 309 0x0000 //RX_BWE_EQ_5 310 0x0000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x00F3 //TX_PATCH_REG 3 0x6F7D //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x00A3 //TX_DIST2REF1 22 0x001B //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x1000 //TX_PGA_0 28 0x1000 //TX_PGA_1 29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0002 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3B33 //TX_DIST2REF_11 73 0x0A70 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0CAE //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7B02 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 132 0x4000 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x0400 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7600 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x1000 //TX_MIN_EQ_RE_EST_0 153 0x0600 //TX_MIN_EQ_RE_EST_1 154 0x3000 //TX_MIN_EQ_RE_EST_2 155 0x3000 //TX_MIN_EQ_RE_EST_3 156 0x3000 //TX_MIN_EQ_RE_EST_4 157 0x3000 //TX_MIN_EQ_RE_EST_5 158 0x3000 //TX_MIN_EQ_RE_EST_6 159 0x1000 //TX_MIN_EQ_RE_EST_7 160 0x7800 //TX_MIN_EQ_RE_EST_8 161 0x7800 //TX_MIN_EQ_RE_EST_9 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 165 0x3000 //TX_LAMBDA_RE_EST 166 0x3000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0270 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x0880 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7148 //TX_DTD_THR1_0 198 0x7148 //TX_DTD_THR1_1 199 0x7148 //TX_DTD_THR1_2 200 0x7148 //TX_DTD_THR1_3 201 0x7148 //TX_DTD_THR1_4 202 0x7700 //TX_DTD_THR1_5 203 0x7148 //TX_DTD_THR1_6 204 0x7E00 //TX_DTD_THR2_0 205 0x7E00 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 209 0x5000 //TX_DTD_THR2_5 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x1770 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x7FFF //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H 223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x02BC //TX_RATIO_DT_L_TH_HIGH 226 0x5208 //TX_RATIO_DT_H_TH_HIGH 227 0x0001 //TX_RATIO_DT_L0_TH 228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x0190 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 253 0x0000 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x001A //TX_NS_LVL_CTRL_1 283 0x0024 //TX_NS_LVL_CTRL_2 284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x0020 //TX_MIN_GAIN_S_0 290 0x0020 //TX_MIN_GAIN_S_1 291 0x0020 //TX_MIN_GAIN_S_2 292 0x0020 //TX_MIN_GAIN_S_3 293 0x0020 //TX_MIN_GAIN_S_4 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 296 0x0020 //TX_MIN_GAIN_S_7 297 0x6000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x4000 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7FFF //TX_A_POST_FILT_S_0 315 0x7FFF //TX_A_POST_FILT_S_1 316 0x7FFF //TX_A_POST_FILT_S_2 317 0x7FFF //TX_A_POST_FILT_S_3 318 0x7FFF //TX_A_POST_FILT_S_4 319 0x7FFF //TX_A_POST_FILT_S_5 320 0x7FFF //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7F00 //TX_LAMBDA_PFILT 339 0x7F00 //TX_LAMBDA_PFILT_S_0 340 0x7F00 //TX_LAMBDA_PFILT_S_1 341 0x7F00 //TX_LAMBDA_PFILT_S_2 342 0x7F00 //TX_LAMBDA_PFILT_S_3 343 0x7F00 //TX_LAMBDA_PFILT_S_4 344 0x7F00 //TX_LAMBDA_PFILT_S_5 345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7F00 //TX_LAMBDA_PFILT_S_7 347 0x1000 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0040 //TX_DT_BINVAD_TH_0 354 0x0040 //TX_DT_BINVAD_TH_1 355 0x0100 //TX_DT_BINVAD_TH_2 356 0x0100 //TX_DT_BINVAD_TH_3 357 0x36B0 //TX_DT_BINVAD_ENDF 358 0x0200 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0140 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT 367 0x0050 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x01F4 //TX_NOISE_TH_2 372 0x36B0 //TX_NOISE_TH_3 373 0x2710 //TX_NOISE_TH_4 374 0x2CEC //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 379 0x0050 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x07D0 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0005 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x0050 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x0000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x2000 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x4000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0x3000 //TX_DEREVERB_LF_MU 515 0x34CD //TX_DEREVERB_HF_MU 516 0x0007 //TX_DEREVERB_DELAY 517 0x0004 //TX_DEREVERB_COEF_LEN 518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x3A98 //TX_GSC_RTOL_TH 522 0x3A98 //TX_GSC_RTOH_TH 523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4850 //TX_FDEQ_GAIN_5 573 0x5261 //TX_FDEQ_GAIN_6 574 0x5C4C //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 576 0x484C //TX_FDEQ_GAIN_9 577 0x4E50 //TX_FDEQ_GAIN_10 578 0x5355 //TX_FDEQ_GAIN_11 579 0x5B5F //TX_FDEQ_GAIN_12 580 0x5F84 //TX_FDEQ_GAIN_13 581 0x8476 //TX_FDEQ_GAIN_14 582 0x6A71 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x1013 //TX_FDEQ_BIN_10 602 0x1719 //TX_FDEQ_BIN_11 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 606 0x284A //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0202 //TX_PREEQ_BIN_MIC0_0 642 0x0203 //TX_PREEQ_BIN_MIC0_1 643 0x0303 //TX_PREEQ_BIN_MIC0_2 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1719 //TX_PREEQ_BIN_MIC0_11 653 0x1B1E //TX_PREEQ_BIN_MIC0_12 654 0x1E1E //TX_PREEQ_BIN_MIC0_13 655 0x1E28 //TX_PREEQ_BIN_MIC0_14 656 0x3042 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x494A //TX_PREEQ_GAIN_MIC1_6 673 0x494A //TX_PREEQ_GAIN_MIC1_7 674 0x4B4C //TX_PREEQ_GAIN_MIC1_8 675 0x4D4E //TX_PREEQ_GAIN_MIC1_9 676 0x4F52 //TX_PREEQ_GAIN_MIC1_10 677 0x5458 //TX_PREEQ_GAIN_MIC1_11 678 0x5B62 //TX_PREEQ_GAIN_MIC1_12 679 0x6A66 //TX_PREEQ_GAIN_MIC1_13 680 0x543E //TX_PREEQ_GAIN_MIC1_14 681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 696 0x0708 //TX_PREEQ_BIN_MIC1_6 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x1013 //TX_PREEQ_BIN_MIC1_10 701 0x1719 //TX_PREEQ_BIN_MIC1_11 702 0x1B1E //TX_PREEQ_BIN_MIC1_12 703 0x1E1E //TX_PREEQ_BIN_MIC1_13 704 0x1E28 //TX_PREEQ_BIN_MIC1_14 705 0x3042 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4644 //TX_PREEQ_GAIN_MIC2_12 728 0x4240 //TX_PREEQ_GAIN_MIC2_13 729 0x4041 //TX_PREEQ_GAIN_MIC2_14 730 0x455E //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0202 //TX_PREEQ_BIN_MIC2_0 740 0x0203 //TX_PREEQ_BIN_MIC2_1 741 0x0303 //TX_PREEQ_BIN_MIC2_2 742 0x0304 //TX_PREEQ_BIN_MIC2_3 743 0x0405 //TX_PREEQ_BIN_MIC2_4 744 0x0506 //TX_PREEQ_BIN_MIC2_5 745 0x0708 //TX_PREEQ_BIN_MIC2_6 746 0x090A //TX_PREEQ_BIN_MIC2_7 747 0x0B0C //TX_PREEQ_BIN_MIC2_8 748 0x0D0E //TX_PREEQ_BIN_MIC2_9 749 0x1013 //TX_PREEQ_BIN_MIC2_10 750 0x1719 //TX_PREEQ_BIN_MIC2_11 751 0x1B1E //TX_PREEQ_BIN_MIC2_12 752 0x1E1E //TX_PREEQ_BIN_MIC2_13 753 0x1E28 //TX_PREEQ_BIN_MIC2_14 754 0x363C //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0050 //TX_MIC_CALIBRATION_0 766 0x0065 //TX_MIC_CALIBRATION_1 767 0x0050 //TX_MIC_CALIBRATION_2 768 0x0050 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x0800 //TX_TDDRC_ALPHA_UP_01 784 0x0800 //TX_TDDRC_ALPHA_UP_02 785 0x0800 //TX_TDDRC_ALPHA_UP_03 786 0x0800 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0006 //TX_DEADMIC_SILENCE_TH 817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0096 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0001 //TX_TDDRC_THRD_0 855 0x0002 //TX_TDDRC_THRD_1 856 0x1000 //TX_TDDRC_THRD_2 857 0x1000 //TX_TDDRC_THRD_3 858 0x6000 //TX_TDDRC_SLANT_0 859 0x6000 //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x1380 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2379 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x02A8 //TX_MICMUTE_RATIO_THR 900 0x02A8 //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x7D64 //TX_DTD_THR1_MICMUTE_0 912 0x76C0 //TX_DTD_THR1_MICMUTE_1 913 0x7530 //TX_DTD_THR1_MICMUTE_2 914 0x7F58 //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0260 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x7FFF //TX_MIC1MUTE_RATIO_THR 940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0100 //TX_AMS_RESRV_01 944 0x32C8 //TX_AMS_RESRV_02 945 0x5DC0 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x050D //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0000 //RX_PITCH_BFR_LEN 17 0x0000 //RX_SBD_PITCH_DET 18 0x0000 //RX_PP_RESRV_0 19 0x0000 //RX_PP_RESRV_1 20 0xF800 //RX_N_SN_EST 21 0x0000 //RX_N2_SN_EST 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0000 //RX_FENS_RESRV_1 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 30 0x0000 //RX_EXTRA_NS_L 31 0x0000 //RX_EXTRA_NS_A 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x0000 //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0003 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0010 //RX_MAXLEVEL_CNG 132 0x0000 //RX_BWE_UV_TH 133 0x0000 //RX_BWE_UV_TH2 134 0x0000 //RX_BWE_UV_TH3 135 0x0000 //RX_BWE_V_TH 136 0x0000 //RX_BWE_GAIN1_V_TH1 137 0x0000 //RX_BWE_GAIN1_V_TH2 138 0x0000 //RX_BWE_UV_EQ 139 0x0000 //RX_BWE_V_EQ 140 0x0000 //RX_BWE_TONE_TH 141 0x0000 //RX_BWE_UV_HOLD_T 142 0x0000 //RX_BWE_GAIN2_ALPHA 143 0x0000 //RX_BWE_GAIN3_ALPHA 144 0x0000 //RX_BWE_CUTOFF 145 0x0000 //RX_BWE_GAINFILL 146 0x0000 //RX_BWE_MAXTH_TONE 147 0x0000 //RX_BWE_EQ_0 148 0x0000 //RX_BWE_EQ_1 149 0x0000 //RX_BWE_EQ_2 150 0x0000 //RX_BWE_EQ_3 151 0x0000 //RX_BWE_EQ_4 152 0x0000 //RX_BWE_EQ_5 153 0x0000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x0040 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x050D //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0000 //RX_PITCH_BFR_LEN 174 0x0000 //RX_SBD_PITCH_DET 175 0x0000 //RX_PP_RESRV_0 176 0x0000 //RX_PP_RESRV_1 177 0xF800 //RX_N_SN_EST 178 0x0000 //RX_N2_SN_EST 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0000 //RX_FENS_RESRV_1 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 187 0x0000 //RX_EXTRA_NS_L 188 0x0000 //RX_EXTRA_NS_A 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x0000 //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0003 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x0080 //RX_MIN_G_FP 285 0x2000 //RX_MAX_G_FP 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0010 //RX_MAXLEVEL_CNG 289 0x0000 //RX_BWE_UV_TH 290 0x0000 //RX_BWE_UV_TH2 291 0x0000 //RX_BWE_UV_TH3 292 0x0000 //RX_BWE_V_TH 293 0x0000 //RX_BWE_GAIN1_V_TH1 294 0x0000 //RX_BWE_GAIN1_V_TH2 295 0x0000 //RX_BWE_UV_EQ 296 0x0000 //RX_BWE_V_EQ 297 0x0000 //RX_BWE_TONE_TH 298 0x0000 //RX_BWE_UV_HOLD_T 299 0x0000 //RX_BWE_GAIN2_ALPHA 300 0x0000 //RX_BWE_GAIN3_ALPHA 301 0x0000 //RX_BWE_CUTOFF 302 0x0000 //RX_BWE_GAINFILL 303 0x0000 //RX_BWE_MAXTH_TONE 304 0x0000 //RX_BWE_EQ_0 305 0x0000 //RX_BWE_EQ_1 306 0x0000 //RX_BWE_EQ_2 307 0x0000 //RX_BWE_EQ_3 308 0x0000 //RX_BWE_EQ_4 309 0x0000 //RX_BWE_EQ_5 310 0x0000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-FB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x4B7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x00A4 //TX_DIST2REF1 22 0x0017 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0FF7 //TX_PGA_0 28 0x0FF7 //TX_PGA_1 29 0x0FF7 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0002 //TX_MIC_DATA_SRC0 42 0x0000 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3B33 //TX_DIST2REF_11 73 0x0A70 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0CAE //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7E56 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x1800 //TX_THR_PITCH_DET_0 131 0x1000 //TX_THR_PITCH_DET_1 132 0x0800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x0300 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7A00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x2000 //TX_MIN_EQ_RE_EST_1 154 0x2000 //TX_MIN_EQ_RE_EST_2 155 0x4000 //TX_MIN_EQ_RE_EST_3 156 0x4000 //TX_MIN_EQ_RE_EST_4 157 0x7FFF //TX_MIN_EQ_RE_EST_5 158 0x7FFF //TX_MIN_EQ_RE_EST_6 159 0x7FFF //TX_MIN_EQ_RE_EST_7 160 0x7FFF //TX_MIN_EQ_RE_EST_8 161 0x7FFF //TX_MIN_EQ_RE_EST_9 162 0x7FFF //TX_MIN_EQ_RE_EST_10 163 0x7FFF //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x0CCD //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x09C4 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7D00 //TX_DTD_THR1_0 198 0x7FF0 //TX_DTD_THR1_1 199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0DAC //TX_DT_CUT_K 214 0x0020 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x7FFF //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x2000 //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0018 //TX_NS_LVL_CTRL_2 284 0x0016 //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 293 0x0010 //TX_MIN_GAIN_S_4 294 0x0010 //TX_MIN_GAIN_S_5 295 0x0010 //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x6000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x4000 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x50C0 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 315 0x4C00 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x6000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 341 0x7A00 //TX_LAMBDA_PFILT_S_2 342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 346 0x7C00 //TX_LAMBDA_PFILT_S_7 347 0x0000 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0200 //TX_DT_BINVAD_TH_0 354 0x0200 //TX_DT_BINVAD_TH_1 355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0200 //TX_DT_BINVAD_TH_3 357 0x1F40 //TX_DT_BINVAD_ENDF 358 0x0100 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT 367 0x0050 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x0DAC //TX_NOISE_TH_2 372 0x4E20 //TX_NOISE_TH_3 373 0x4E20 //TX_NOISE_TH_4 374 0x59D8 //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x7999 //TX_RATIODTL_CUT_TH 383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x0033 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x2000 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x7FFF //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0x3000 //TX_DEREVERB_LF_MU 515 0x34CD //TX_DEREVERB_HF_MU 516 0x0007 //TX_DEREVERB_DELAY 517 0x0004 //TX_DEREVERB_COEF_LEN 518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x3A98 //TX_GSC_RTOL_TH 522 0x3A98 //TX_GSC_RTOH_TH 523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4853 //TX_FDEQ_GAIN_9 577 0x5450 //TX_FDEQ_GAIN_10 578 0x7465 //TX_FDEQ_GAIN_11 579 0x807F //TX_FDEQ_GAIN_12 580 0x82C4 //TX_FDEQ_GAIN_13 581 0xC4C4 //TX_FDEQ_GAIN_14 582 0xC4C4 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0304 //TX_FDEQ_BIN_2 594 0x0405 //TX_FDEQ_BIN_3 595 0x0607 //TX_FDEQ_BIN_4 596 0x0809 //TX_FDEQ_BIN_5 597 0x0A0B //TX_FDEQ_BIN_6 598 0x0C0D //TX_FDEQ_BIN_7 599 0x0E0F //TX_FDEQ_BIN_8 600 0x1011 //TX_FDEQ_BIN_9 601 0x1214 //TX_FDEQ_BIN_10 602 0x1618 //TX_FDEQ_BIN_11 603 0x1C1C //TX_FDEQ_BIN_12 604 0x2020 //TX_FDEQ_BIN_13 605 0x2020 //TX_FDEQ_BIN_14 606 0x2011 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 625 0x5456 //TX_PREEQ_GAIN_MIC0_8 626 0x585C //TX_PREEQ_GAIN_MIC0_9 627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 628 0x7478 //TX_PREEQ_GAIN_MIC0_11 629 0x705C //TX_PREEQ_GAIN_MIC0_12 630 0x4838 //TX_PREEQ_GAIN_MIC0_13 631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0202 //TX_PREEQ_BIN_MIC0_0 642 0x0203 //TX_PREEQ_BIN_MIC0_1 643 0x0303 //TX_PREEQ_BIN_MIC0_2 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x0909 //TX_PREEQ_BIN_MIC0_7 649 0x090B //TX_PREEQ_BIN_MIC0_8 650 0x0C10 //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1414 //TX_PREEQ_BIN_MIC0_11 653 0x1414 //TX_PREEQ_BIN_MIC0_12 654 0x1C1E //TX_PREEQ_BIN_MIC0_13 655 0x1E28 //TX_PREEQ_BIN_MIC0_14 656 0x462C //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0030 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x1812 //TX_PREEQ_BIN_MIC1_0 691 0x0A0A //TX_PREEQ_BIN_MIC1_1 692 0x0808 //TX_PREEQ_BIN_MIC1_2 693 0x080A //TX_PREEQ_BIN_MIC1_3 694 0x0B09 //TX_PREEQ_BIN_MIC1_4 695 0x0A06 //TX_PREEQ_BIN_MIC1_5 696 0x0606 //TX_PREEQ_BIN_MIC1_6 697 0x0605 //TX_PREEQ_BIN_MIC1_7 698 0x050A //TX_PREEQ_BIN_MIC1_8 699 0x1505 //TX_PREEQ_BIN_MIC1_9 700 0x0506 //TX_PREEQ_BIN_MIC1_10 701 0x0615 //TX_PREEQ_BIN_MIC1_11 702 0x1516 //TX_PREEQ_BIN_MIC1_12 703 0x2021 //TX_PREEQ_BIN_MIC1_13 704 0x2021 //TX_PREEQ_BIN_MIC1_14 705 0x2021 //TX_PREEQ_BIN_MIC1_15 706 0x0800 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0E10 //TX_PREEQ_BIN_MIC2_0 740 0x1010 //TX_PREEQ_BIN_MIC2_1 741 0x1010 //TX_PREEQ_BIN_MIC2_2 742 0x1010 //TX_PREEQ_BIN_MIC2_3 743 0x1010 //TX_PREEQ_BIN_MIC2_4 744 0x1010 //TX_PREEQ_BIN_MIC2_5 745 0x1010 //TX_PREEQ_BIN_MIC2_6 746 0x1010 //TX_PREEQ_BIN_MIC2_7 747 0x1010 //TX_PREEQ_BIN_MIC2_8 748 0x1010 //TX_PREEQ_BIN_MIC2_9 749 0x1010 //TX_PREEQ_BIN_MIC2_10 750 0x1010 //TX_PREEQ_BIN_MIC2_11 751 0x1010 //TX_PREEQ_BIN_MIC2_12 752 0x1010 //TX_PREEQ_BIN_MIC2_13 753 0x1010 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0060 //TX_MIC_CALIBRATION_0 766 0x0060 //TX_MIC_CALIBRATION_1 767 0x0070 //TX_MIC_CALIBRATION_2 768 0x0070 //TX_MIC_CALIBRATION_3 769 0x0050 //TX_MIC_PWR_BIAS_0 770 0x0040 //TX_MIC_PWR_BIAS_1 771 0x0040 //TX_MIC_PWR_BIAS_2 772 0x0040 //TX_MIC_PWR_BIAS_3 773 0x0009 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x0C00 //TX_TDDRC_ALPHA_UP_01 784 0x0C00 //TX_TDDRC_ALPHA_UP_02 785 0x0C00 //TX_TDDRC_ALPHA_UP_03 786 0x0C00 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0010 //TX_DEADMIC_SILENCE_TH 817 0x0600 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0096 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0004 //TX_FILTINDX 854 0x0004 //TX_TDDRC_THRD_0 855 0x0016 //TX_TDDRC_THRD_1 856 0x1900 //TX_TDDRC_THRD_2 857 0x1900 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x7B00 //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x0A98 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x1000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x050D //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0000 //RX_PITCH_BFR_LEN 17 0x0000 //RX_SBD_PITCH_DET 18 0x0000 //RX_PP_RESRV_0 19 0x0000 //RX_PP_RESRV_1 20 0xF800 //RX_N_SN_EST 21 0x0000 //RX_N2_SN_EST 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0000 //RX_FENS_RESRV_1 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 30 0x0000 //RX_EXTRA_NS_L 31 0x0000 //RX_EXTRA_NS_A 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x0000 //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0003 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0010 //RX_MAXLEVEL_CNG 132 0x0000 //RX_BWE_UV_TH 133 0x0000 //RX_BWE_UV_TH2 134 0x0000 //RX_BWE_UV_TH3 135 0x0000 //RX_BWE_V_TH 136 0x0000 //RX_BWE_GAIN1_V_TH1 137 0x0000 //RX_BWE_GAIN1_V_TH2 138 0x0000 //RX_BWE_UV_EQ 139 0x0000 //RX_BWE_V_EQ 140 0x0000 //RX_BWE_TONE_TH 141 0x0000 //RX_BWE_UV_HOLD_T 142 0x0000 //RX_BWE_GAIN2_ALPHA 143 0x0000 //RX_BWE_GAIN3_ALPHA 144 0x0000 //RX_BWE_CUTOFF 145 0x0000 //RX_BWE_GAINFILL 146 0x0000 //RX_BWE_MAXTH_TONE 147 0x0000 //RX_BWE_EQ_0 148 0x0000 //RX_BWE_EQ_1 149 0x0000 //RX_BWE_EQ_2 150 0x0000 //RX_BWE_EQ_3 151 0x0000 //RX_BWE_EQ_4 152 0x0000 //RX_BWE_EQ_5 153 0x0000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x2040 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x050D //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0000 //RX_PITCH_BFR_LEN 174 0x0000 //RX_SBD_PITCH_DET 175 0x0000 //RX_PP_RESRV_0 176 0x0000 //RX_PP_RESRV_1 177 0xF800 //RX_N_SN_EST 178 0x0000 //RX_N2_SN_EST 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0000 //RX_FENS_RESRV_1 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 187 0x0000 //RX_EXTRA_NS_L 188 0x0000 //RX_EXTRA_NS_A 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x0000 //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0003 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x0080 //RX_MIN_G_FP 285 0x2000 //RX_MAX_G_FP 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0010 //RX_MAXLEVEL_CNG 289 0x0000 //RX_BWE_UV_TH 290 0x0000 //RX_BWE_UV_TH2 291 0x0000 //RX_BWE_UV_TH3 292 0x0000 //RX_BWE_V_TH 293 0x0000 //RX_BWE_GAIN1_V_TH1 294 0x0000 //RX_BWE_GAIN1_V_TH2 295 0x0000 //RX_BWE_UV_EQ 296 0x0000 //RX_BWE_V_EQ 297 0x0000 //RX_BWE_TONE_TH 298 0x0000 //RX_BWE_UV_HOLD_T 299 0x0000 //RX_BWE_GAIN2_ALPHA 300 0x0000 //RX_BWE_GAIN3_ALPHA 301 0x0000 //RX_BWE_CUTOFF 302 0x0000 //RX_BWE_GAINFILL 303 0x0000 //RX_BWE_MAXTH_TONE 304 0x0000 //RX_BWE_EQ_0 305 0x0000 //RX_BWE_EQ_1 306 0x0000 //RX_BWE_EQ_2 307 0x0000 //RX_BWE_EQ_3 308 0x0000 //RX_BWE_EQ_4 309 0x0000 //RX_BWE_EQ_5 310 0x0000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-RESERVE2-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x00F3 //TX_PATCH_REG 3 0x6F7D //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x00A3 //TX_DIST2REF1 22 0x001B //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x1000 //TX_PGA_0 28 0x1000 //TX_PGA_1 29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0001 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0002 //TX_MIC_DATA_SRC1 43 0x0001 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3B33 //TX_DIST2REF_11 73 0x0A70 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0CAE //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7B02 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 132 0x4000 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x0400 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7600 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x1000 //TX_MIN_EQ_RE_EST_0 153 0x0600 //TX_MIN_EQ_RE_EST_1 154 0x3000 //TX_MIN_EQ_RE_EST_2 155 0x3000 //TX_MIN_EQ_RE_EST_3 156 0x3000 //TX_MIN_EQ_RE_EST_4 157 0x3000 //TX_MIN_EQ_RE_EST_5 158 0x3000 //TX_MIN_EQ_RE_EST_6 159 0x1000 //TX_MIN_EQ_RE_EST_7 160 0x7800 //TX_MIN_EQ_RE_EST_8 161 0x7800 //TX_MIN_EQ_RE_EST_9 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 165 0x3000 //TX_LAMBDA_RE_EST 166 0x3000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0270 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x0880 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7148 //TX_DTD_THR1_0 198 0x7148 //TX_DTD_THR1_1 199 0x7148 //TX_DTD_THR1_2 200 0x7148 //TX_DTD_THR1_3 201 0x7148 //TX_DTD_THR1_4 202 0x7700 //TX_DTD_THR1_5 203 0x7148 //TX_DTD_THR1_6 204 0x7E00 //TX_DTD_THR2_0 205 0x7E00 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 209 0x5000 //TX_DTD_THR2_5 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x1770 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x7FFF //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H 223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x02BC //TX_RATIO_DT_L_TH_HIGH 226 0x5208 //TX_RATIO_DT_H_TH_HIGH 227 0x0001 //TX_RATIO_DT_L0_TH 228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x0190 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF800 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 253 0x0000 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x001A //TX_NS_LVL_CTRL_1 283 0x0024 //TX_NS_LVL_CTRL_2 284 0x001A //TX_NS_LVL_CTRL_3 285 0x0014 //TX_NS_LVL_CTRL_4 286 0x0011 //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x0020 //TX_MIN_GAIN_S_0 290 0x0020 //TX_MIN_GAIN_S_1 291 0x0020 //TX_MIN_GAIN_S_2 292 0x0020 //TX_MIN_GAIN_S_3 293 0x0020 //TX_MIN_GAIN_S_4 294 0x0020 //TX_MIN_GAIN_S_5 295 0x0020 //TX_MIN_GAIN_S_6 296 0x0020 //TX_MIN_GAIN_S_7 297 0x6000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x4000 //TX_SNRI_SUP_1 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7FFF //TX_A_POST_FILT_S_0 315 0x7FFF //TX_A_POST_FILT_S_1 316 0x7FFF //TX_A_POST_FILT_S_2 317 0x7FFF //TX_A_POST_FILT_S_3 318 0x7FFF //TX_A_POST_FILT_S_4 319 0x7FFF //TX_A_POST_FILT_S_5 320 0x7FFF //TX_A_POST_FILT_S_6 321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7F00 //TX_LAMBDA_PFILT 339 0x7F00 //TX_LAMBDA_PFILT_S_0 340 0x7F00 //TX_LAMBDA_PFILT_S_1 341 0x7F00 //TX_LAMBDA_PFILT_S_2 342 0x7F00 //TX_LAMBDA_PFILT_S_3 343 0x7F00 //TX_LAMBDA_PFILT_S_4 344 0x7F00 //TX_LAMBDA_PFILT_S_5 345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7F00 //TX_LAMBDA_PFILT_S_7 347 0x1000 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0040 //TX_DT_BINVAD_TH_0 354 0x0040 //TX_DT_BINVAD_TH_1 355 0x0100 //TX_DT_BINVAD_TH_2 356 0x0100 //TX_DT_BINVAD_TH_3 357 0x36B0 //TX_DT_BINVAD_ENDF 358 0x0200 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0140 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT 367 0x0050 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x01F4 //TX_NOISE_TH_2 372 0x36B0 //TX_NOISE_TH_3 373 0x2710 //TX_NOISE_TH_4 374 0x2CEC //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 379 0x0050 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x07D0 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0005 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x0050 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x0000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x2000 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x4000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0x3000 //TX_DEREVERB_LF_MU 515 0x34CD //TX_DEREVERB_HF_MU 516 0x0007 //TX_DEREVERB_DELAY 517 0x0004 //TX_DEREVERB_COEF_LEN 518 0x0003 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x3A98 //TX_GSC_RTOL_TH 522 0x3A98 //TX_GSC_RTOH_TH 523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0064 //TX_DR_RESRV_5 525 0x1000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4850 //TX_FDEQ_GAIN_5 573 0x5261 //TX_FDEQ_GAIN_6 574 0x5C4C //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 576 0x484C //TX_FDEQ_GAIN_9 577 0x4E50 //TX_FDEQ_GAIN_10 578 0x5355 //TX_FDEQ_GAIN_11 579 0x5B5F //TX_FDEQ_GAIN_12 580 0x5F84 //TX_FDEQ_GAIN_13 581 0x8476 //TX_FDEQ_GAIN_14 582 0x6A71 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x1013 //TX_FDEQ_BIN_10 602 0x1719 //TX_FDEQ_BIN_11 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 606 0x284A //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0202 //TX_PREEQ_BIN_MIC0_0 642 0x0203 //TX_PREEQ_BIN_MIC0_1 643 0x0303 //TX_PREEQ_BIN_MIC0_2 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1719 //TX_PREEQ_BIN_MIC0_11 653 0x1B1E //TX_PREEQ_BIN_MIC0_12 654 0x1E1E //TX_PREEQ_BIN_MIC0_13 655 0x1E28 //TX_PREEQ_BIN_MIC0_14 656 0x3042 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x494A //TX_PREEQ_GAIN_MIC1_6 673 0x494A //TX_PREEQ_GAIN_MIC1_7 674 0x4B4C //TX_PREEQ_GAIN_MIC1_8 675 0x4D4E //TX_PREEQ_GAIN_MIC1_9 676 0x4F52 //TX_PREEQ_GAIN_MIC1_10 677 0x5458 //TX_PREEQ_GAIN_MIC1_11 678 0x5B62 //TX_PREEQ_GAIN_MIC1_12 679 0x6A66 //TX_PREEQ_GAIN_MIC1_13 680 0x543E //TX_PREEQ_GAIN_MIC1_14 681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 696 0x0708 //TX_PREEQ_BIN_MIC1_6 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x1013 //TX_PREEQ_BIN_MIC1_10 701 0x1719 //TX_PREEQ_BIN_MIC1_11 702 0x1B1E //TX_PREEQ_BIN_MIC1_12 703 0x1E1E //TX_PREEQ_BIN_MIC1_13 704 0x1E28 //TX_PREEQ_BIN_MIC1_14 705 0x3042 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4644 //TX_PREEQ_GAIN_MIC2_12 728 0x4240 //TX_PREEQ_GAIN_MIC2_13 729 0x4041 //TX_PREEQ_GAIN_MIC2_14 730 0x455E //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0202 //TX_PREEQ_BIN_MIC2_0 740 0x0203 //TX_PREEQ_BIN_MIC2_1 741 0x0303 //TX_PREEQ_BIN_MIC2_2 742 0x0304 //TX_PREEQ_BIN_MIC2_3 743 0x0405 //TX_PREEQ_BIN_MIC2_4 744 0x0506 //TX_PREEQ_BIN_MIC2_5 745 0x0708 //TX_PREEQ_BIN_MIC2_6 746 0x090A //TX_PREEQ_BIN_MIC2_7 747 0x0B0C //TX_PREEQ_BIN_MIC2_8 748 0x0D0E //TX_PREEQ_BIN_MIC2_9 749 0x1013 //TX_PREEQ_BIN_MIC2_10 750 0x1719 //TX_PREEQ_BIN_MIC2_11 751 0x1B1E //TX_PREEQ_BIN_MIC2_12 752 0x1E1E //TX_PREEQ_BIN_MIC2_13 753 0x1E28 //TX_PREEQ_BIN_MIC2_14 754 0x363C //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0050 //TX_MIC_CALIBRATION_0 766 0x0065 //TX_MIC_CALIBRATION_1 767 0x0050 //TX_MIC_CALIBRATION_2 768 0x0050 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x0800 //TX_TDDRC_ALPHA_UP_01 784 0x0800 //TX_TDDRC_ALPHA_UP_02 785 0x0800 //TX_TDDRC_ALPHA_UP_03 786 0x0800 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0006 //TX_DEADMIC_SILENCE_TH 817 0x2800 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0096 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0001 //TX_TDDRC_THRD_0 855 0x0002 //TX_TDDRC_THRD_1 856 0x1000 //TX_TDDRC_THRD_2 857 0x1000 //TX_TDDRC_THRD_3 858 0x6000 //TX_TDDRC_SLANT_0 859 0x6000 //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x1380 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2379 //TX_SENDFUNC_REG_MICMUTE 898 0x0020 //TX_SENDFUNC_REG_MICMUTE1 899 0x02A8 //TX_MICMUTE_RATIO_THR 900 0x02A8 //TX_MICMUTE_AMP_THR 901 0x0000 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x0E00 //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x7D64 //TX_DTD_THR1_MICMUTE_0 912 0x76C0 //TX_DTD_THR1_MICMUTE_1 913 0x7530 //TX_DTD_THR1_MICMUTE_2 914 0x7F58 //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0260 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x7FFF //TX_MIC1MUTE_RATIO_THR 940 0x0001 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0100 //TX_AMS_RESRV_01 944 0x32C8 //TX_AMS_RESRV_02 945 0x5DC0 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x050D //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0000 //RX_PITCH_BFR_LEN 17 0x0000 //RX_SBD_PITCH_DET 18 0x0000 //RX_PP_RESRV_0 19 0x0000 //RX_PP_RESRV_1 20 0xF800 //RX_N_SN_EST 21 0x0000 //RX_N2_SN_EST 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0000 //RX_FENS_RESRV_1 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 30 0x0000 //RX_EXTRA_NS_L 31 0x0000 //RX_EXTRA_NS_A 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x0000 //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0003 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0010 //RX_MAXLEVEL_CNG 132 0x0000 //RX_BWE_UV_TH 133 0x0000 //RX_BWE_UV_TH2 134 0x0000 //RX_BWE_UV_TH3 135 0x0000 //RX_BWE_V_TH 136 0x0000 //RX_BWE_GAIN1_V_TH1 137 0x0000 //RX_BWE_GAIN1_V_TH2 138 0x0000 //RX_BWE_UV_EQ 139 0x0000 //RX_BWE_V_EQ 140 0x0000 //RX_BWE_TONE_TH 141 0x0000 //RX_BWE_UV_HOLD_T 142 0x0000 //RX_BWE_GAIN2_ALPHA 143 0x0000 //RX_BWE_GAIN3_ALPHA 144 0x0000 //RX_BWE_CUTOFF 145 0x0000 //RX_BWE_GAINFILL 146 0x0000 //RX_BWE_MAXTH_TONE 147 0x0000 //RX_BWE_EQ_0 148 0x0000 //RX_BWE_EQ_1 149 0x0000 //RX_BWE_EQ_2 150 0x0000 //RX_BWE_EQ_3 151 0x0000 //RX_BWE_EQ_4 152 0x0000 //RX_BWE_EQ_5 153 0x0000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x0040 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x050D //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0000 //RX_PITCH_BFR_LEN 174 0x0000 //RX_SBD_PITCH_DET 175 0x0000 //RX_PP_RESRV_0 176 0x0000 //RX_PP_RESRV_1 177 0xF800 //RX_N_SN_EST 178 0x0000 //RX_N2_SN_EST 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0000 //RX_FENS_RESRV_1 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 187 0x0000 //RX_EXTRA_NS_L 188 0x0000 //RX_EXTRA_NS_A 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x0000 //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0003 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x0080 //RX_MIN_G_FP 285 0x2000 //RX_MAX_G_FP 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0010 //RX_MAXLEVEL_CNG 289 0x0000 //RX_BWE_UV_TH 290 0x0000 //RX_BWE_UV_TH2 291 0x0000 //RX_BWE_UV_TH3 292 0x0000 //RX_BWE_V_TH 293 0x0000 //RX_BWE_GAIN1_V_TH1 294 0x0000 //RX_BWE_GAIN1_V_TH2 295 0x0000 //RX_BWE_UV_EQ 296 0x0000 //RX_BWE_V_EQ 297 0x0000 //RX_BWE_TONE_TH 298 0x0000 //RX_BWE_UV_HOLD_T 299 0x0000 //RX_BWE_GAIN2_ALPHA 300 0x0000 //RX_BWE_GAIN3_ALPHA 301 0x0000 //RX_BWE_CUTOFF 302 0x0000 //RX_BWE_GAINFILL 303 0x0000 //RX_BWE_MAXTH_TONE 304 0x0000 //RX_BWE_EQ_0 305 0x0000 //RX_BWE_EQ_1 306 0x0000 //RX_BWE_EQ_2 307 0x0000 //RX_BWE_EQ_3 308 0x0000 //RX_BWE_EQ_4 309 0x0000 //RX_BWE_EQ_5 310 0x0000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-NB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 2 0x0000 //TX_PATCH_REG 3 0x0200 //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x0078 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0000 //TX_MICS_OF_PAIR0 38 0x0000 //TX_MICS_OF_PAIR1 39 0x0000 //TX_MICS_OF_PAIR2 40 0x0000 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0003 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x0000 //TX_HD_BIN_MASK 53 0x0000 //TX_HD_SUBAND_MASK 54 0x0000 //TX_HD_FRAME_AVG_MASK 55 0x0000 //TX_HD_MIN_FRQ 56 0x0000 //TX_HD_ALPHA_PSD 57 0x0000 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0x0000 //TX_T_PSDVAT 63 0x0000 //TX_CNT 64 0x0000 //TX_ANTI_HOWL_GAIN 65 0x0000 //TX_MICFORBFMARK_0 66 0x0000 //TX_MICFORBFMARK_1 67 0x0000 //TX_MICFORBFMARK_2 68 0x0000 //TX_MICFORBFMARK_3 69 0x0000 //TX_MICFORBFMARK_4 70 0x0000 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x0000 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x0000 //TX_ADCS_GAIN 112 0x0000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x7FFF //TX_BLMIC_BLKFACTOR 116 0x7FFF //TX_BRMIC_BLKFACTOR 117 0x000A //TX_MICBLK_START_BIN 118 0x0041 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x0000 //TX_FE_ENER_TH_MTS 124 0x0000 //TX_FE_ENER_TH_EXP 125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x0000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0020 //TX_MIC_BLOCK_N 128 0x7652 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7800 //TX_THR_PITCH_DET_0 131 0x7000 //TX_THR_PITCH_DET_1 132 0x6000 //TX_THR_PITCH_DET_2 133 0x0000 //TX_PITCH_BFR_LEN 134 0x0000 //TX_SBD_PITCH_DET 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x2000 //TX_AEC_REF_GAIN_0 148 0x2000 //TX_AEC_REF_GAIN_1 149 0x2000 //TX_AEC_REF_GAIN_2 150 0x4000 //TX_EAD_THR 151 0x0200 //TX_THR_RE_EST 152 0x0100 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0100 //TX_MIN_EQ_RE_EST_2 155 0x0100 //TX_MIN_EQ_RE_EST_3 156 0x0100 //TX_MIN_EQ_RE_EST_4 157 0x0100 //TX_MIN_EQ_RE_EST_5 158 0x0100 //TX_MIN_EQ_RE_EST_6 159 0x0100 //TX_MIN_EQ_RE_EST_7 160 0x0100 //TX_MIN_EQ_RE_EST_8 161 0x0100 //TX_MIN_EQ_RE_EST_9 162 0x0100 //TX_MIN_EQ_RE_EST_10 163 0x0100 //TX_MIN_EQ_RE_EST_11 164 0x0100 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE 167 0x0000 //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0008 //TX_SE_HOLD_N 170 0x0050 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x0000 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x0000 //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0000 //TX_FRQ_LIN_LEN 184 0x0000 //TX_FRQ_AEC_LEN_RHO 185 0x0000 //TX_MU0_UNP_FRQ_AEC 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7333 //TX_DTD_THR1_0 198 0x7333 //TX_DTD_THR1_1 199 0x7333 //TX_DTD_THR1_2 200 0x7333 //TX_DTD_THR1_3 201 0x7333 //TX_DTD_THR1_4 202 0x7333 //TX_DTD_THR1_5 203 0x7333 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0400 //TX_DT_CUT_K 214 0x0000 //TX_DT_CUT_THR 215 0x0000 //TX_COMFORT_G 216 0x0000 //TX_POWER_YOUT_TH 217 0x0000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x0800 //TX_B_POST_FILT_ECHO_H 230 0x0000 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x0000 //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xF800 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0A00 //TX_N_SN_EST 267 0x0000 //TX_INBEAM_T 268 0x0000 //TX_INBEAMHOLDT 269 0x1FFF //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x1000 //TX_NE_RTO_TH_L 274 0x1000 //TX_MAINREFRTOH_TH_H 275 0x1000 //TX_MAINREFRTOH_TH_L 276 0x2000 //TX_MAINREFRTO_TH_H 277 0x1400 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 291 0x0014 //TX_MIN_GAIN_S_2 292 0x0014 //TX_MIN_GAIN_S_3 293 0x0014 //TX_MIN_GAIN_S_4 294 0x0014 //TX_MIN_GAIN_S_5 295 0x0014 //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x0000 //TX_NMOS_SUP 298 0x0064 //TX_NS_MAX_PRI_SNR_TH 299 0x7FFF //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x7FFF //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x2000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7E00 //TX_LAMBDA_PFILT_S_0 340 0x7E00 //TX_LAMBDA_PFILT_S_1 341 0x7E00 //TX_LAMBDA_PFILT_S_2 342 0x7E00 //TX_LAMBDA_PFILT_S_3 343 0x7E00 //TX_LAMBDA_PFILT_S_4 344 0x7E00 //TX_LAMBDA_PFILT_S_5 345 0x7E00 //TX_LAMBDA_PFILT_S_6 346 0x7E00 //TX_LAMBDA_PFILT_S_7 347 0x0010 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x0000 //TX_K_PEPPER_HF 350 0x0000 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x4000 //TX_HMNC_BST_THR 353 0x0000 //TX_DT_BINVAD_TH_0 354 0x0000 //TX_DT_BINVAD_TH_1 355 0x0000 //TX_DT_BINVAD_TH_2 356 0x0000 //TX_DT_BINVAD_TH_3 357 0x0000 //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0001 //TX_BF_SGRAD_FLG 362 0x0000 //TX_BF_DVG_TH 363 0x0000 //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT 367 0x003B //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 371 0x0032 //TX_NOISE_TH_2 372 0x3D54 //TX_NOISE_TH_3 373 0x012C //TX_NOISE_TH_4 374 0x07D0 //TX_NOISE_TH_5 375 0x6590 //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x00C8 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY 387 0x6400 //TX_OUT_ENER_TH_NOISE 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH 406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR 410 0x0080 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x2000 //TX_RHO_UPB 415 0x0020 //TX_N_HOLD_HS 416 0x0009 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0000 //TX_EXTRA_GAIN_MICBLOCK 419 0x0333 //TX_THR_STD_NSR 420 0x0219 //TX_THR_STD_PLH 421 0x09C4 //TX_N_HOLD_STD 422 0x0166 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x0000 //TX_SB_RTO_MEAN_TH_RUB 428 0x2000 //TX_WTA_EN_RTO_TH 429 0x1400 //TX_TOP_ENER_TH_F 430 0x0064 //TX_DESIRED_TALK_HOLDT 431 0x1000 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0000 //TX_HS_VAD_BIN 435 0x0000 //TX_THR_VAD_HS 436 0x0000 //TX_MEAN_RTO_MIN_TH2 437 0x0000 //TX_SILENCE_T 438 0x4000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x099A //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x001E //TX_DOA_VAD_THR_1 445 0x001E //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B 453 0x005A //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C 456 0x005A //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D 459 0x005A //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0172 //TX_BF_HOLDOFF_T 473 0x8000 //TX_DOA_COST_FACTOR 474 0x0D9A //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x071C //TX_DOA_TRACK_HT 477 0x0280 //TX_N1_HOLD_HF 478 0x0140 //TX_N2_HOLD_HF 479 0x2AAB //TX_BF_RESET_THR_HF 480 0x4000 //TX_DOA_SMOOTH 481 0x0000 //TX_MU_BF 482 0x0200 //TX_BF_MU_LF_B2 483 0x0000 //TX_BF_FC_END_BIN_B2 484 0x0000 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0000 //TX_N_DOA_SEED 488 0x0000 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x0000 //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x0000 //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x0000 //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0168 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0004 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0230 //TX_NOR_OFF_TH1 503 0xD333 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR 531 0x03E8 //TX_ENGY_THR 532 0x0000 //TX_CORR_HIGH_TH 533 0x0000 //TX_ENGY_THR_2 534 0x0000 //TX_MEAN_RTO_THR 535 0x0000 //TX_WNS_ENOISE_MIC0_TH 536 0x0000 //TX_RATIOMICL_TH 537 0x0000 //TX_CALIG_HS 538 0x000A //TX_LVL_CTRL 539 0x0000 //TX_WIND_SUPRTO 540 0x0000 //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH 545 0x0000 //TX_WNS_RESRV_0 546 0x0000 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0000 //TX_BVE_NOISE_FLOOR_1 554 0x0000 //TX_BVE_NOISE_FLOOR_2 555 0x0000 //TX_BVE_NOISE_FLOOR_3 556 0x0000 //TX_BVE_NOISE_FLOOR_4 557 0x0000 //TX_BVE_NOISE_FLOOR_5 558 0x0000 //TX_BVE_NOISE_FLOOR_6 559 0x0000 //TX_BVE_NOISE_FLOOR_7 560 0x0000 //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0000 //TX_FDEQ_BIN_0 592 0x0000 //TX_FDEQ_BIN_1 593 0x0000 //TX_FDEQ_BIN_2 594 0x0000 //TX_FDEQ_BIN_3 595 0x0000 //TX_FDEQ_BIN_4 596 0x0000 //TX_FDEQ_BIN_5 597 0x0000 //TX_FDEQ_BIN_6 598 0x0000 //TX_FDEQ_BIN_7 599 0x0000 //TX_FDEQ_BIN_8 600 0x0000 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0000 //TX_PREEQ_BIN_MIC0_0 642 0x0000 //TX_PREEQ_BIN_MIC0_1 643 0x0000 //TX_PREEQ_BIN_MIC0_2 644 0x0000 //TX_PREEQ_BIN_MIC0_3 645 0x0000 //TX_PREEQ_BIN_MIC0_4 646 0x0000 //TX_PREEQ_BIN_MIC0_5 647 0x0000 //TX_PREEQ_BIN_MIC0_6 648 0x0000 //TX_PREEQ_BIN_MIC0_7 649 0x0000 //TX_PREEQ_BIN_MIC0_8 650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0000 //TX_PREEQ_BIN_MIC1_0 691 0x0000 //TX_PREEQ_BIN_MIC1_1 692 0x0000 //TX_PREEQ_BIN_MIC1_2 693 0x0000 //TX_PREEQ_BIN_MIC1_3 694 0x0000 //TX_PREEQ_BIN_MIC1_4 695 0x0000 //TX_PREEQ_BIN_MIC1_5 696 0x0000 //TX_PREEQ_BIN_MIC1_6 697 0x0000 //TX_PREEQ_BIN_MIC1_7 698 0x0000 //TX_PREEQ_BIN_MIC1_8 699 0x0000 //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 743 0x0000 //TX_PREEQ_BIN_MIC2_4 744 0x0000 //TX_PREEQ_BIN_MIC2_5 745 0x0000 //TX_PREEQ_BIN_MIC2_6 746 0x0000 //TX_PREEQ_BIN_MIC2_7 747 0x0000 //TX_PREEQ_BIN_MIC2_8 748 0x0000 //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0064 //TX_MIC_CALIBRATION_0 766 0x006A //TX_MIC_CALIBRATION_1 767 0x006A //TX_MIC_CALIBRATION_2 768 0x006B //TX_MIC_CALIBRATION_3 769 0x0048 //TX_MIC_PWR_BIAS_0 770 0x003C //TX_MIC_PWR_BIAS_1 771 0x003C //TX_MIC_PWR_BIAS_2 772 0x003C //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 791 0x65AD //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0002 //TX_DEADMIC_SILENCE_TH 817 0x0147 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x0000 //TX_KS_NOISEPASTE_FACTOR 824 0x0000 //TX_KS_CONFIG 825 0x0000 //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x0000 //TX_FFP_FP_K_METAL 834 0x0000 //TX_A_POST_FLT_FP 835 0x0000 //TX_RTO_OUTBEAM_TH 836 0x0000 //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0000 //TX_FFP_RESRV_2 849 0x0000 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x0E80 //TX_TDDRC_THRD_2 857 0x3800 //TX_TDDRC_THRD_3 858 0x2A00 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x0000 //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0000 //TX_TDDRC_SMT_W 866 0x0100 //TX_TDDRC_DRC_GAIN 867 0x0000 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x1EB8 //TX_TFMASKLTH 870 0x170A //TX_TFMASKLTHL 871 0x7FFF //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x0000 //TX_FASTNS_OUTIN_TH 884 0x0000 //TX_FASTNS_TFMASK_TH 885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x050D //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0000 //RX_PITCH_BFR_LEN 17 0x0000 //RX_SBD_PITCH_DET 18 0x0000 //RX_PP_RESRV_0 19 0x0000 //RX_PP_RESRV_1 20 0xF800 //RX_N_SN_EST 21 0x0000 //RX_N2_SN_EST 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0000 //RX_FENS_RESRV_1 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 30 0x0000 //RX_EXTRA_NS_L 31 0x0000 //RX_EXTRA_NS_A 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x0000 //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0003 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0010 //RX_MAXLEVEL_CNG 132 0x0000 //RX_BWE_UV_TH 133 0x0000 //RX_BWE_UV_TH2 134 0x0000 //RX_BWE_UV_TH3 135 0x0000 //RX_BWE_V_TH 136 0x0000 //RX_BWE_GAIN1_V_TH1 137 0x0000 //RX_BWE_GAIN1_V_TH2 138 0x0000 //RX_BWE_UV_EQ 139 0x0000 //RX_BWE_V_EQ 140 0x0000 //RX_BWE_TONE_TH 141 0x0000 //RX_BWE_UV_HOLD_T 142 0x0000 //RX_BWE_GAIN2_ALPHA 143 0x0000 //RX_BWE_GAIN3_ALPHA 144 0x0000 //RX_BWE_CUTOFF 145 0x0000 //RX_BWE_GAINFILL 146 0x0000 //RX_BWE_MAXTH_TONE 147 0x0000 //RX_BWE_EQ_0 148 0x0000 //RX_BWE_EQ_1 149 0x0000 //RX_BWE_EQ_2 150 0x0000 //RX_BWE_EQ_3 151 0x0000 //RX_BWE_EQ_4 152 0x0000 //RX_BWE_EQ_5 153 0x0000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x2040 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x050D //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0000 //RX_PITCH_BFR_LEN 174 0x0000 //RX_SBD_PITCH_DET 175 0x0000 //RX_PP_RESRV_0 176 0x0000 //RX_PP_RESRV_1 177 0xF800 //RX_N_SN_EST 178 0x0000 //RX_N2_SN_EST 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0000 //RX_FENS_RESRV_1 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 187 0x0000 //RX_EXTRA_NS_L 188 0x0000 //RX_EXTRA_NS_A 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x0000 //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0003 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x0080 //RX_MIN_G_FP 285 0x2000 //RX_MAX_G_FP 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0010 //RX_MAXLEVEL_CNG 289 0x0000 //RX_BWE_UV_TH 290 0x0000 //RX_BWE_UV_TH2 291 0x0000 //RX_BWE_UV_TH3 292 0x0000 //RX_BWE_V_TH 293 0x0000 //RX_BWE_GAIN1_V_TH1 294 0x0000 //RX_BWE_GAIN1_V_TH2 295 0x0000 //RX_BWE_UV_EQ 296 0x0000 //RX_BWE_V_EQ 297 0x0000 //RX_BWE_TONE_TH 298 0x0000 //RX_BWE_UV_HOLD_T 299 0x0000 //RX_BWE_GAIN2_ALPHA 300 0x0000 //RX_BWE_GAIN3_ALPHA 301 0x0000 //RX_BWE_CUTOFF 302 0x0000 //RX_BWE_GAINFILL 303 0x0000 //RX_BWE_MAXTH_TONE 304 0x0000 //RX_BWE_EQ_0 305 0x0000 //RX_BWE_EQ_1 306 0x0000 //RX_BWE_EQ_2 307 0x0000 //RX_BWE_EQ_3 308 0x0000 //RX_BWE_EQ_4 309 0x0000 //RX_BWE_EQ_5 310 0x0000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-WB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 2 0x0000 //TX_PATCH_REG 3 0x0200 //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x0078 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0000 //TX_MICS_OF_PAIR0 38 0x0000 //TX_MICS_OF_PAIR1 39 0x0000 //TX_MICS_OF_PAIR2 40 0x0000 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0003 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x0000 //TX_HD_BIN_MASK 53 0x0000 //TX_HD_SUBAND_MASK 54 0x0000 //TX_HD_FRAME_AVG_MASK 55 0x0000 //TX_HD_MIN_FRQ 56 0x0000 //TX_HD_ALPHA_PSD 57 0x0000 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0x0000 //TX_T_PSDVAT 63 0x0000 //TX_CNT 64 0x0000 //TX_ANTI_HOWL_GAIN 65 0x0000 //TX_MICFORBFMARK_0 66 0x0000 //TX_MICFORBFMARK_1 67 0x0000 //TX_MICFORBFMARK_2 68 0x0000 //TX_MICFORBFMARK_3 69 0x0000 //TX_MICFORBFMARK_4 70 0x0000 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x0000 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x0000 //TX_ADCS_GAIN 112 0x0000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x7FFF //TX_BLMIC_BLKFACTOR 116 0x7FFF //TX_BRMIC_BLKFACTOR 117 0x000A //TX_MICBLK_START_BIN 118 0x0041 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x0000 //TX_FE_ENER_TH_MTS 124 0x0000 //TX_FE_ENER_TH_EXP 125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x0000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0020 //TX_MIC_BLOCK_N 128 0x7652 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7800 //TX_THR_PITCH_DET_0 131 0x7000 //TX_THR_PITCH_DET_1 132 0x6000 //TX_THR_PITCH_DET_2 133 0x0000 //TX_PITCH_BFR_LEN 134 0x0000 //TX_SBD_PITCH_DET 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x2000 //TX_AEC_REF_GAIN_0 148 0x2000 //TX_AEC_REF_GAIN_1 149 0x2000 //TX_AEC_REF_GAIN_2 150 0x4000 //TX_EAD_THR 151 0x0200 //TX_THR_RE_EST 152 0x0100 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0100 //TX_MIN_EQ_RE_EST_2 155 0x0100 //TX_MIN_EQ_RE_EST_3 156 0x0100 //TX_MIN_EQ_RE_EST_4 157 0x0100 //TX_MIN_EQ_RE_EST_5 158 0x0100 //TX_MIN_EQ_RE_EST_6 159 0x0100 //TX_MIN_EQ_RE_EST_7 160 0x0100 //TX_MIN_EQ_RE_EST_8 161 0x0100 //TX_MIN_EQ_RE_EST_9 162 0x0100 //TX_MIN_EQ_RE_EST_10 163 0x0100 //TX_MIN_EQ_RE_EST_11 164 0x0100 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE 167 0x0000 //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0008 //TX_SE_HOLD_N 170 0x0050 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x0000 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x0000 //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0000 //TX_FRQ_LIN_LEN 184 0x0000 //TX_FRQ_AEC_LEN_RHO 185 0x0000 //TX_MU0_UNP_FRQ_AEC 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7333 //TX_DTD_THR1_0 198 0x7333 //TX_DTD_THR1_1 199 0x7333 //TX_DTD_THR1_2 200 0x7333 //TX_DTD_THR1_3 201 0x7333 //TX_DTD_THR1_4 202 0x7333 //TX_DTD_THR1_5 203 0x7333 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0400 //TX_DT_CUT_K 214 0x0000 //TX_DT_CUT_THR 215 0x0000 //TX_COMFORT_G 216 0x0000 //TX_POWER_YOUT_TH 217 0x0000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x0800 //TX_B_POST_FILT_ECHO_H 230 0x0000 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x0000 //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xF800 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0A00 //TX_N_SN_EST 267 0x0000 //TX_INBEAM_T 268 0x0000 //TX_INBEAMHOLDT 269 0x1FFF //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x1000 //TX_NE_RTO_TH_L 274 0x1000 //TX_MAINREFRTOH_TH_H 275 0x1000 //TX_MAINREFRTOH_TH_L 276 0x2000 //TX_MAINREFRTO_TH_H 277 0x1400 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 291 0x0014 //TX_MIN_GAIN_S_2 292 0x0014 //TX_MIN_GAIN_S_3 293 0x0014 //TX_MIN_GAIN_S_4 294 0x0014 //TX_MIN_GAIN_S_5 295 0x0014 //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x0000 //TX_NMOS_SUP 298 0x0064 //TX_NS_MAX_PRI_SNR_TH 299 0x7FFF //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x7FFF //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x2000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7E00 //TX_LAMBDA_PFILT_S_0 340 0x7E00 //TX_LAMBDA_PFILT_S_1 341 0x7E00 //TX_LAMBDA_PFILT_S_2 342 0x7E00 //TX_LAMBDA_PFILT_S_3 343 0x7E00 //TX_LAMBDA_PFILT_S_4 344 0x7E00 //TX_LAMBDA_PFILT_S_5 345 0x7E00 //TX_LAMBDA_PFILT_S_6 346 0x7E00 //TX_LAMBDA_PFILT_S_7 347 0x0010 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x0000 //TX_K_PEPPER_HF 350 0x0000 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x4000 //TX_HMNC_BST_THR 353 0x0000 //TX_DT_BINVAD_TH_0 354 0x0000 //TX_DT_BINVAD_TH_1 355 0x0000 //TX_DT_BINVAD_TH_2 356 0x0000 //TX_DT_BINVAD_TH_3 357 0x0000 //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0001 //TX_BF_SGRAD_FLG 362 0x0000 //TX_BF_DVG_TH 363 0x0000 //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT 367 0x0102 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 371 0x0032 //TX_NOISE_TH_2 372 0x3D54 //TX_NOISE_TH_3 373 0x012C //TX_NOISE_TH_4 374 0x07D0 //TX_NOISE_TH_5 375 0x6590 //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x00F8 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY 387 0x6400 //TX_OUT_ENER_TH_NOISE 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH 406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR 410 0x0080 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x2000 //TX_RHO_UPB 415 0x0020 //TX_N_HOLD_HS 416 0x0009 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0000 //TX_EXTRA_GAIN_MICBLOCK 419 0x0333 //TX_THR_STD_NSR 420 0x0219 //TX_THR_STD_PLH 421 0x09C4 //TX_N_HOLD_STD 422 0x0166 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x0000 //TX_SB_RTO_MEAN_TH_RUB 428 0x2000 //TX_WTA_EN_RTO_TH 429 0x1400 //TX_TOP_ENER_TH_F 430 0x0064 //TX_DESIRED_TALK_HOLDT 431 0x1000 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0000 //TX_HS_VAD_BIN 435 0x0000 //TX_THR_VAD_HS 436 0x0000 //TX_MEAN_RTO_MIN_TH2 437 0x0000 //TX_SILENCE_T 438 0x4000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x099A //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x001E //TX_DOA_VAD_THR_1 445 0x001E //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B 453 0x005A //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C 456 0x005A //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D 459 0x005A //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0172 //TX_BF_HOLDOFF_T 473 0x8000 //TX_DOA_COST_FACTOR 474 0x0D9A //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x071C //TX_DOA_TRACK_HT 477 0x0280 //TX_N1_HOLD_HF 478 0x0140 //TX_N2_HOLD_HF 479 0x2AAB //TX_BF_RESET_THR_HF 480 0x4000 //TX_DOA_SMOOTH 481 0x0000 //TX_MU_BF 482 0x0200 //TX_BF_MU_LF_B2 483 0x0000 //TX_BF_FC_END_BIN_B2 484 0x0000 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0000 //TX_N_DOA_SEED 488 0x0000 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x0000 //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x0000 //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x0000 //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0168 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0004 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0230 //TX_NOR_OFF_TH1 503 0xD333 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR 531 0x03E8 //TX_ENGY_THR 532 0x0000 //TX_CORR_HIGH_TH 533 0x0000 //TX_ENGY_THR_2 534 0x0000 //TX_MEAN_RTO_THR 535 0x0000 //TX_WNS_ENOISE_MIC0_TH 536 0x0000 //TX_RATIOMICL_TH 537 0x0000 //TX_CALIG_HS 538 0x000A //TX_LVL_CTRL 539 0x0000 //TX_WIND_SUPRTO 540 0x0000 //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH 545 0x0000 //TX_WNS_RESRV_0 546 0x0000 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0000 //TX_BVE_NOISE_FLOOR_1 554 0x0000 //TX_BVE_NOISE_FLOOR_2 555 0x0000 //TX_BVE_NOISE_FLOOR_3 556 0x0000 //TX_BVE_NOISE_FLOOR_4 557 0x0000 //TX_BVE_NOISE_FLOOR_5 558 0x0000 //TX_BVE_NOISE_FLOOR_6 559 0x0000 //TX_BVE_NOISE_FLOOR_7 560 0x0000 //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0000 //TX_FDEQ_BIN_0 592 0x0000 //TX_FDEQ_BIN_1 593 0x0000 //TX_FDEQ_BIN_2 594 0x0000 //TX_FDEQ_BIN_3 595 0x0000 //TX_FDEQ_BIN_4 596 0x0000 //TX_FDEQ_BIN_5 597 0x0000 //TX_FDEQ_BIN_6 598 0x0000 //TX_FDEQ_BIN_7 599 0x0000 //TX_FDEQ_BIN_8 600 0x0000 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0000 //TX_PREEQ_BIN_MIC0_0 642 0x0000 //TX_PREEQ_BIN_MIC0_1 643 0x0000 //TX_PREEQ_BIN_MIC0_2 644 0x0000 //TX_PREEQ_BIN_MIC0_3 645 0x0000 //TX_PREEQ_BIN_MIC0_4 646 0x0000 //TX_PREEQ_BIN_MIC0_5 647 0x0000 //TX_PREEQ_BIN_MIC0_6 648 0x0000 //TX_PREEQ_BIN_MIC0_7 649 0x0000 //TX_PREEQ_BIN_MIC0_8 650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0000 //TX_PREEQ_BIN_MIC1_0 691 0x0000 //TX_PREEQ_BIN_MIC1_1 692 0x0000 //TX_PREEQ_BIN_MIC1_2 693 0x0000 //TX_PREEQ_BIN_MIC1_3 694 0x0000 //TX_PREEQ_BIN_MIC1_4 695 0x0000 //TX_PREEQ_BIN_MIC1_5 696 0x0000 //TX_PREEQ_BIN_MIC1_6 697 0x0000 //TX_PREEQ_BIN_MIC1_7 698 0x0000 //TX_PREEQ_BIN_MIC1_8 699 0x0000 //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 743 0x0000 //TX_PREEQ_BIN_MIC2_4 744 0x0000 //TX_PREEQ_BIN_MIC2_5 745 0x0000 //TX_PREEQ_BIN_MIC2_6 746 0x0000 //TX_PREEQ_BIN_MIC2_7 747 0x0000 //TX_PREEQ_BIN_MIC2_8 748 0x0000 //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0064 //TX_MIC_CALIBRATION_0 766 0x006A //TX_MIC_CALIBRATION_1 767 0x006A //TX_MIC_CALIBRATION_2 768 0x006B //TX_MIC_CALIBRATION_3 769 0x0048 //TX_MIC_PWR_BIAS_0 770 0x003C //TX_MIC_PWR_BIAS_1 771 0x003C //TX_MIC_PWR_BIAS_2 772 0x003C //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 791 0x65AD //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0002 //TX_DEADMIC_SILENCE_TH 817 0x0147 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x0000 //TX_KS_NOISEPASTE_FACTOR 824 0x0000 //TX_KS_CONFIG 825 0x0000 //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x0000 //TX_FFP_FP_K_METAL 834 0x0000 //TX_A_POST_FLT_FP 835 0x0000 //TX_RTO_OUTBEAM_TH 836 0x0000 //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0000 //TX_FFP_RESRV_2 849 0x0000 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x0E80 //TX_TDDRC_THRD_2 857 0x3800 //TX_TDDRC_THRD_3 858 0x2A00 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x0000 //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0000 //TX_TDDRC_SMT_W 866 0x0100 //TX_TDDRC_DRC_GAIN 867 0x0000 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x1EB8 //TX_TFMASKLTH 870 0x170A //TX_TFMASKLTHL 871 0x7FFF //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x0000 //TX_FASTNS_OUTIN_TH 884 0x0000 //TX_FASTNS_TFMASK_TH 885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x050D //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0000 //RX_PITCH_BFR_LEN 17 0x0000 //RX_SBD_PITCH_DET 18 0x0000 //RX_PP_RESRV_0 19 0x0000 //RX_PP_RESRV_1 20 0xF800 //RX_N_SN_EST 21 0x0000 //RX_N2_SN_EST 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0000 //RX_FENS_RESRV_1 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 30 0x0000 //RX_EXTRA_NS_L 31 0x0000 //RX_EXTRA_NS_A 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x0000 //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0003 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0010 //RX_MAXLEVEL_CNG 132 0x0000 //RX_BWE_UV_TH 133 0x0000 //RX_BWE_UV_TH2 134 0x0000 //RX_BWE_UV_TH3 135 0x0000 //RX_BWE_V_TH 136 0x0000 //RX_BWE_GAIN1_V_TH1 137 0x0000 //RX_BWE_GAIN1_V_TH2 138 0x0000 //RX_BWE_UV_EQ 139 0x0000 //RX_BWE_V_EQ 140 0x0000 //RX_BWE_TONE_TH 141 0x0000 //RX_BWE_UV_HOLD_T 142 0x0000 //RX_BWE_GAIN2_ALPHA 143 0x0000 //RX_BWE_GAIN3_ALPHA 144 0x0000 //RX_BWE_CUTOFF 145 0x0000 //RX_BWE_GAINFILL 146 0x0000 //RX_BWE_MAXTH_TONE 147 0x0000 //RX_BWE_EQ_0 148 0x0000 //RX_BWE_EQ_1 149 0x0000 //RX_BWE_EQ_2 150 0x0000 //RX_BWE_EQ_3 151 0x0000 //RX_BWE_EQ_4 152 0x0000 //RX_BWE_EQ_5 153 0x0000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x2040 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x050D //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0000 //RX_PITCH_BFR_LEN 174 0x0000 //RX_SBD_PITCH_DET 175 0x0000 //RX_PP_RESRV_0 176 0x0000 //RX_PP_RESRV_1 177 0xF800 //RX_N_SN_EST 178 0x0000 //RX_N2_SN_EST 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0000 //RX_FENS_RESRV_1 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 187 0x0000 //RX_EXTRA_NS_L 188 0x0000 //RX_EXTRA_NS_A 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x0000 //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0003 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x0080 //RX_MIN_G_FP 285 0x2000 //RX_MAX_G_FP 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0010 //RX_MAXLEVEL_CNG 289 0x0000 //RX_BWE_UV_TH 290 0x0000 //RX_BWE_UV_TH2 291 0x0000 //RX_BWE_UV_TH3 292 0x0000 //RX_BWE_V_TH 293 0x0000 //RX_BWE_GAIN1_V_TH1 294 0x0000 //RX_BWE_GAIN1_V_TH2 295 0x0000 //RX_BWE_UV_EQ 296 0x0000 //RX_BWE_V_EQ 297 0x0000 //RX_BWE_TONE_TH 298 0x0000 //RX_BWE_UV_HOLD_T 299 0x0000 //RX_BWE_GAIN2_ALPHA 300 0x0000 //RX_BWE_GAIN3_ALPHA 301 0x0000 //RX_BWE_CUTOFF 302 0x0000 //RX_BWE_GAINFILL 303 0x0000 //RX_BWE_MAXTH_TONE 304 0x0000 //RX_BWE_EQ_0 305 0x0000 //RX_BWE_EQ_1 306 0x0000 //RX_BWE_EQ_2 307 0x0000 //RX_BWE_EQ_3 308 0x0000 //RX_BWE_EQ_4 309 0x0000 //RX_BWE_EQ_5 310 0x0000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 2 0x0000 //TX_PATCH_REG 3 0x0200 //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x0078 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0000 //TX_MICS_OF_PAIR0 38 0x0000 //TX_MICS_OF_PAIR1 39 0x0000 //TX_MICS_OF_PAIR2 40 0x0000 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0003 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x0000 //TX_HD_BIN_MASK 53 0x0000 //TX_HD_SUBAND_MASK 54 0x0000 //TX_HD_FRAME_AVG_MASK 55 0x0000 //TX_HD_MIN_FRQ 56 0x0000 //TX_HD_ALPHA_PSD 57 0x0000 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0x0000 //TX_T_PSDVAT 63 0x0000 //TX_CNT 64 0x0000 //TX_ANTI_HOWL_GAIN 65 0x0000 //TX_MICFORBFMARK_0 66 0x0000 //TX_MICFORBFMARK_1 67 0x0000 //TX_MICFORBFMARK_2 68 0x0000 //TX_MICFORBFMARK_3 69 0x0000 //TX_MICFORBFMARK_4 70 0x0000 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x0000 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x0000 //TX_ADCS_GAIN 112 0x0000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x7FFF //TX_BLMIC_BLKFACTOR 116 0x7FFF //TX_BRMIC_BLKFACTOR 117 0x000A //TX_MICBLK_START_BIN 118 0x0041 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x0000 //TX_FE_ENER_TH_MTS 124 0x0000 //TX_FE_ENER_TH_EXP 125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x0000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0020 //TX_MIC_BLOCK_N 128 0x7652 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7800 //TX_THR_PITCH_DET_0 131 0x7000 //TX_THR_PITCH_DET_1 132 0x6000 //TX_THR_PITCH_DET_2 133 0x0000 //TX_PITCH_BFR_LEN 134 0x0000 //TX_SBD_PITCH_DET 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x2000 //TX_AEC_REF_GAIN_0 148 0x2000 //TX_AEC_REF_GAIN_1 149 0x2000 //TX_AEC_REF_GAIN_2 150 0x4000 //TX_EAD_THR 151 0x0200 //TX_THR_RE_EST 152 0x0100 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0100 //TX_MIN_EQ_RE_EST_2 155 0x0100 //TX_MIN_EQ_RE_EST_3 156 0x0100 //TX_MIN_EQ_RE_EST_4 157 0x0100 //TX_MIN_EQ_RE_EST_5 158 0x0100 //TX_MIN_EQ_RE_EST_6 159 0x0100 //TX_MIN_EQ_RE_EST_7 160 0x0100 //TX_MIN_EQ_RE_EST_8 161 0x0100 //TX_MIN_EQ_RE_EST_9 162 0x0100 //TX_MIN_EQ_RE_EST_10 163 0x0100 //TX_MIN_EQ_RE_EST_11 164 0x0100 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE 167 0x0000 //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0008 //TX_SE_HOLD_N 170 0x0050 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x0000 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x0000 //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0000 //TX_FRQ_LIN_LEN 184 0x0000 //TX_FRQ_AEC_LEN_RHO 185 0x0000 //TX_MU0_UNP_FRQ_AEC 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7333 //TX_DTD_THR1_0 198 0x7333 //TX_DTD_THR1_1 199 0x7333 //TX_DTD_THR1_2 200 0x7333 //TX_DTD_THR1_3 201 0x7333 //TX_DTD_THR1_4 202 0x7333 //TX_DTD_THR1_5 203 0x7333 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0400 //TX_DT_CUT_K 214 0x0000 //TX_DT_CUT_THR 215 0x0000 //TX_COMFORT_G 216 0x0000 //TX_POWER_YOUT_TH 217 0x0000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x0800 //TX_B_POST_FILT_ECHO_H 230 0x0000 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x0000 //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xF800 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0A00 //TX_N_SN_EST 267 0x0000 //TX_INBEAM_T 268 0x0000 //TX_INBEAMHOLDT 269 0x1FFF //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x1000 //TX_NE_RTO_TH_L 274 0x1000 //TX_MAINREFRTOH_TH_H 275 0x1000 //TX_MAINREFRTOH_TH_L 276 0x2000 //TX_MAINREFRTO_TH_H 277 0x1400 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 291 0x0014 //TX_MIN_GAIN_S_2 292 0x0014 //TX_MIN_GAIN_S_3 293 0x0014 //TX_MIN_GAIN_S_4 294 0x0014 //TX_MIN_GAIN_S_5 295 0x0014 //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x0000 //TX_NMOS_SUP 298 0x0064 //TX_NS_MAX_PRI_SNR_TH 299 0x7FFF //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x7FFF //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x2000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7E00 //TX_LAMBDA_PFILT_S_0 340 0x7E00 //TX_LAMBDA_PFILT_S_1 341 0x7E00 //TX_LAMBDA_PFILT_S_2 342 0x7E00 //TX_LAMBDA_PFILT_S_3 343 0x7E00 //TX_LAMBDA_PFILT_S_4 344 0x7E00 //TX_LAMBDA_PFILT_S_5 345 0x7E00 //TX_LAMBDA_PFILT_S_6 346 0x7E00 //TX_LAMBDA_PFILT_S_7 347 0x0010 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x0000 //TX_K_PEPPER_HF 350 0x0000 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x4000 //TX_HMNC_BST_THR 353 0x0000 //TX_DT_BINVAD_TH_0 354 0x0000 //TX_DT_BINVAD_TH_1 355 0x0000 //TX_DT_BINVAD_TH_2 356 0x0000 //TX_DT_BINVAD_TH_3 357 0x0000 //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0001 //TX_BF_SGRAD_FLG 362 0x0000 //TX_BF_DVG_TH 363 0x0000 //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT 367 0x0383 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 371 0x0032 //TX_NOISE_TH_2 372 0x3D54 //TX_NOISE_TH_3 373 0x012C //TX_NOISE_TH_4 374 0x07D0 //TX_NOISE_TH_5 375 0x6590 //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x044C //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY 387 0x6400 //TX_OUT_ENER_TH_NOISE 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH 406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR 410 0x0080 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x2000 //TX_RHO_UPB 415 0x0020 //TX_N_HOLD_HS 416 0x0009 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0000 //TX_EXTRA_GAIN_MICBLOCK 419 0x0333 //TX_THR_STD_NSR 420 0x0219 //TX_THR_STD_PLH 421 0x09C4 //TX_N_HOLD_STD 422 0x0166 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x0000 //TX_SB_RTO_MEAN_TH_RUB 428 0x2000 //TX_WTA_EN_RTO_TH 429 0x1400 //TX_TOP_ENER_TH_F 430 0x0064 //TX_DESIRED_TALK_HOLDT 431 0x1000 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0000 //TX_HS_VAD_BIN 435 0x0000 //TX_THR_VAD_HS 436 0x0000 //TX_MEAN_RTO_MIN_TH2 437 0x0000 //TX_SILENCE_T 438 0x4000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x099A //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x001E //TX_DOA_VAD_THR_1 445 0x001E //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B 453 0x005A //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C 456 0x005A //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D 459 0x005A //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0172 //TX_BF_HOLDOFF_T 473 0x8000 //TX_DOA_COST_FACTOR 474 0x0D9A //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x071C //TX_DOA_TRACK_HT 477 0x0280 //TX_N1_HOLD_HF 478 0x0140 //TX_N2_HOLD_HF 479 0x2AAB //TX_BF_RESET_THR_HF 480 0x4000 //TX_DOA_SMOOTH 481 0x0000 //TX_MU_BF 482 0x0200 //TX_BF_MU_LF_B2 483 0x0000 //TX_BF_FC_END_BIN_B2 484 0x0000 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0000 //TX_N_DOA_SEED 488 0x0000 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x0000 //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x0000 //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x0000 //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0168 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0004 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0230 //TX_NOR_OFF_TH1 503 0xD333 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR 531 0x03E8 //TX_ENGY_THR 532 0x0000 //TX_CORR_HIGH_TH 533 0x0000 //TX_ENGY_THR_2 534 0x0000 //TX_MEAN_RTO_THR 535 0x0000 //TX_WNS_ENOISE_MIC0_TH 536 0x0000 //TX_RATIOMICL_TH 537 0x0000 //TX_CALIG_HS 538 0x000A //TX_LVL_CTRL 539 0x0000 //TX_WIND_SUPRTO 540 0x0000 //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH 545 0x0000 //TX_WNS_RESRV_0 546 0x0000 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0000 //TX_BVE_NOISE_FLOOR_1 554 0x0000 //TX_BVE_NOISE_FLOOR_2 555 0x0000 //TX_BVE_NOISE_FLOOR_3 556 0x0000 //TX_BVE_NOISE_FLOOR_4 557 0x0000 //TX_BVE_NOISE_FLOOR_5 558 0x0000 //TX_BVE_NOISE_FLOOR_6 559 0x0000 //TX_BVE_NOISE_FLOOR_7 560 0x0000 //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0000 //TX_FDEQ_BIN_0 592 0x0000 //TX_FDEQ_BIN_1 593 0x0000 //TX_FDEQ_BIN_2 594 0x0000 //TX_FDEQ_BIN_3 595 0x0000 //TX_FDEQ_BIN_4 596 0x0000 //TX_FDEQ_BIN_5 597 0x0000 //TX_FDEQ_BIN_6 598 0x0000 //TX_FDEQ_BIN_7 599 0x0000 //TX_FDEQ_BIN_8 600 0x0000 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0000 //TX_PREEQ_BIN_MIC0_0 642 0x0000 //TX_PREEQ_BIN_MIC0_1 643 0x0000 //TX_PREEQ_BIN_MIC0_2 644 0x0000 //TX_PREEQ_BIN_MIC0_3 645 0x0000 //TX_PREEQ_BIN_MIC0_4 646 0x0000 //TX_PREEQ_BIN_MIC0_5 647 0x0000 //TX_PREEQ_BIN_MIC0_6 648 0x0000 //TX_PREEQ_BIN_MIC0_7 649 0x0000 //TX_PREEQ_BIN_MIC0_8 650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0000 //TX_PREEQ_BIN_MIC1_0 691 0x0000 //TX_PREEQ_BIN_MIC1_1 692 0x0000 //TX_PREEQ_BIN_MIC1_2 693 0x0000 //TX_PREEQ_BIN_MIC1_3 694 0x0000 //TX_PREEQ_BIN_MIC1_4 695 0x0000 //TX_PREEQ_BIN_MIC1_5 696 0x0000 //TX_PREEQ_BIN_MIC1_6 697 0x0000 //TX_PREEQ_BIN_MIC1_7 698 0x0000 //TX_PREEQ_BIN_MIC1_8 699 0x0000 //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 743 0x0000 //TX_PREEQ_BIN_MIC2_4 744 0x0000 //TX_PREEQ_BIN_MIC2_5 745 0x0000 //TX_PREEQ_BIN_MIC2_6 746 0x0000 //TX_PREEQ_BIN_MIC2_7 747 0x0000 //TX_PREEQ_BIN_MIC2_8 748 0x0000 //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0064 //TX_MIC_CALIBRATION_0 766 0x006A //TX_MIC_CALIBRATION_1 767 0x006A //TX_MIC_CALIBRATION_2 768 0x006B //TX_MIC_CALIBRATION_3 769 0x0048 //TX_MIC_PWR_BIAS_0 770 0x003C //TX_MIC_PWR_BIAS_1 771 0x003C //TX_MIC_PWR_BIAS_2 772 0x003C //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 791 0x65AD //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0002 //TX_DEADMIC_SILENCE_TH 817 0x0147 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x0000 //TX_KS_NOISEPASTE_FACTOR 824 0x0000 //TX_KS_CONFIG 825 0x0000 //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x0000 //TX_FFP_FP_K_METAL 834 0x0000 //TX_A_POST_FLT_FP 835 0x0000 //TX_RTO_OUTBEAM_TH 836 0x0000 //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0000 //TX_FFP_RESRV_2 849 0x0000 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x0E80 //TX_TDDRC_THRD_2 857 0x3800 //TX_TDDRC_THRD_3 858 0x2A00 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x0000 //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0000 //TX_TDDRC_SMT_W 866 0x0100 //TX_TDDRC_DRC_GAIN 867 0x0000 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x1EB8 //TX_TFMASKLTH 870 0x170A //TX_TFMASKLTHL 871 0x7FFF //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x0000 //TX_FASTNS_OUTIN_TH 884 0x0000 //TX_FASTNS_TFMASK_TH 885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0x8000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x050D //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0000 //RX_PITCH_BFR_LEN 17 0x0000 //RX_SBD_PITCH_DET 18 0x0000 //RX_PP_RESRV_0 19 0x0000 //RX_PP_RESRV_1 20 0xF800 //RX_N_SN_EST 21 0x0000 //RX_N2_SN_EST 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0000 //RX_FENS_RESRV_1 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 30 0x0000 //RX_EXTRA_NS_L 31 0x0000 //RX_EXTRA_NS_A 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x0000 //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0003 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0010 //RX_MAXLEVEL_CNG 132 0x0000 //RX_BWE_UV_TH 133 0x0000 //RX_BWE_UV_TH2 134 0x0000 //RX_BWE_UV_TH3 135 0x0000 //RX_BWE_V_TH 136 0x0000 //RX_BWE_GAIN1_V_TH1 137 0x0000 //RX_BWE_GAIN1_V_TH2 138 0x0000 //RX_BWE_UV_EQ 139 0x0000 //RX_BWE_V_EQ 140 0x0000 //RX_BWE_TONE_TH 141 0x0000 //RX_BWE_UV_HOLD_T 142 0x0000 //RX_BWE_GAIN2_ALPHA 143 0x0000 //RX_BWE_GAIN3_ALPHA 144 0x0000 //RX_BWE_CUTOFF 145 0x0000 //RX_BWE_GAINFILL 146 0x0000 //RX_BWE_MAXTH_TONE 147 0x0000 //RX_BWE_EQ_0 148 0x0000 //RX_BWE_EQ_1 149 0x0000 //RX_BWE_EQ_2 150 0x0000 //RX_BWE_EQ_3 151 0x0000 //RX_BWE_EQ_4 152 0x0000 //RX_BWE_EQ_5 153 0x0000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x0040 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x050D //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0000 //RX_PITCH_BFR_LEN 174 0x0000 //RX_SBD_PITCH_DET 175 0x0000 //RX_PP_RESRV_0 176 0x0000 //RX_PP_RESRV_1 177 0xF800 //RX_N_SN_EST 178 0x0000 //RX_N2_SN_EST 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0000 //RX_FENS_RESRV_1 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 187 0x0000 //RX_EXTRA_NS_L 188 0x0000 //RX_EXTRA_NS_A 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x0000 //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0003 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x0080 //RX_MIN_G_FP 285 0x2000 //RX_MAX_G_FP 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0010 //RX_MAXLEVEL_CNG 289 0x0000 //RX_BWE_UV_TH 290 0x0000 //RX_BWE_UV_TH2 291 0x0000 //RX_BWE_UV_TH3 292 0x0000 //RX_BWE_V_TH 293 0x0000 //RX_BWE_GAIN1_V_TH1 294 0x0000 //RX_BWE_GAIN1_V_TH2 295 0x0000 //RX_BWE_UV_EQ 296 0x0000 //RX_BWE_V_EQ 297 0x0000 //RX_BWE_TONE_TH 298 0x0000 //RX_BWE_UV_HOLD_T 299 0x0000 //RX_BWE_GAIN2_ALPHA 300 0x0000 //RX_BWE_GAIN3_ALPHA 301 0x0000 //RX_BWE_CUTOFF 302 0x0000 //RX_BWE_GAINFILL 303 0x0000 //RX_BWE_MAXTH_TONE 304 0x0000 //RX_BWE_EQ_0 305 0x0000 //RX_BWE_EQ_1 306 0x0000 //RX_BWE_EQ_2 307 0x0000 //RX_BWE_EQ_3 308 0x0000 //RX_BWE_EQ_4 309 0x0000 //RX_BWE_EQ_5 310 0x0000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-FB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 2 0x0000 //TX_PATCH_REG 3 0x0200 //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x0078 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0000 //TX_MICS_OF_PAIR0 38 0x0000 //TX_MICS_OF_PAIR1 39 0x0000 //TX_MICS_OF_PAIR2 40 0x0000 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0003 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x0000 //TX_HD_BIN_MASK 53 0x0000 //TX_HD_SUBAND_MASK 54 0x0000 //TX_HD_FRAME_AVG_MASK 55 0x0000 //TX_HD_MIN_FRQ 56 0x0000 //TX_HD_ALPHA_PSD 57 0x0000 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0x0000 //TX_T_PSDVAT 63 0x0000 //TX_CNT 64 0x0000 //TX_ANTI_HOWL_GAIN 65 0x0000 //TX_MICFORBFMARK_0 66 0x0000 //TX_MICFORBFMARK_1 67 0x0000 //TX_MICFORBFMARK_2 68 0x0000 //TX_MICFORBFMARK_3 69 0x0000 //TX_MICFORBFMARK_4 70 0x0000 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x0000 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x0000 //TX_ADCS_GAIN 112 0x0000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x7FFF //TX_BLMIC_BLKFACTOR 116 0x7FFF //TX_BRMIC_BLKFACTOR 117 0x000A //TX_MICBLK_START_BIN 118 0x0041 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x0000 //TX_FE_ENER_TH_MTS 124 0x0000 //TX_FE_ENER_TH_EXP 125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x0000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0020 //TX_MIC_BLOCK_N 128 0x7652 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7800 //TX_THR_PITCH_DET_0 131 0x7000 //TX_THR_PITCH_DET_1 132 0x6000 //TX_THR_PITCH_DET_2 133 0x0000 //TX_PITCH_BFR_LEN 134 0x0000 //TX_SBD_PITCH_DET 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x2000 //TX_AEC_REF_GAIN_0 148 0x2000 //TX_AEC_REF_GAIN_1 149 0x2000 //TX_AEC_REF_GAIN_2 150 0x4000 //TX_EAD_THR 151 0x0200 //TX_THR_RE_EST 152 0x0100 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0100 //TX_MIN_EQ_RE_EST_2 155 0x0100 //TX_MIN_EQ_RE_EST_3 156 0x0100 //TX_MIN_EQ_RE_EST_4 157 0x0100 //TX_MIN_EQ_RE_EST_5 158 0x0100 //TX_MIN_EQ_RE_EST_6 159 0x0100 //TX_MIN_EQ_RE_EST_7 160 0x0100 //TX_MIN_EQ_RE_EST_8 161 0x0100 //TX_MIN_EQ_RE_EST_9 162 0x0100 //TX_MIN_EQ_RE_EST_10 163 0x0100 //TX_MIN_EQ_RE_EST_11 164 0x0100 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE 167 0x0000 //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0008 //TX_SE_HOLD_N 170 0x0050 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x0000 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x0000 //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0000 //TX_FRQ_LIN_LEN 184 0x0000 //TX_FRQ_AEC_LEN_RHO 185 0x0000 //TX_MU0_UNP_FRQ_AEC 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7333 //TX_DTD_THR1_0 198 0x7333 //TX_DTD_THR1_1 199 0x7333 //TX_DTD_THR1_2 200 0x7333 //TX_DTD_THR1_3 201 0x7333 //TX_DTD_THR1_4 202 0x7333 //TX_DTD_THR1_5 203 0x7333 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0400 //TX_DT_CUT_K 214 0x0000 //TX_DT_CUT_THR 215 0x0000 //TX_COMFORT_G 216 0x0000 //TX_POWER_YOUT_TH 217 0x0000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x0800 //TX_B_POST_FILT_ECHO_H 230 0x0000 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x0000 //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF700 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xF800 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0A00 //TX_N_SN_EST 267 0x0000 //TX_INBEAM_T 268 0x0000 //TX_INBEAMHOLDT 269 0x1FFF //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x1000 //TX_NE_RTO_TH_L 274 0x1000 //TX_MAINREFRTOH_TH_H 275 0x1000 //TX_MAINREFRTOH_TH_L 276 0x2000 //TX_MAINREFRTO_TH_H 277 0x1400 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 291 0x0014 //TX_MIN_GAIN_S_2 292 0x0014 //TX_MIN_GAIN_S_3 293 0x0014 //TX_MIN_GAIN_S_4 294 0x0014 //TX_MIN_GAIN_S_5 295 0x0014 //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x0000 //TX_NMOS_SUP 298 0x0064 //TX_NS_MAX_PRI_SNR_TH 299 0x7FFF //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x7FFF //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x2000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7E00 //TX_LAMBDA_PFILT_S_0 340 0x7E00 //TX_LAMBDA_PFILT_S_1 341 0x7E00 //TX_LAMBDA_PFILT_S_2 342 0x7E00 //TX_LAMBDA_PFILT_S_3 343 0x7E00 //TX_LAMBDA_PFILT_S_4 344 0x7E00 //TX_LAMBDA_PFILT_S_5 345 0x7E00 //TX_LAMBDA_PFILT_S_6 346 0x7E00 //TX_LAMBDA_PFILT_S_7 347 0x0010 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x0000 //TX_K_PEPPER_HF 350 0x0000 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x4000 //TX_HMNC_BST_THR 353 0x0000 //TX_DT_BINVAD_TH_0 354 0x0000 //TX_DT_BINVAD_TH_1 355 0x0000 //TX_DT_BINVAD_TH_2 356 0x0000 //TX_DT_BINVAD_TH_3 357 0x0000 //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0001 //TX_BF_SGRAD_FLG 362 0x0000 //TX_BF_DVG_TH 363 0x0000 //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT 367 0x04E8 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 371 0x0032 //TX_NOISE_TH_2 372 0x3D54 //TX_NOISE_TH_3 373 0x012C //TX_NOISE_TH_4 374 0x07D0 //TX_NOISE_TH_5 375 0x6590 //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x02BC //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x1482 //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY 387 0x6400 //TX_OUT_ENER_TH_NOISE 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH 406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR 410 0x0080 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x2000 //TX_RHO_UPB 415 0x0020 //TX_N_HOLD_HS 416 0x0009 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0000 //TX_EXTRA_GAIN_MICBLOCK 419 0x0333 //TX_THR_STD_NSR 420 0x0219 //TX_THR_STD_PLH 421 0x09C4 //TX_N_HOLD_STD 422 0x0166 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x0000 //TX_SB_RTO_MEAN_TH_RUB 428 0x2000 //TX_WTA_EN_RTO_TH 429 0x1400 //TX_TOP_ENER_TH_F 430 0x0064 //TX_DESIRED_TALK_HOLDT 431 0x1000 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0000 //TX_HS_VAD_BIN 435 0x0000 //TX_THR_VAD_HS 436 0x0000 //TX_MEAN_RTO_MIN_TH2 437 0x0000 //TX_SILENCE_T 438 0x4000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x099A //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x001E //TX_DOA_VAD_THR_1 445 0x001E //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B 453 0x005A //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C 456 0x005A //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D 459 0x005A //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0172 //TX_BF_HOLDOFF_T 473 0x8000 //TX_DOA_COST_FACTOR 474 0x0D9A //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x071C //TX_DOA_TRACK_HT 477 0x0280 //TX_N1_HOLD_HF 478 0x0140 //TX_N2_HOLD_HF 479 0x2AAB //TX_BF_RESET_THR_HF 480 0x4000 //TX_DOA_SMOOTH 481 0x0000 //TX_MU_BF 482 0x0200 //TX_BF_MU_LF_B2 483 0x0000 //TX_BF_FC_END_BIN_B2 484 0x0000 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0000 //TX_N_DOA_SEED 488 0x0000 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x0000 //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x0000 //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x0000 //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0168 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0004 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0230 //TX_NOR_OFF_TH1 503 0xD333 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR 531 0x03E8 //TX_ENGY_THR 532 0x0000 //TX_CORR_HIGH_TH 533 0x0000 //TX_ENGY_THR_2 534 0x0000 //TX_MEAN_RTO_THR 535 0x0000 //TX_WNS_ENOISE_MIC0_TH 536 0x0000 //TX_RATIOMICL_TH 537 0x0000 //TX_CALIG_HS 538 0x000A //TX_LVL_CTRL 539 0x0000 //TX_WIND_SUPRTO 540 0x0000 //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH 545 0x0000 //TX_WNS_RESRV_0 546 0x0000 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0000 //TX_BVE_NOISE_FLOOR_1 554 0x0000 //TX_BVE_NOISE_FLOOR_2 555 0x0000 //TX_BVE_NOISE_FLOOR_3 556 0x0000 //TX_BVE_NOISE_FLOOR_4 557 0x0000 //TX_BVE_NOISE_FLOOR_5 558 0x0000 //TX_BVE_NOISE_FLOOR_6 559 0x0000 //TX_BVE_NOISE_FLOOR_7 560 0x0000 //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0000 //TX_FDEQ_BIN_0 592 0x0000 //TX_FDEQ_BIN_1 593 0x0000 //TX_FDEQ_BIN_2 594 0x0000 //TX_FDEQ_BIN_3 595 0x0000 //TX_FDEQ_BIN_4 596 0x0000 //TX_FDEQ_BIN_5 597 0x0000 //TX_FDEQ_BIN_6 598 0x0000 //TX_FDEQ_BIN_7 599 0x0000 //TX_FDEQ_BIN_8 600 0x0000 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0000 //TX_PREEQ_BIN_MIC0_0 642 0x0000 //TX_PREEQ_BIN_MIC0_1 643 0x0000 //TX_PREEQ_BIN_MIC0_2 644 0x0000 //TX_PREEQ_BIN_MIC0_3 645 0x0000 //TX_PREEQ_BIN_MIC0_4 646 0x0000 //TX_PREEQ_BIN_MIC0_5 647 0x0000 //TX_PREEQ_BIN_MIC0_6 648 0x0000 //TX_PREEQ_BIN_MIC0_7 649 0x0000 //TX_PREEQ_BIN_MIC0_8 650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0000 //TX_PREEQ_BIN_MIC1_0 691 0x0000 //TX_PREEQ_BIN_MIC1_1 692 0x0000 //TX_PREEQ_BIN_MIC1_2 693 0x0000 //TX_PREEQ_BIN_MIC1_3 694 0x0000 //TX_PREEQ_BIN_MIC1_4 695 0x0000 //TX_PREEQ_BIN_MIC1_5 696 0x0000 //TX_PREEQ_BIN_MIC1_6 697 0x0000 //TX_PREEQ_BIN_MIC1_7 698 0x0000 //TX_PREEQ_BIN_MIC1_8 699 0x0000 //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 743 0x0000 //TX_PREEQ_BIN_MIC2_4 744 0x0000 //TX_PREEQ_BIN_MIC2_5 745 0x0000 //TX_PREEQ_BIN_MIC2_6 746 0x0000 //TX_PREEQ_BIN_MIC2_7 747 0x0000 //TX_PREEQ_BIN_MIC2_8 748 0x0000 //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0064 //TX_MIC_CALIBRATION_0 766 0x006A //TX_MIC_CALIBRATION_1 767 0x006A //TX_MIC_CALIBRATION_2 768 0x006B //TX_MIC_CALIBRATION_3 769 0x0048 //TX_MIC_PWR_BIAS_0 770 0x003C //TX_MIC_PWR_BIAS_1 771 0x003C //TX_MIC_PWR_BIAS_2 772 0x003C //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 791 0x65AD //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0002 //TX_DEADMIC_SILENCE_TH 817 0x0147 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x0000 //TX_KS_NOISEPASTE_FACTOR 824 0x0000 //TX_KS_CONFIG 825 0x0000 //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x0000 //TX_FFP_FP_K_METAL 834 0x0000 //TX_A_POST_FLT_FP 835 0x0000 //TX_RTO_OUTBEAM_TH 836 0x0000 //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0000 //TX_FFP_RESRV_2 849 0x0000 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x0E80 //TX_TDDRC_THRD_2 857 0x3800 //TX_TDDRC_THRD_3 858 0x2A00 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x0000 //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0000 //TX_TDDRC_SMT_W 866 0x0100 //TX_TDDRC_DRC_GAIN 867 0x0000 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x1EB8 //TX_TFMASKLTH 870 0x170A //TX_TFMASKLTHL 871 0x7FFF //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x0000 //TX_FASTNS_OUTIN_TH 884 0x0000 //TX_FASTNS_TFMASK_TH 885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK 891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x050D //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0000 //RX_PITCH_BFR_LEN 17 0x0000 //RX_SBD_PITCH_DET 18 0x0000 //RX_PP_RESRV_0 19 0x0000 //RX_PP_RESRV_1 20 0xF800 //RX_N_SN_EST 21 0x0000 //RX_N2_SN_EST 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0000 //RX_FENS_RESRV_1 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 30 0x0000 //RX_EXTRA_NS_L 31 0x0000 //RX_EXTRA_NS_A 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x0000 //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0003 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0010 //RX_MAXLEVEL_CNG 132 0x0000 //RX_BWE_UV_TH 133 0x0000 //RX_BWE_UV_TH2 134 0x0000 //RX_BWE_UV_TH3 135 0x0000 //RX_BWE_V_TH 136 0x0000 //RX_BWE_GAIN1_V_TH1 137 0x0000 //RX_BWE_GAIN1_V_TH2 138 0x0000 //RX_BWE_UV_EQ 139 0x0000 //RX_BWE_V_EQ 140 0x0000 //RX_BWE_TONE_TH 141 0x0000 //RX_BWE_UV_HOLD_T 142 0x0000 //RX_BWE_GAIN2_ALPHA 143 0x0000 //RX_BWE_GAIN3_ALPHA 144 0x0000 //RX_BWE_CUTOFF 145 0x0000 //RX_BWE_GAINFILL 146 0x0000 //RX_BWE_MAXTH_TONE 147 0x0000 //RX_BWE_EQ_0 148 0x0000 //RX_BWE_EQ_1 149 0x0000 //RX_BWE_EQ_2 150 0x0000 //RX_BWE_EQ_3 151 0x0000 //RX_BWE_EQ_4 152 0x0000 //RX_BWE_EQ_5 153 0x0000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x2040 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x050D //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0000 //RX_PITCH_BFR_LEN 174 0x0000 //RX_SBD_PITCH_DET 175 0x0000 //RX_PP_RESRV_0 176 0x0000 //RX_PP_RESRV_1 177 0xF800 //RX_N_SN_EST 178 0x0000 //RX_N2_SN_EST 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0000 //RX_FENS_RESRV_1 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 187 0x0000 //RX_EXTRA_NS_L 188 0x0000 //RX_EXTRA_NS_A 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x0000 //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0003 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x0080 //RX_MIN_G_FP 285 0x2000 //RX_MAX_G_FP 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0010 //RX_MAXLEVEL_CNG 289 0x0000 //RX_BWE_UV_TH 290 0x0000 //RX_BWE_UV_TH2 291 0x0000 //RX_BWE_UV_TH3 292 0x0000 //RX_BWE_V_TH 293 0x0000 //RX_BWE_GAIN1_V_TH1 294 0x0000 //RX_BWE_GAIN1_V_TH2 295 0x0000 //RX_BWE_UV_EQ 296 0x0000 //RX_BWE_V_EQ 297 0x0000 //RX_BWE_TONE_TH 298 0x0000 //RX_BWE_UV_HOLD_T 299 0x0000 //RX_BWE_GAIN2_ALPHA 300 0x0000 //RX_BWE_GAIN3_ALPHA 301 0x0000 //RX_BWE_CUTOFF 302 0x0000 //RX_BWE_GAINFILL 303 0x0000 //RX_BWE_MAXTH_TONE 304 0x0000 //RX_BWE_EQ_0 305 0x0000 //RX_BWE_EQ_1 306 0x0000 //RX_BWE_EQ_2 307 0x0000 //RX_BWE_EQ_3 308 0x0000 //RX_BWE_EQ_4 309 0x0000 //RX_BWE_EQ_5 310 0x0000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-RESERVE2-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 2 0x0000 //TX_PATCH_REG 3 0x0200 //TX_SENDFUNC_MODE_0 4 0x0000 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x0078 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0302 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0000 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0000 //TX_MICS_OF_PAIR0 38 0x0000 //TX_MICS_OF_PAIR1 39 0x0000 //TX_MICS_OF_PAIR2 40 0x0000 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0003 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x0000 //TX_HD_BIN_MASK 53 0x0000 //TX_HD_SUBAND_MASK 54 0x0000 //TX_HD_FRAME_AVG_MASK 55 0x0000 //TX_HD_MIN_FRQ 56 0x0000 //TX_HD_ALPHA_PSD 57 0x0000 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0x0000 //TX_T_PSDVAT 63 0x0000 //TX_CNT 64 0x0000 //TX_ANTI_HOWL_GAIN 65 0x0000 //TX_MICFORBFMARK_0 66 0x0000 //TX_MICFORBFMARK_1 67 0x0000 //TX_MICFORBFMARK_2 68 0x0000 //TX_MICFORBFMARK_3 69 0x0000 //TX_MICFORBFMARK_4 70 0x0000 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x0000 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0800 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x0000 //TX_ADCS_GAIN 112 0x0000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x7FFF //TX_BLMIC_BLKFACTOR 116 0x7FFF //TX_BRMIC_BLKFACTOR 117 0x000A //TX_MICBLK_START_BIN 118 0x0041 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0015 //TX_FENE_HOLD 123 0x0000 //TX_FE_ENER_TH_MTS 124 0x0000 //TX_FE_ENER_TH_EXP 125 0x0000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x0000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0020 //TX_MIC_BLOCK_N 128 0x7652 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7800 //TX_THR_PITCH_DET_0 131 0x7000 //TX_THR_PITCH_DET_1 132 0x6000 //TX_THR_PITCH_DET_2 133 0x0000 //TX_PITCH_BFR_LEN 134 0x0000 //TX_SBD_PITCH_DET 135 0x0000 //TX_TD_AEC_L 136 0x0000 //TX_MU0_UNP_TD_AEC 137 0x0000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x0028 //TX_TAIL_LENGTH 147 0x2000 //TX_AEC_REF_GAIN_0 148 0x2000 //TX_AEC_REF_GAIN_1 149 0x2000 //TX_AEC_REF_GAIN_2 150 0x4000 //TX_EAD_THR 151 0x0200 //TX_THR_RE_EST 152 0x0100 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0100 //TX_MIN_EQ_RE_EST_2 155 0x0100 //TX_MIN_EQ_RE_EST_3 156 0x0100 //TX_MIN_EQ_RE_EST_4 157 0x0100 //TX_MIN_EQ_RE_EST_5 158 0x0100 //TX_MIN_EQ_RE_EST_6 159 0x0100 //TX_MIN_EQ_RE_EST_7 160 0x0100 //TX_MIN_EQ_RE_EST_8 161 0x0100 //TX_MIN_EQ_RE_EST_9 162 0x0100 //TX_MIN_EQ_RE_EST_10 163 0x0100 //TX_MIN_EQ_RE_EST_11 164 0x0100 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE 167 0x0000 //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0008 //TX_SE_HOLD_N 170 0x0050 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x0000 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x0000 //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0000 //TX_FRQ_LIN_LEN 184 0x0000 //TX_FRQ_AEC_LEN_RHO 185 0x0000 //TX_MU0_UNP_FRQ_AEC 186 0x0000 //TX_MU0_PTD_FRQ_AEC 187 0x0000 //TX_MINENOISETH 188 0x0000 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x0000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7333 //TX_DTD_THR1_0 198 0x7333 //TX_DTD_THR1_1 199 0x7333 //TX_DTD_THR1_2 200 0x7333 //TX_DTD_THR1_3 201 0x7333 //TX_DTD_THR1_4 202 0x7333 //TX_DTD_THR1_5 203 0x7333 //TX_DTD_THR1_6 204 0x0CCD //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 208 0x0CCD //TX_DTD_THR2_4 209 0x0CCD //TX_DTD_THR2_5 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0400 //TX_DT_CUT_K 214 0x0000 //TX_DT_CUT_THR 215 0x0000 //TX_COMFORT_G 216 0x0000 //TX_POWER_YOUT_TH 217 0x0000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x0800 //TX_B_POST_FILT_ECHO_H 230 0x0000 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x0000 //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 238 0x0000 //TX_DTD_THR2_7 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 246 0xF800 //TX_THR_SN_EST_4 247 0xF800 //TX_THR_SN_EST_5 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0A00 //TX_N_SN_EST 267 0x0000 //TX_INBEAM_T 268 0x0000 //TX_INBEAMHOLDT 269 0x1FFF //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x1000 //TX_NE_RTO_TH_L 274 0x1000 //TX_MAINREFRTOH_TH_H 275 0x1000 //TX_MAINREFRTOH_TH_L 276 0x2000 //TX_MAINREFRTO_TH_H 277 0x1400 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 291 0x0014 //TX_MIN_GAIN_S_2 292 0x0014 //TX_MIN_GAIN_S_3 293 0x0014 //TX_MIN_GAIN_S_4 294 0x0014 //TX_MIN_GAIN_S_5 295 0x0014 //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x0000 //TX_NMOS_SUP 298 0x0064 //TX_NS_MAX_PRI_SNR_TH 299 0x7FFF //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x7FFF //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x2000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7E00 //TX_LAMBDA_PFILT_S_0 340 0x7E00 //TX_LAMBDA_PFILT_S_1 341 0x7E00 //TX_LAMBDA_PFILT_S_2 342 0x7E00 //TX_LAMBDA_PFILT_S_3 343 0x7E00 //TX_LAMBDA_PFILT_S_4 344 0x7E00 //TX_LAMBDA_PFILT_S_5 345 0x7E00 //TX_LAMBDA_PFILT_S_6 346 0x7E00 //TX_LAMBDA_PFILT_S_7 347 0x0010 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x0000 //TX_K_PEPPER_HF 350 0x0000 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x4000 //TX_HMNC_BST_THR 353 0x0000 //TX_DT_BINVAD_TH_0 354 0x0000 //TX_DT_BINVAD_TH_1 355 0x0000 //TX_DT_BINVAD_TH_2 356 0x0000 //TX_DT_BINVAD_TH_3 357 0x0000 //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0001 //TX_BF_SGRAD_FLG 362 0x0000 //TX_BF_DVG_TH 363 0x0000 //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT 367 0x0383 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 371 0x0032 //TX_NOISE_TH_2 372 0x3D54 //TX_NOISE_TH_3 373 0x012C //TX_NOISE_TH_4 374 0x07D0 //TX_NOISE_TH_5 375 0x6590 //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x044C //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY 387 0x6400 //TX_OUT_ENER_TH_NOISE 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH 406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR 410 0x0080 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x2000 //TX_RHO_UPB 415 0x0020 //TX_N_HOLD_HS 416 0x0009 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0000 //TX_EXTRA_GAIN_MICBLOCK 419 0x0333 //TX_THR_STD_NSR 420 0x0219 //TX_THR_STD_PLH 421 0x09C4 //TX_N_HOLD_STD 422 0x0166 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0800 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x0000 //TX_SB_RTO_MEAN_TH_RUB 428 0x2000 //TX_WTA_EN_RTO_TH 429 0x1400 //TX_TOP_ENER_TH_F 430 0x0064 //TX_DESIRED_TALK_HOLDT 431 0x1000 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0000 //TX_HS_VAD_BIN 435 0x0000 //TX_THR_VAD_HS 436 0x0000 //TX_MEAN_RTO_MIN_TH2 437 0x0000 //TX_SILENCE_T 438 0x4000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x099A //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x001E //TX_DOA_VAD_THR_1 445 0x001E //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x00B4 //TX_SRC_DOA_RNG_HIGH_0B 453 0x005A //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x00B4 //TX_SRC_DOA_RNG_HIGH_0C 456 0x005A //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x00B4 //TX_SRC_DOA_RNG_HIGH_0D 459 0x005A //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0172 //TX_BF_HOLDOFF_T 473 0x8000 //TX_DOA_COST_FACTOR 474 0x0D9A //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x071C //TX_DOA_TRACK_HT 477 0x0280 //TX_N1_HOLD_HF 478 0x0140 //TX_N2_HOLD_HF 479 0x2AAB //TX_BF_RESET_THR_HF 480 0x4000 //TX_DOA_SMOOTH 481 0x0000 //TX_MU_BF 482 0x0200 //TX_BF_MU_LF_B2 483 0x0000 //TX_BF_FC_END_BIN_B2 484 0x0000 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0000 //TX_N_DOA_SEED 488 0x0000 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x0000 //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x0000 //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x0000 //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0168 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0004 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0230 //TX_NOR_OFF_TH1 503 0xD333 //TX_WIDE_MASK_TH 504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x0000 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0028 //TX_SNR_THR 531 0x03E8 //TX_ENGY_THR 532 0x0000 //TX_CORR_HIGH_TH 533 0x0000 //TX_ENGY_THR_2 534 0x0000 //TX_MEAN_RTO_THR 535 0x0000 //TX_WNS_ENOISE_MIC0_TH 536 0x0000 //TX_RATIOMICL_TH 537 0x0000 //TX_CALIG_HS 538 0x000A //TX_LVL_CTRL 539 0x0000 //TX_WIND_SUPRTO 540 0x0000 //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x0000 //TX_RATIOMICH_TH 543 0x0000 //TX_WIND_INBEAM_L_TH 544 0x0000 //TX_WIND_INBEAM_H_TH 545 0x0000 //TX_WNS_RESRV_0 546 0x0000 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0000 //TX_BVE_NOISE_FLOOR_1 554 0x0000 //TX_BVE_NOISE_FLOOR_2 555 0x0000 //TX_BVE_NOISE_FLOOR_3 556 0x0000 //TX_BVE_NOISE_FLOOR_4 557 0x0000 //TX_BVE_NOISE_FLOOR_5 558 0x0000 //TX_BVE_NOISE_FLOOR_6 559 0x0000 //TX_BVE_NOISE_FLOOR_7 560 0x0000 //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0000 //TX_FDEQ_BIN_0 592 0x0000 //TX_FDEQ_BIN_1 593 0x0000 //TX_FDEQ_BIN_2 594 0x0000 //TX_FDEQ_BIN_3 595 0x0000 //TX_FDEQ_BIN_4 596 0x0000 //TX_FDEQ_BIN_5 597 0x0000 //TX_FDEQ_BIN_6 598 0x0000 //TX_FDEQ_BIN_7 599 0x0000 //TX_FDEQ_BIN_8 600 0x0000 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0000 //TX_PREEQ_BIN_MIC0_0 642 0x0000 //TX_PREEQ_BIN_MIC0_1 643 0x0000 //TX_PREEQ_BIN_MIC0_2 644 0x0000 //TX_PREEQ_BIN_MIC0_3 645 0x0000 //TX_PREEQ_BIN_MIC0_4 646 0x0000 //TX_PREEQ_BIN_MIC0_5 647 0x0000 //TX_PREEQ_BIN_MIC0_6 648 0x0000 //TX_PREEQ_BIN_MIC0_7 649 0x0000 //TX_PREEQ_BIN_MIC0_8 650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0000 //TX_PREEQ_BIN_MIC1_0 691 0x0000 //TX_PREEQ_BIN_MIC1_1 692 0x0000 //TX_PREEQ_BIN_MIC1_2 693 0x0000 //TX_PREEQ_BIN_MIC1_3 694 0x0000 //TX_PREEQ_BIN_MIC1_4 695 0x0000 //TX_PREEQ_BIN_MIC1_5 696 0x0000 //TX_PREEQ_BIN_MIC1_6 697 0x0000 //TX_PREEQ_BIN_MIC1_7 698 0x0000 //TX_PREEQ_BIN_MIC1_8 699 0x0000 //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 743 0x0000 //TX_PREEQ_BIN_MIC2_4 744 0x0000 //TX_PREEQ_BIN_MIC2_5 745 0x0000 //TX_PREEQ_BIN_MIC2_6 746 0x0000 //TX_PREEQ_BIN_MIC2_7 747 0x0000 //TX_PREEQ_BIN_MIC2_8 748 0x0000 //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0064 //TX_MIC_CALIBRATION_0 766 0x006A //TX_MIC_CALIBRATION_1 767 0x006A //TX_MIC_CALIBRATION_2 768 0x006B //TX_MIC_CALIBRATION_3 769 0x0048 //TX_MIC_PWR_BIAS_0 770 0x003C //TX_MIC_PWR_BIAS_1 771 0x003C //TX_MIC_PWR_BIAS_2 772 0x003C //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0009 //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F3D //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7FB0 //TX_TDDRC_ALPHA_DWN_01 788 0x7FB0 //TX_TDDRC_ALPHA_DWN_02 789 0x7FB0 //TX_TDDRC_ALPHA_DWN_03 790 0x7FB0 //TX_TDDRC_ALPHA_DWN_04 791 0x65AD //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0002 //TX_DEADMIC_SILENCE_TH 817 0x0147 //TX_MIC_DEGRADE_TH 818 0x0078 //TX_DEADMIC_CNT 819 0x0078 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x0000 //TX_KS_NOISEPASTE_FACTOR 824 0x0000 //TX_KS_CONFIG 825 0x0000 //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x0000 //TX_FFP_FP_K_METAL 834 0x0000 //TX_A_POST_FLT_FP 835 0x0000 //TX_RTO_OUTBEAM_TH 836 0x0000 //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0000 //TX_FFP_RESRV_2 849 0x0000 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x0E80 //TX_TDDRC_THRD_2 857 0x3800 //TX_TDDRC_THRD_3 858 0x2A00 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7FB0 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x0000 //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0000 //TX_TDDRC_SMT_W 866 0x0100 //TX_TDDRC_DRC_GAIN 867 0x0000 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x1EB8 //TX_TFMASKLTH 870 0x170A //TX_TFMASKLTHL 871 0x7FFF //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x4000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x0000 //TX_FASTNS_OUTIN_TH 884 0x0000 //TX_FASTNS_TFMASK_TH 885 0x0000 //TX_FASTNS_TFMASKBIN_TH1 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0x8000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x050D //RX_PGA 11 0x7652 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0000 //RX_PITCH_BFR_LEN 17 0x0000 //RX_SBD_PITCH_DET 18 0x0000 //RX_PP_RESRV_0 19 0x0000 //RX_PP_RESRV_1 20 0xF800 //RX_N_SN_EST 21 0x0000 //RX_N2_SN_EST 22 0x000F //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7E00 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0000 //RX_FENS_RESRV_1 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 30 0x0000 //RX_EXTRA_NS_L 31 0x0000 //RX_EXTRA_NS_A 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x0000 //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0003 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0010 //RX_MAXLEVEL_CNG 132 0x0000 //RX_BWE_UV_TH 133 0x0000 //RX_BWE_UV_TH2 134 0x0000 //RX_BWE_UV_TH3 135 0x0000 //RX_BWE_V_TH 136 0x0000 //RX_BWE_GAIN1_V_TH1 137 0x0000 //RX_BWE_GAIN1_V_TH2 138 0x0000 //RX_BWE_UV_EQ 139 0x0000 //RX_BWE_V_EQ 140 0x0000 //RX_BWE_TONE_TH 141 0x0000 //RX_BWE_UV_HOLD_T 142 0x0000 //RX_BWE_GAIN2_ALPHA 143 0x0000 //RX_BWE_GAIN3_ALPHA 144 0x0000 //RX_BWE_CUTOFF 145 0x0000 //RX_BWE_GAINFILL 146 0x0000 //RX_BWE_MAXTH_TONE 147 0x0000 //RX_BWE_EQ_0 148 0x0000 //RX_BWE_EQ_1 149 0x0000 //RX_BWE_EQ_2 150 0x0000 //RX_BWE_EQ_3 151 0x0000 //RX_BWE_EQ_4 152 0x0000 //RX_BWE_EQ_5 153 0x0000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 28 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 29 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 32 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 33 0xDA9E //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x0E80 //RX_TDDRC_THRD_2 115 0x3800 //RX_TDDRC_THRD_3 116 0x2A00 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x0000 //RX_TDDRC_HMNC_GAIN 122 0x0000 //RX_TDDRC_SMT_FLAG 123 0x0000 //RX_TDDRC_SMT_W 124 0x0100 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0000 //RX_FDEQ_BIN_0 64 0x0000 //RX_FDEQ_BIN_1 65 0x0000 //RX_FDEQ_BIN_2 66 0x0000 //RX_FDEQ_BIN_3 67 0x0000 //RX_FDEQ_BIN_4 68 0x0000 //RX_FDEQ_BIN_5 69 0x0000 //RX_FDEQ_BIN_6 70 0x0000 //RX_FDEQ_BIN_7 71 0x0000 //RX_FDEQ_BIN_8 72 0x0000 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x0000 //RX_FDEQ_RESRV_0 88 0x0000 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0004 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x2000 //RX_FDDRC_SLANT_1_0 107 0x2000 //RX_FDDRC_SLANT_1_1 108 0x2000 //RX_FDDRC_SLANT_1_2 109 0x2000 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x0040 //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x050D //RX_PGA 168 0x7652 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0000 //RX_PITCH_BFR_LEN 174 0x0000 //RX_SBD_PITCH_DET 175 0x0000 //RX_PP_RESRV_0 176 0x0000 //RX_PP_RESRV_1 177 0xF800 //RX_N_SN_EST 178 0x0000 //RX_N2_SN_EST 179 0x000F //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7E00 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0000 //RX_FENS_RESRV_1 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 187 0x0000 //RX_EXTRA_NS_L 188 0x0000 //RX_EXTRA_NS_A 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x0000 //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0003 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x0080 //RX_MIN_G_FP 285 0x2000 //RX_MAX_G_FP 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0010 //RX_MAXLEVEL_CNG 289 0x0000 //RX_BWE_UV_TH 290 0x0000 //RX_BWE_UV_TH2 291 0x0000 //RX_BWE_UV_TH3 292 0x0000 //RX_BWE_V_TH 293 0x0000 //RX_BWE_GAIN1_V_TH1 294 0x0000 //RX_BWE_GAIN1_V_TH2 295 0x0000 //RX_BWE_UV_EQ 296 0x0000 //RX_BWE_V_EQ 297 0x0000 //RX_BWE_TONE_TH 298 0x0000 //RX_BWE_UV_HOLD_T 299 0x0000 //RX_BWE_GAIN2_ALPHA 300 0x0000 //RX_BWE_GAIN3_ALPHA 301 0x0000 //RX_BWE_CUTOFF 302 0x0000 //RX_BWE_GAINFILL 303 0x0000 //RX_BWE_MAXTH_TONE 304 0x0000 //RX_BWE_EQ_0 305 0x0000 //RX_BWE_EQ_1 306 0x0000 //RX_BWE_EQ_2 307 0x0000 //RX_BWE_EQ_3 308 0x0000 //RX_BWE_EQ_4 309 0x0000 //RX_BWE_EQ_5 310 0x0000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 190 0xDA9E //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x0E80 //RX_TDDRC_THRD_2 272 0x3800 //RX_TDDRC_THRD_3 273 0x2A00 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x0000 //RX_TDDRC_HMNC_GAIN 279 0x0000 //RX_TDDRC_SMT_FLAG 280 0x0000 //RX_TDDRC_SMT_W 281 0x0100 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0000 //RX_FDEQ_BIN_0 221 0x0000 //RX_FDEQ_BIN_1 222 0x0000 //RX_FDEQ_BIN_2 223 0x0000 //RX_FDEQ_BIN_3 224 0x0000 //RX_FDEQ_BIN_4 225 0x0000 //RX_FDEQ_BIN_5 226 0x0000 //RX_FDEQ_BIN_6 227 0x0000 //RX_FDEQ_BIN_7 228 0x0000 //RX_FDEQ_BIN_8 229 0x0000 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x0000 //RX_FDEQ_RESRV_0 245 0x0000 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0004 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x2000 //RX_FDDRC_SLANT_1_0 264 0x2000 //RX_FDDRC_SLANT_1_1 265 0x2000 //RX_FDDRC_SLANT_1_2 266 0x2000 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-NB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x2B68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7646 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x7CCC //TX_THR_PITCH_DET_0 131 0x7000 //TX_THR_PITCH_DET_1 132 0x6333 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0010 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7000 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x1000 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x0064 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x5000 //TX_DTD_THR1_0 198 0x7000 //TX_DTD_THR1_1 199 0x7F00 //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x2000 //TX_DTD_THR2_0 205 0x2000 //TX_DTD_THR2_1 206 0x2000 //TX_DTD_THR2_2 207 0x2000 //TX_DTD_THR2_3 208 0x2000 //TX_DTD_THR2_4 209 0x2000 //TX_DTD_THR2_5 210 0x2000 //TX_DTD_THR2_6 211 0x4100 //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x03E8 //TX_DT_CUT_K 214 0x1000 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0010 //TX_EPD_OFFSET_00 233 0x0010 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xFA00 //TX_THR_SN_EST_5 248 0xFA00 //TX_THR_SN_EST_6 249 0xFA00 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0000 //TX_DELTA_THR_SN_EST_1 252 0x0000 //TX_DELTA_THR_SN_EST_2 253 0x0000 //TX_DELTA_THR_SN_EST_3 254 0x0000 //TX_DELTA_THR_SN_EST_4 255 0x0000 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0000 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x0400 //TX_B_POST_FLT_0 280 0x0400 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0010 //TX_NS_LVL_CTRL_1 283 0x0010 //TX_NS_LVL_CTRL_2 284 0x0010 //TX_NS_LVL_CTRL_3 285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 287 0x0010 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000D //TX_MIN_GAIN_S_0 290 0x000D //TX_MIN_GAIN_S_1 291 0x000D //TX_MIN_GAIN_S_2 292 0x000D //TX_MIN_GAIN_S_3 293 0x000D //TX_MIN_GAIN_S_4 294 0x000D //TX_MIN_GAIN_S_5 295 0x000D //TX_MIN_GAIN_S_6 296 0x000D //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x7FFF //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0014 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x1000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 341 0x7C29 //TX_LAMBDA_PFILT_S_2 342 0x7C29 //TX_LAMBDA_PFILT_S_3 343 0x7C29 //TX_LAMBDA_PFILT_S_4 344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x0FA0 //TX_K_PEPPER_HF 350 0x0400 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x4000 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 371 0x1F40 //TX_NOISE_TH_2 372 0x4650 //TX_NOISE_TH_3 373 0x7148 //TX_NOISE_TH_4 374 0x044C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 379 0x00C8 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY 387 0x0029 //TX_OUT_ENER_TH_NOISE 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x7FFF //TX_NOISEDET_BOOST_TH 412 0x0000 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0280 //TX_N_HOLD_HS 416 0x006E //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0333 //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2400 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0640 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x2000 //TX_WTA_EN_RTO_TH 429 0x1400 //TX_TOP_ENER_TH_F 430 0x0064 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x003C //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x0D9A //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x2A3D //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x0000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM 567 0x6048 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4844 //TX_FDEQ_GAIN_6 574 0x4444 //TX_FDEQ_GAIN_7 575 0x4040 //TX_FDEQ_GAIN_8 576 0x3C3C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0401 //TX_FDEQ_BIN_0 592 0x0103 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 604 0x0000 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0010 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0608 //TX_PREEQ_BIN_MIC0_0 642 0x0808 //TX_PREEQ_BIN_MIC0_1 643 0x0808 //TX_PREEQ_BIN_MIC0_2 644 0x0808 //TX_PREEQ_BIN_MIC0_3 645 0x0808 //TX_PREEQ_BIN_MIC0_4 646 0x0808 //TX_PREEQ_BIN_MIC0_5 647 0x0808 //TX_PREEQ_BIN_MIC0_6 648 0x0802 //TX_PREEQ_BIN_MIC0_7 649 0x0000 //TX_PREEQ_BIN_MIC0_8 650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0010 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0608 //TX_PREEQ_BIN_MIC1_0 691 0x0808 //TX_PREEQ_BIN_MIC1_1 692 0x0808 //TX_PREEQ_BIN_MIC1_2 693 0x0808 //TX_PREEQ_BIN_MIC1_3 694 0x0808 //TX_PREEQ_BIN_MIC1_4 695 0x0808 //TX_PREEQ_BIN_MIC1_5 696 0x0808 //TX_PREEQ_BIN_MIC1_6 697 0x0802 //TX_PREEQ_BIN_MIC1_7 698 0x0000 //TX_PREEQ_BIN_MIC1_8 699 0x0000 //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0010 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0608 //TX_PREEQ_BIN_MIC2_0 740 0x0808 //TX_PREEQ_BIN_MIC2_1 741 0x0808 //TX_PREEQ_BIN_MIC2_2 742 0x0808 //TX_PREEQ_BIN_MIC2_3 743 0x0808 //TX_PREEQ_BIN_MIC2_4 744 0x0808 //TX_PREEQ_BIN_MIC2_5 745 0x0808 //TX_PREEQ_BIN_MIC2_6 746 0x0802 //TX_PREEQ_BIN_MIC2_7 747 0x0000 //TX_PREEQ_BIN_MIC2_8 748 0x0000 //TX_PREEQ_BIN_MIC2_9 749 0x0000 //TX_PREEQ_BIN_MIC2_10 750 0x0000 //TX_PREEQ_BIN_MIC2_11 751 0x0000 //TX_PREEQ_BIN_MIC2_12 752 0x0000 //TX_PREEQ_BIN_MIC2_13 753 0x0000 //TX_PREEQ_BIN_MIC2_14 754 0x0000 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0065 //TX_MIC_CALIBRATION_0 766 0x0065 //TX_MIC_CALIBRATION_1 767 0x0065 //TX_MIC_CALIBRATION_2 768 0x0065 //TX_MIC_CALIBRATION_3 769 0x0044 //TX_MIC_PWR_BIAS_0 770 0x0044 //TX_MIC_PWR_BIAS_1 771 0x0044 //TX_MIC_PWR_BIAS_2 772 0x0044 //TX_MIC_PWR_BIAS_3 773 0x000B //TX_GAIN_LIMIT_0 774 0x000B //TX_GAIN_LIMIT_1 775 0x000B //TX_GAIN_LIMIT_2 776 0x000B //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x1000 //TX_TDDRC_ALPHA_UP_01 784 0x1000 //TX_TDDRC_ALPHA_UP_02 785 0x1000 //TX_TDDRC_ALPHA_UP_03 786 0x1000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0001 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x1000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0xF800 //TX_TFMASKLTH_DOA 875 0x0CCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0xA02C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x3800 //RX_THR_PITCH_DET_0 14 0x3000 //RX_THR_PITCH_DET_1 15 0x2800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0200 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D08 //RX_FDEQ_BIN_9 73 0x0000 //RX_FDEQ_BIN_10 74 0x0000 //RX_FDEQ_BIN_11 75 0x0000 //RX_FDEQ_BIN_12 76 0x0000 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0xA02C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0000 //RX_SAMPLINGFREQ_SIG 160 0x0000 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x3800 //RX_THR_PITCH_DET_0 171 0x3000 //RX_THR_PITCH_DET_1 172 0x2800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0200 //RX_TDDRC_DRC_GAIN 195 0x0014 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D08 //RX_FDEQ_BIN_9 230 0x0000 //RX_FDEQ_BIN_10 231 0x0000 //RX_FDEQ_BIN_11 232 0x0000 //RX_FDEQ_BIN_12 233 0x0000 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-WB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x2B68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7D83 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x6800 //TX_THR_PITCH_DET_0 131 0x6000 //TX_THR_PITCH_DET_1 132 0x5800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0080 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7000 //TX_EAD_THR 151 0x0800 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x6000 //TX_C_POST_FLT 168 0x7000 //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7800 //TX_DTD_THR1_0 198 0x7000 //TX_DTD_THR1_1 199 0x7FFF //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x7FFF //TX_DTD_THR2_0 205 0x7FFF //TX_DTD_THR2_1 206 0x7FFF //TX_DTD_THR2_2 207 0x7FFF //TX_DTD_THR2_3 208 0x7FFF //TX_DTD_THR2_4 209 0x7FFF //TX_DTD_THR2_5 210 0x7FFF //TX_DTD_THR2_6 211 0x1000 //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0BB8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x0019 //TX_EPD_OFFSET_00 233 0x0019 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 246 0xF400 //TX_THR_SN_EST_4 247 0xF400 //TX_THR_SN_EST_5 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 282 0x0011 //TX_NS_LVL_CTRL_1 283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000F //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x7FFF //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x000E //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x1000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7B00 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 345 0x7B00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0800 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x00C8 //TX_NOISE_TH_2 372 0x3A98 //TX_NOISE_TH_3 373 0x0FA0 //TX_NOISE_TH_4 374 0x157C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x00F8 //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR 410 0x0000 //TX_NS_FP_K_METAL 411 0x7FFF //TX_NOISEDET_BOOST_TH 412 0x0000 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x0230 //TX_NOR_OFF_THR 498 0x0CCD //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x001C //TX_FDEQ_SUBNUM 567 0x5850 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0302 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D07 //TX_FDEQ_BIN_9 601 0x0E0F //TX_FDEQ_BIN_10 602 0x0F10 //TX_FDEQ_BIN_11 603 0x1011 //TX_FDEQ_BIN_12 604 0x1119 //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0608 //TX_PREEQ_BIN_MIC0_0 642 0x0808 //TX_PREEQ_BIN_MIC0_1 643 0x0808 //TX_PREEQ_BIN_MIC0_2 644 0x0808 //TX_PREEQ_BIN_MIC0_3 645 0x0808 //TX_PREEQ_BIN_MIC0_4 646 0x0808 //TX_PREEQ_BIN_MIC0_5 647 0x0808 //TX_PREEQ_BIN_MIC0_6 648 0x0808 //TX_PREEQ_BIN_MIC0_7 649 0x0808 //TX_PREEQ_BIN_MIC0_8 650 0x0808 //TX_PREEQ_BIN_MIC0_9 651 0x0808 //TX_PREEQ_BIN_MIC0_10 652 0x0808 //TX_PREEQ_BIN_MIC0_11 653 0x0808 //TX_PREEQ_BIN_MIC0_12 654 0x0808 //TX_PREEQ_BIN_MIC0_13 655 0x0808 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0608 //TX_PREEQ_BIN_MIC1_0 691 0x0808 //TX_PREEQ_BIN_MIC1_1 692 0x0808 //TX_PREEQ_BIN_MIC1_2 693 0x0808 //TX_PREEQ_BIN_MIC1_3 694 0x0808 //TX_PREEQ_BIN_MIC1_4 695 0x0808 //TX_PREEQ_BIN_MIC1_5 696 0x0808 //TX_PREEQ_BIN_MIC1_6 697 0x0808 //TX_PREEQ_BIN_MIC1_7 698 0x0808 //TX_PREEQ_BIN_MIC1_8 699 0x0808 //TX_PREEQ_BIN_MIC1_9 700 0x0808 //TX_PREEQ_BIN_MIC1_10 701 0x0808 //TX_PREEQ_BIN_MIC1_11 702 0x0808 //TX_PREEQ_BIN_MIC1_12 703 0x0808 //TX_PREEQ_BIN_MIC1_13 704 0x0808 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0608 //TX_PREEQ_BIN_MIC2_0 740 0x0808 //TX_PREEQ_BIN_MIC2_1 741 0x0808 //TX_PREEQ_BIN_MIC2_2 742 0x0808 //TX_PREEQ_BIN_MIC2_3 743 0x0808 //TX_PREEQ_BIN_MIC2_4 744 0x0808 //TX_PREEQ_BIN_MIC2_5 745 0x0808 //TX_PREEQ_BIN_MIC2_6 746 0x0808 //TX_PREEQ_BIN_MIC2_7 747 0x0808 //TX_PREEQ_BIN_MIC2_8 748 0x0808 //TX_PREEQ_BIN_MIC2_9 749 0x0808 //TX_PREEQ_BIN_MIC2_10 750 0x0808 //TX_PREEQ_BIN_MIC2_11 751 0x0808 //TX_PREEQ_BIN_MIC2_12 752 0x0808 //TX_PREEQ_BIN_MIC2_13 753 0x0808 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0062 //TX_MIC_CALIBRATION_0 766 0x0062 //TX_MIC_CALIBRATION_1 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x000C //TX_GAIN_LIMIT_0 774 0x000C //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000C //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x1000 //TX_TDDRC_ALPHA_UP_01 784 0x1000 //TX_TDDRC_ALPHA_UP_02 785 0x1000 //TX_TDDRC_ALPHA_UP_03 786 0x1000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x0000 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0001 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x1000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0xA02C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x3800 //RX_THR_PITCH_DET_0 14 0x3000 //RX_THR_PITCH_DET_1 15 0x2800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0600 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0006 //RX_NS_LVL_CTRL 23 0xF800 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x3000 //RX_TDDRC_ALPHA_UP_1 7 0x3000 //RX_TDDRC_ALPHA_UP_2 8 0x3000 //RX_TDDRC_ALPHA_UP_3 9 0x3000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x2000 //RX_TDDRC_THRD_2 115 0x3000 //RX_TDDRC_THRD_3 116 0x0800 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0196 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 74 0x0F10 //RX_FDEQ_BIN_11 75 0x1011 //RX_FDEQ_BIN_12 76 0x1104 //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0xA02C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0001 //RX_SAMPLINGFREQ_SIG 160 0x0001 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x4000 //RX_B_PE 170 0x3800 //RX_THR_PITCH_DET_0 171 0x3000 //RX_THR_PITCH_DET_1 172 0x2800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0600 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0006 //RX_NS_LVL_CTRL 180 0xF800 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x3000 //RX_TDDRC_ALPHA_UP_1 164 0x3000 //RX_TDDRC_ALPHA_UP_2 165 0x3000 //RX_TDDRC_ALPHA_UP_3 166 0x3000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x2000 //RX_TDDRC_THRD_2 272 0x3000 //RX_TDDRC_THRD_3 273 0x0800 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x3000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0196 //RX_TDDRC_DRC_GAIN 195 0x001C //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x0E0F //RX_FDEQ_BIN_10 231 0x0F10 //RX_FDEQ_BIN_11 232 0x1011 //RX_FDEQ_BIN_12 233 0x1104 //RX_FDEQ_BIN_13 234 0x0000 //RX_FDEQ_BIN_14 235 0x0000 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x2B68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7EFF //TX_A_HP 129 0x4000 //TX_B_PE 130 0x1800 //TX_THR_PITCH_DET_0 131 0x1000 //TX_THR_PITCH_DET_1 132 0x0800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0080 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7000 //TX_EAD_THR 151 0x0800 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x6000 //TX_C_POST_FLT 168 0x7000 //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7800 //TX_DTD_THR1_0 198 0x7000 //TX_DTD_THR1_1 199 0x7FFF //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x7FFF //TX_DTD_THR2_0 205 0x7FFF //TX_DTD_THR2_1 206 0x7FFF //TX_DTD_THR2_2 207 0x7FFF //TX_DTD_THR2_3 208 0x7FFF //TX_DTD_THR2_4 209 0x7FFF //TX_DTD_THR2_5 210 0x7FFF //TX_DTD_THR2_6 211 0x1000 //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0BB8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x00F0 //TX_EPD_OFFSET_00 233 0x00F0 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 246 0xF400 //TX_THR_SN_EST_4 247 0xF400 //TX_THR_SN_EST_5 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 282 0x0011 //TX_NS_LVL_CTRL_1 283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000F //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x7FFF //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x000E //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x1000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7900 //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7B00 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 345 0x7B00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0000 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0800 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x00C8 //TX_NOISE_TH_2 372 0x3A98 //TX_NOISE_TH_3 373 0x0FA0 //TX_NOISE_TH_4 374 0x157C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x044C //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x1013 //TX_FDEQ_BIN_10 602 0x1719 //TX_FDEQ_BIN_11 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 606 0x282C //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4868 //TX_PREEQ_GAIN_MIC0_8 626 0x6860 //TX_PREEQ_GAIN_MIC0_9 627 0x6048 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0E10 //TX_PREEQ_BIN_MIC0_0 642 0x1010 //TX_PREEQ_BIN_MIC0_1 643 0x1010 //TX_PREEQ_BIN_MIC0_2 644 0x1010 //TX_PREEQ_BIN_MIC0_3 645 0x1010 //TX_PREEQ_BIN_MIC0_4 646 0x1010 //TX_PREEQ_BIN_MIC0_5 647 0x1010 //TX_PREEQ_BIN_MIC0_6 648 0x1010 //TX_PREEQ_BIN_MIC0_7 649 0x1010 //TX_PREEQ_BIN_MIC0_8 650 0x1010 //TX_PREEQ_BIN_MIC0_9 651 0x1010 //TX_PREEQ_BIN_MIC0_10 652 0x1010 //TX_PREEQ_BIN_MIC0_11 653 0x1010 //TX_PREEQ_BIN_MIC0_12 654 0x1010 //TX_PREEQ_BIN_MIC0_13 655 0x1010 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0E10 //TX_PREEQ_BIN_MIC1_0 691 0x1010 //TX_PREEQ_BIN_MIC1_1 692 0x1010 //TX_PREEQ_BIN_MIC1_2 693 0x1010 //TX_PREEQ_BIN_MIC1_3 694 0x1010 //TX_PREEQ_BIN_MIC1_4 695 0x1010 //TX_PREEQ_BIN_MIC1_5 696 0x1010 //TX_PREEQ_BIN_MIC1_6 697 0x1010 //TX_PREEQ_BIN_MIC1_7 698 0x1010 //TX_PREEQ_BIN_MIC1_8 699 0x1010 //TX_PREEQ_BIN_MIC1_9 700 0x1010 //TX_PREEQ_BIN_MIC1_10 701 0x1010 //TX_PREEQ_BIN_MIC1_11 702 0x1010 //TX_PREEQ_BIN_MIC1_12 703 0x1010 //TX_PREEQ_BIN_MIC1_13 704 0x1010 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0E10 //TX_PREEQ_BIN_MIC2_0 740 0x1010 //TX_PREEQ_BIN_MIC2_1 741 0x1010 //TX_PREEQ_BIN_MIC2_2 742 0x1010 //TX_PREEQ_BIN_MIC2_3 743 0x1010 //TX_PREEQ_BIN_MIC2_4 744 0x1010 //TX_PREEQ_BIN_MIC2_5 745 0x1010 //TX_PREEQ_BIN_MIC2_6 746 0x1010 //TX_PREEQ_BIN_MIC2_7 747 0x1010 //TX_PREEQ_BIN_MIC2_8 748 0x1010 //TX_PREEQ_BIN_MIC2_9 749 0x1010 //TX_PREEQ_BIN_MIC2_10 750 0x1010 //TX_PREEQ_BIN_MIC2_11 751 0x1010 //TX_PREEQ_BIN_MIC2_12 752 0x1010 //TX_PREEQ_BIN_MIC2_13 753 0x1010 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0062 //TX_MIC_CALIBRATION_0 766 0x0062 //TX_MIC_CALIBRATION_1 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x000C //TX_GAIN_LIMIT_0 774 0x000C //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000C //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0000 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x78D6 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x1800 //RX_THR_PITCH_DET_0 14 0x1000 //RX_THR_PITCH_DET_1 15 0x0800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0003 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x002C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x1800 //RX_THR_PITCH_DET_0 171 0x1000 //RX_THR_PITCH_DET_1 172 0x0800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0003 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-FB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 2 0x0020 //TX_PATCH_REG 3 0x6B6A //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B4C //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7E56 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x6800 //TX_THR_PITCH_DET_0 131 0x6000 //TX_THR_PITCH_DET_1 132 0x5800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0200 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x61A8 //TX_EAD_THR 151 0x0400 //TX_THR_RE_EST 152 0x3000 //TX_MIN_EQ_RE_EST_0 153 0x3000 //TX_MIN_EQ_RE_EST_1 154 0x4000 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x6000 //TX_MIN_EQ_RE_EST_6 159 0x6000 //TX_MIN_EQ_RE_EST_7 160 0x6000 //TX_MIN_EQ_RE_EST_8 161 0x6000 //TX_MIN_EQ_RE_EST_9 162 0x4000 //TX_MIN_EQ_RE_EST_10 163 0x4000 //TX_MIN_EQ_RE_EST_11 164 0x4000 //TX_MIN_EQ_RE_EST_12 165 0x3000 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x3000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x0800 //TX_DTD_THR1_0 198 0x0800 //TX_DTD_THR1_1 199 0x0800 //TX_DTD_THR1_2 200 0x0800 //TX_DTD_THR1_3 201 0x0800 //TX_DTD_THR1_4 202 0x0800 //TX_DTD_THR1_5 203 0x0800 //TX_DTD_THR1_6 204 0x0800 //TX_DTD_THR2_0 205 0x0800 //TX_DTD_THR2_1 206 0x0800 //TX_DTD_THR2_2 207 0x0800 //TX_DTD_THR2_3 208 0x0800 //TX_DTD_THR2_4 209 0x0100 //TX_DTD_THR2_5 210 0x0100 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x03E8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x00C0 //TX_EPD_OFFSET_00 233 0x00C0 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xF700 //TX_THR_SN_EST_0 243 0xFB00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xF700 //TX_THR_SN_EST_3 246 0xFA00 //TX_THR_SN_EST_4 247 0xF600 //TX_THR_SN_EST_5 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 251 0x0400 //TX_DELTA_THR_SN_EST_1 252 0x0300 //TX_DELTA_THR_SN_EST_2 253 0x0600 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 284 0x0019 //TX_NS_LVL_CTRL_3 285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 303 0x6000 //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x6000 //TX_A_POST_FILT_S_0 315 0x6000 //TX_A_POST_FILT_S_1 316 0x6000 //TX_A_POST_FILT_S_2 317 0x6000 //TX_A_POST_FILT_S_3 318 0x6000 //TX_A_POST_FILT_S_4 319 0x6000 //TX_A_POST_FILT_S_5 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 328 0x2000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7CCD //TX_LAMBDA_PFILT_S_0 340 0x7CCD //TX_LAMBDA_PFILT_S_1 341 0x7CCD //TX_LAMBDA_PFILT_S_2 342 0x7CCD //TX_LAMBDA_PFILT_S_3 343 0x7CCD //TX_LAMBDA_PFILT_S_4 344 0x7CCD //TX_LAMBDA_PFILT_S_5 345 0x7CCD //TX_LAMBDA_PFILT_S_6 346 0x7CCD //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0500 //TX_A_PEPPER 349 0x1600 //TX_K_PEPPER_HF 350 0x0400 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 371 0x04B0 //TX_NOISE_TH_2 372 0x3194 //TX_NOISE_TH_3 373 0x0960 //TX_NOISE_TH_4 374 0x5555 //TX_NOISE_TH_5 375 0x3FF4 //TX_NOISE_TH_5_2 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x02BC //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0304 //TX_FDEQ_BIN_2 594 0x0405 //TX_FDEQ_BIN_3 595 0x0607 //TX_FDEQ_BIN_4 596 0x0809 //TX_FDEQ_BIN_5 597 0x0A0B //TX_FDEQ_BIN_6 598 0x0C0D //TX_FDEQ_BIN_7 599 0x0E0F //TX_FDEQ_BIN_8 600 0x1011 //TX_FDEQ_BIN_9 601 0x1214 //TX_FDEQ_BIN_10 602 0x1618 //TX_FDEQ_BIN_11 603 0x1C1C //TX_FDEQ_BIN_12 604 0x2020 //TX_FDEQ_BIN_13 605 0x2020 //TX_FDEQ_BIN_14 606 0x2011 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4848 //TX_PREEQ_GAIN_MIC0_8 626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0E10 //TX_PREEQ_BIN_MIC0_0 642 0x1010 //TX_PREEQ_BIN_MIC0_1 643 0x1010 //TX_PREEQ_BIN_MIC0_2 644 0x1010 //TX_PREEQ_BIN_MIC0_3 645 0x1010 //TX_PREEQ_BIN_MIC0_4 646 0x1010 //TX_PREEQ_BIN_MIC0_5 647 0x1010 //TX_PREEQ_BIN_MIC0_6 648 0x1010 //TX_PREEQ_BIN_MIC0_7 649 0x1010 //TX_PREEQ_BIN_MIC0_8 650 0x1010 //TX_PREEQ_BIN_MIC0_9 651 0x1010 //TX_PREEQ_BIN_MIC0_10 652 0x1010 //TX_PREEQ_BIN_MIC0_11 653 0x1010 //TX_PREEQ_BIN_MIC0_12 654 0x1010 //TX_PREEQ_BIN_MIC0_13 655 0x1010 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0E10 //TX_PREEQ_BIN_MIC1_0 691 0x1010 //TX_PREEQ_BIN_MIC1_1 692 0x1010 //TX_PREEQ_BIN_MIC1_2 693 0x1010 //TX_PREEQ_BIN_MIC1_3 694 0x1010 //TX_PREEQ_BIN_MIC1_4 695 0x1010 //TX_PREEQ_BIN_MIC1_5 696 0x1010 //TX_PREEQ_BIN_MIC1_6 697 0x1010 //TX_PREEQ_BIN_MIC1_7 698 0x1010 //TX_PREEQ_BIN_MIC1_8 699 0x1010 //TX_PREEQ_BIN_MIC1_9 700 0x1010 //TX_PREEQ_BIN_MIC1_10 701 0x1010 //TX_PREEQ_BIN_MIC1_11 702 0x1010 //TX_PREEQ_BIN_MIC1_12 703 0x1010 //TX_PREEQ_BIN_MIC1_13 704 0x1010 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0E10 //TX_PREEQ_BIN_MIC2_0 740 0x1010 //TX_PREEQ_BIN_MIC2_1 741 0x1010 //TX_PREEQ_BIN_MIC2_2 742 0x1010 //TX_PREEQ_BIN_MIC2_3 743 0x1010 //TX_PREEQ_BIN_MIC2_4 744 0x1010 //TX_PREEQ_BIN_MIC2_5 745 0x1010 //TX_PREEQ_BIN_MIC2_6 746 0x1010 //TX_PREEQ_BIN_MIC2_7 747 0x1010 //TX_PREEQ_BIN_MIC2_8 748 0x1010 //TX_PREEQ_BIN_MIC2_9 749 0x1010 //TX_PREEQ_BIN_MIC2_10 750 0x1010 //TX_PREEQ_BIN_MIC2_11 751 0x1010 //TX_PREEQ_BIN_MIC2_12 752 0x1010 //TX_PREEQ_BIN_MIC2_13 753 0x1010 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x2000 //TX_NND_WEIGHT 765 0x0060 //TX_MIC_CALIBRATION_0 766 0x0060 //TX_MIC_CALIBRATION_1 767 0x0070 //TX_MIC_CALIBRATION_2 768 0x0070 //TX_MIC_CALIBRATION_3 769 0x0050 //TX_MIC_PWR_BIAS_0 770 0x0040 //TX_MIC_PWR_BIAS_1 771 0x0040 //TX_MIC_PWR_BIAS_2 772 0x0040 //TX_MIC_PWR_BIAS_3 773 0x0009 //TX_GAIN_LIMIT_0 774 0x000F //TX_GAIN_LIMIT_1 775 0x000F //TX_GAIN_LIMIT_2 776 0x000F //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x0C00 //TX_TDDRC_ALPHA_UP_01 784 0x0C00 //TX_TDDRC_ALPHA_UP_02 785 0x0C00 //TX_TDDRC_ALPHA_UP_03 786 0x0C00 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX 854 0x0001 //TX_TDDRC_THRD_0 855 0x0001 //TX_TDDRC_THRD_1 856 0x1900 //TX_TDDRC_THRD_2 857 0x1900 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x7B00 //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x07F2 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7B02 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 15 0x6000 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0500 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x000A //RX_NS_LVL_CTRL 23 0xF600 //RX_THR_SN_EST 24 0x7000 //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7FFF //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1200 //RX_TDDRC_THRD_2 115 0x1900 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x6E00 //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x0240 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0304 //RX_FDEQ_BIN_2 66 0x0405 //RX_FDEQ_BIN_3 67 0x0607 //RX_FDEQ_BIN_4 68 0x0809 //RX_FDEQ_BIN_5 69 0x0A0B //RX_FDEQ_BIN_6 70 0x0C0D //RX_FDEQ_BIN_7 71 0x0E0F //RX_FDEQ_BIN_8 72 0x1011 //RX_FDEQ_BIN_9 73 0x1214 //RX_FDEQ_BIN_10 74 0x1618 //RX_FDEQ_BIN_11 75 0x1C1C //RX_FDEQ_BIN_12 76 0x2020 //RX_FDEQ_BIN_13 77 0x2020 //RX_FDEQ_BIN_14 78 0x2011 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x202C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0004 //RX_SAMPLINGFREQ_SIG 160 0x0004 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7B02 //RX_A_HP 169 0x4000 //RX_B_PE 170 0x7800 //RX_THR_PITCH_DET_0 171 0x7000 //RX_THR_PITCH_DET_1 172 0x6000 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0500 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x000A //RX_NS_LVL_CTRL 180 0xF600 //RX_THR_SN_EST 181 0x7000 //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x1000 //RX_TDDRC_ALPHA_UP_1 164 0x1000 //RX_TDDRC_ALPHA_UP_2 165 0x1000 //RX_TDDRC_ALPHA_UP_3 166 0x1000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x7FFF //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1200 //RX_TDDRC_THRD_2 272 0x1900 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x6E00 //RX_TDDRC_SLANT_1 275 0x1000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x0240 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0304 //RX_FDEQ_BIN_2 223 0x0405 //RX_FDEQ_BIN_3 224 0x0607 //RX_FDEQ_BIN_4 225 0x0809 //RX_FDEQ_BIN_5 226 0x0A0B //RX_FDEQ_BIN_6 227 0x0C0D //RX_FDEQ_BIN_7 228 0x0E0F //RX_FDEQ_BIN_8 229 0x1011 //RX_FDEQ_BIN_9 230 0x1214 //RX_FDEQ_BIN_10 231 0x1618 //RX_FDEQ_BIN_11 232 0x1C1C //RX_FDEQ_BIN_12 233 0x2020 //RX_FDEQ_BIN_13 234 0x2020 //RX_FDEQ_BIN_14 235 0x2011 //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-RESERVE2-SWB #PARAM_TYPE TX+2RX #TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG 3 0x2B68 //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0001 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG 9 0x000A //TX_FRAME_SZ 10 0x0000 //TX_DELAY_OPT 11 0x0028 //TX_MAX_TAIL_LENGTH 12 0x0001 //TX_NUM_LOUTCHN 13 0x0001 //TX_MAXNUM_AECREF 14 0x0000 //TX_DBG_FUNC_REG 15 0x0000 //TX_DBG_FUNC_REG1 16 0x0000 //TX_SYS_RESRV_0 17 0x0000 //TX_SYS_RESRV_1 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 21 0x009B //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC 27 0x0B80 //TX_PGA_0 28 0x0800 //TX_PGA_1 29 0x0800 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 33 0x0000 //TX_MIC_PAIRS 34 0x0000 //TX_MIC_PAIRS_HS 35 0x0002 //TX_MICS_FOR_BF 36 0x0000 //TX_MIC_PAIRS_FORL1 37 0x0002 //TX_MICS_OF_PAIR0 38 0x0002 //TX_MICS_OF_PAIR1 39 0x0002 //TX_MICS_OF_PAIR2 40 0x0002 //TX_MICS_OF_PAIR3 41 0x0000 //TX_MIC_DATA_SRC0 42 0x0001 //TX_MIC_DATA_SRC1 43 0x0002 //TX_MIC_DATA_SRC2 44 0x0000 //TX_MIC_DATA_SRC3 45 0x0000 //TX_MIC_PAIR_CH_04 46 0x0000 //TX_MIC_PAIR_CH_05 47 0x0000 //TX_MIC_PAIR_CH_10 48 0x0000 //TX_MIC_PAIR_CH_11 49 0x0000 //TX_MIC_PAIR_CH_12 50 0x0000 //TX_MIC_PAIR_CH_13 51 0x0000 //TX_MIC_PAIR_CH_14 52 0x05DC //TX_HD_BIN_MASK 53 0x0010 //TX_HD_SUBAND_MASK 54 0x19A1 //TX_HD_FRAME_AVG_MASK 55 0x0320 //TX_HD_MIN_FRQ 56 0x1000 //TX_HD_ALPHA_PSD 57 0x1100 //TX_T_PHPR1 58 0x0000 //TX_T_PHPR2 59 0x0000 //TX_T_PTPR 60 0x0000 //TX_T_PNPR 61 0x0000 //TX_T_PAPR1 62 0xEE6C //TX_T_PSDVAT 63 0x0800 //TX_CNT 64 0x4000 //TX_ANTI_HOWL_GAIN 65 0x0001 //TX_MICFORBFMARK_0 66 0x0001 //TX_MICFORBFMARK_1 67 0x0001 //TX_MICFORBFMARK_2 68 0x0001 //TX_MICFORBFMARK_3 69 0x0001 //TX_MICFORBFMARK_4 70 0x0001 //TX_MICFORBFMARK_5 71 0x0000 //TX_DIST2REF_10 72 0x3E00 //TX_DIST2REF_11 73 0x0000 //TX_DIST2REF2 74 0x0000 //TX_DIST2REF_13 75 0x0000 //TX_DIST2REF_14 76 0x0000 //TX_DIST2REF_15 77 0x0000 //TX_DIST2REF_20 78 0x0000 //TX_DIST2REF_21 79 0x0000 //TX_DIST2REF_22 80 0x0000 //TX_DIST2REF_23 81 0x0000 //TX_DIST2REF_24 82 0x0000 //TX_DIST2REF_25 83 0x0000 //TX_DIST2REF_30 84 0x0000 //TX_DIST2REF_31 85 0x0000 //TX_DIST2REF_32 86 0x0000 //TX_DIST2REF_33 87 0x0000 //TX_DIST2REF_34 88 0x0000 //TX_DIST2REF_35 89 0x0000 //TX_MIC_LOC_00 90 0x0000 //TX_MIC_LOC_01 91 0x0000 //TX_MIC_LOC_02 92 0x0000 //TX_MIC_LOC_03 93 0x0000 //TX_MIC_LOC_04 94 0x0000 //TX_MIC_LOC_05 95 0x0000 //TX_MIC_LOC_10 96 0x0000 //TX_MIC_LOC_11 97 0x0000 //TX_MIC_LOC_12 98 0x0000 //TX_MIC_LOC_13 99 0x0000 //TX_MIC_LOC_14 100 0x0000 //TX_MIC_LOC_15 101 0x0000 //TX_MIC_LOC_20 102 0x0000 //TX_MIC_LOC_21 103 0x0000 //TX_MIC_LOC_22 104 0x0000 //TX_MIC_LOC_23 105 0x0000 //TX_MIC_LOC_24 106 0x0000 //TX_MIC_LOC_25 107 0x0200 //TX_MIC_REFBLK_VOLUME 108 0x0800 //TX_MIC_BLOCK_VOLUME 109 0x0000 //TX_INVERSE_MASK 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC 113 0x0000 //TX_MAINMIC_BLKFACTOR 114 0x0000 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN 118 0x0060 //TX_MICBLK_END_BIN 119 0x0015 //TX_MICBLK_FE_HOLD 120 0xFFF2 //TX_MICBLK_MR_EXP_TH 121 0xFFF2 //TX_MICBLK_LR_EXP_TH 122 0x0000 //TX_FENE_HOLD 123 0x4000 //TX_FE_ENER_TH_MTS 124 0x0004 //TX_FE_ENER_TH_EXP 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N 128 0x7EFF //TX_A_HP 129 0x4000 //TX_B_PE 130 0x1800 //TX_THR_PITCH_DET_0 131 0x1000 //TX_THR_PITCH_DET_1 132 0x0800 //TX_THR_PITCH_DET_2 133 0x0008 //TX_PITCH_BFR_LEN 134 0x0003 //TX_SBD_PITCH_DET 135 0x0050 //TX_TD_AEC_L 136 0x4000 //TX_MU0_UNP_TD_AEC 137 0x1000 //TX_MU0_PTD_TD_AEC 138 0x0000 //TX_PP_RESRV_0 139 0x2A94 //TX_PP_RESRV_1 140 0x55F0 //TX_PP_RESRV_2 141 0x0000 //TX_PP_RESRV_3 142 0x0000 //TX_PP_RESRV_4 143 0x0000 //TX_PP_RESRV_5 144 0x0000 //TX_PP_RESRV_6 145 0x0000 //TX_PP_RESRV_7 146 0x001E //TX_TAIL_LENGTH 147 0x0080 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x7000 //TX_EAD_THR 151 0x0800 //TX_THR_RE_EST 152 0x0800 //TX_MIN_EQ_RE_EST_0 153 0x0800 //TX_MIN_EQ_RE_EST_1 154 0x0800 //TX_MIN_EQ_RE_EST_2 155 0x0800 //TX_MIN_EQ_RE_EST_3 156 0x0800 //TX_MIN_EQ_RE_EST_4 157 0x0800 //TX_MIN_EQ_RE_EST_5 158 0x0800 //TX_MIN_EQ_RE_EST_6 159 0x0800 //TX_MIN_EQ_RE_EST_7 160 0x0800 //TX_MIN_EQ_RE_EST_8 161 0x0800 //TX_MIN_EQ_RE_EST_9 162 0x0800 //TX_MIN_EQ_RE_EST_10 163 0x0800 //TX_MIN_EQ_RE_EST_11 164 0x0800 //TX_MIN_EQ_RE_EST_12 165 0x4000 //TX_LAMBDA_RE_EST 166 0x2000 //TX_LAMBDA_CB_NLE 167 0x6000 //TX_C_POST_FLT 168 0x7000 //TX_GAIN_NP 169 0x00C8 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N 171 0x03E8 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 175 0x0000 //TX_MIC_DELAY_LENGTH 176 0x0000 //TX_REF_DELAY_LENGTH 177 0x0000 //TX_ADD_LINEIN_GAINL 178 0x0000 //TX_ADD_LINEIN_GAINH 179 0x0000 //TX_MIN_EQ_RE_EST_14 180 0x0000 //TX_DTD_THR1_8 181 0x7FFF //TX_DTD_THR2_8 182 0x0000 //TX_DTD_MIC_BLK2 183 0x0008 //TX_FRQ_LIN_LEN 184 0x7FFF //TX_FRQ_AEC_LEN_RHO 185 0x6000 //TX_MU0_UNP_FRQ_AEC 186 0x4000 //TX_MU0_PTD_FRQ_AEC 187 0x000A //TX_MINENOISETH 188 0x0800 //TX_MU0_RE_EST 189 0x0001 //TX_AEC_NUM_CH 190 0x0000 //TX_BIGECHOATTENUATION_MAX 191 0x2000 //TX_A_POST_FLT_MICBLK 192 0x0000 //TX_BLKENERTH 193 0x0000 //TX_BLKENERHIGHTH 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL 197 0x7800 //TX_DTD_THR1_0 198 0x7000 //TX_DTD_THR1_1 199 0x7FFF //TX_DTD_THR1_2 200 0x7FFF //TX_DTD_THR1_3 201 0x7FFF //TX_DTD_THR1_4 202 0x7FFF //TX_DTD_THR1_5 203 0x7FFF //TX_DTD_THR1_6 204 0x7FFF //TX_DTD_THR2_0 205 0x7FFF //TX_DTD_THR2_1 206 0x7FFF //TX_DTD_THR2_2 207 0x7FFF //TX_DTD_THR2_3 208 0x7FFF //TX_DTD_THR2_4 209 0x7FFF //TX_DTD_THR2_5 210 0x7FFF //TX_DTD_THR2_6 211 0x1000 //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K 213 0x0BB8 //TX_DT_CUT_K 214 0x0CCD //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO 218 0x0000 //TX_DTD_HD_THR 219 0x0000 //TX_SPK_CUT_K_S 220 0x0000 //TX_DTD_MIC_BLK 221 0x0400 //TX_ADPT_STRICT_L 222 0x0200 //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH 228 0x0800 //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x7FFF //TX_B_LESSCUT_RTO_ECHO 232 0x00F0 //TX_EPD_OFFSET_00 233 0x00F0 //TX_EPD_OFFST_01 234 0x1388 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x7FFF //TX_DTD_THR1_7 238 0x7FFF //TX_DTD_THR2_7 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 246 0xF400 //TX_THR_SN_EST_4 247 0xF400 //TX_THR_SN_EST_5 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T 268 0x0041 //TX_INBEAMHOLDT 269 0x2000 //TX_G_STRICT 270 0x2000 //TX_EQ_THR_BF 271 0x799A //TX_LAMBDA_EQ_BF 272 0x1000 //TX_NE_RTO_TH 273 0x0400 //TX_NE_RTO_TH_L 274 0x0800 //TX_MAINREFRTOH_TH_H 275 0x0800 //TX_MAINREFRTOH_TH_L 276 0x0800 //TX_MAINREFRTO_TH_H 277 0x0800 //TX_MAINREFRTO_TH_L 278 0x0200 //TX_MAINREFRTO_TH_EQ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 282 0x0011 //TX_NS_LVL_CTRL_1 283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 290 0x000F //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 303 0x7FFF //TX_SNRI_SUP_3 304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x000E //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x1000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x7FFF //TX_B_LESSCUT_RTO_S_5 336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7900 //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7B00 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 345 0x7B00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0000 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0800 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0800 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0000 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT 360 0x0100 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 371 0x00C8 //TX_NOISE_TH_2 372 0x3A98 //TX_NOISE_TH_3 373 0x0FA0 //TX_NOISE_TH_4 374 0x157C //TX_NOISE_TH_5 375 0x7FFF //TX_NOISE_TH_5_2 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x044C //TX_MINENOISE_TH 380 0xD508 //TX_MORENS_TFMASK_TH 381 0x0001 //TX_DRC_QUIET_FLOOR 382 0x3A98 //TX_RATIODTL_CUT_TH 383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY 387 0x019A //TX_OUT_ENER_TH_NOISE 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN 391 0x7FFF //TX_POST_MASK_SUP_HSNE 392 0x1388 //TX_TAIL_DET_TH 393 0x4000 //TX_B_LESSCUT_RTO_WTA 394 0x0000 //TX_MEL_G_R 395 0x0080 //TX_SUPHIGH_TH 396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L 398 0x1800 //TX_C_POST_FLT_MASK 399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH 406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR 410 0x4848 //TX_NS_FP_K_METAL 411 0x3A98 //TX_NOISEDET_BOOST_TH 412 0x0FA0 //TX_NSMOOTH_TH 413 0x0000 //TX_NS_RESRV_8 414 0x1800 //TX_RHO_UPB 415 0x0BB8 //TX_N_HOLD_HS 416 0x0050 //TX_N_RHO_BFR0 417 0x7FFF //TX_LAMBDA_ARSP_EST 418 0x0100 //TX_EXTRA_GAIN_MICBLOCK 419 0x0CCD //TX_THR_STD_NSR 420 0x019A //TX_THR_STD_PLH 421 0x2AF8 //TX_N_HOLD_STD 422 0x0066 //TX_THR_STD_RHO 423 0x2000 //TX_BF_RESET_THR_HS 424 0x09C4 //TX_SB_RTO_MEAN_TH 425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK 426 0x3800 //TX_SB_RTO_MEAN_TH_ABN 427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB 428 0x0000 //TX_WTA_EN_RTO_TH 429 0x0000 //TX_TOP_ENER_TH_F 430 0x0000 //TX_DESIRED_TALK_HOLDT 431 0x0800 //TX_MIC_BLOCK_FACTOR 432 0x0000 //TX_NSEST_BFRLRNRDC 433 0x0000 //TX_THR_POST_FLT_HS 434 0x0010 //TX_HS_VAD_BIN 435 0x2666 //TX_THR_VAD_HS 436 0x2CCD //TX_MEAN_RTO_MIN_TH2 437 0x0032 //TX_SILENCE_T 438 0x0000 //TX_A_POST_FLT_WTA 439 0x799A //TX_LAMBDA_PFLT_WTA 440 0x0000 //TX_SB_RHO_MEAN2_TH 441 0x0190 //TX_SB_RHO_MEAN3_TH 442 0x0000 //TX_HS_RESRV_4 443 0x0000 //TX_HS_RESRV_5 444 0x003C //TX_DOA_VAD_THR_1 445 0x0000 //TX_DOA_VAD_THR_2 446 0x0028 //TX_DOA_VAD_THR1_0 447 0x0028 //TX_DOA_VAD_THR1_1 448 0x0000 //TX_SRC_DOA_RNG_LOW_0A 449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A 450 0x005A //TX_DFLT_SRC_DOA_0A 451 0x0000 //TX_SRC_DOA_RNG_LOW_0B 452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B 453 0x0000 //TX_DFLT_SRC_DOA_0B 454 0x0000 //TX_SRC_DOA_RNG_LOW_0C 455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C 456 0x0000 //TX_DFLT_SRC_DOA_0C 457 0x0000 //TX_SRC_DOA_RNG_LOW_0D 458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D 459 0x0000 //TX_DFLT_SRC_DOA_0D 460 0x0000 //TX_SRC_DOA_RNG_LOW_1A 461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A 462 0x005A //TX_DFLT_SRC_DOA_1A 463 0x0000 //TX_SRC_DOA_RNG_LOW_1B 464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B 465 0x005A //TX_DFLT_SRC_DOA_1B 466 0x0000 //TX_SRC_DOA_RNG_LOW_1C 467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C 468 0x005A //TX_DFLT_SRC_DOA_1C 469 0x0000 //TX_SRC_DOA_RNG_LOW_1D 470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D 471 0x005A //TX_DFLT_SRC_DOA_1D 472 0x0100 //TX_BF_HOLDOFF_T 473 0x7FFF //TX_DOA_COST_FACTOR 474 0x4000 //TX_MAINTOREFR_TH0 475 0x071C //TX_DOA_TRK_THR 476 0x012C //TX_DOA_TRACK_HT 477 0x0200 //TX_N1_HOLD_HF 478 0x0100 //TX_N2_HOLD_HF 479 0x3000 //TX_BF_RESET_THR_HF 480 0x7333 //TX_DOA_SMOOTH 481 0x0800 //TX_MU_BF 482 0x0800 //TX_BF_MU_LF_B2 483 0x0040 //TX_BF_FC_END_BIN_B2 484 0x0020 //TX_BF_FC_END_BIN 485 0x0000 //TX_HF_RESRV_25 486 0x0000 //TX_HF_RESRV_26 487 0x0007 //TX_N_DOA_SEED 488 0x0001 //TX_FINE_DOA_SEARCH_FLG 489 0x0000 //TX_HF_RESRV_27 490 0x038E //TX_DLT_SRC_DOA_RNG 491 0x0200 //TX_BF_MU_LF 492 0x0000 //TX_DFLT_SRC_LOC_0 493 0x7FFF //TX_DFLT_SRC_LOC_1 494 0x0000 //TX_DFLT_SRC_LOC_2 495 0x038E //TX_DOA_TRACK_VADTH 496 0x0000 //TX_DOA_TRACK_NEW 497 0x01E0 //TX_NOR_OFF_THR 498 0x7C00 //TX_MORE_ON_700HZ_THR 499 0x2000 //TX_MU_BF_ADPT_NS 500 0x0000 //TX_ADAPT_LEN 501 0x6666 //TX_MORE_SNS 502 0x0000 //TX_NOR_OFF_TH1 503 0x0000 //TX_WIDE_MASK_TH 504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR 505 0x6000 //TX_C_POST_FLT_CUT 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC 509 0x0000 //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH 514 0xC000 //TX_DEREVERB_LF_MU 515 0xC000 //TX_DEREVERB_HF_MU 516 0xCCCC //TX_DEREVERB_DELAY 517 0xD999 //TX_DEREVERB_COEF_LEN 518 0x1F40 //TX_DEREVERB_DNR 519 0x0000 //TX_DEREVERB_ALPHA 520 0x0000 //TX_DEREVERB_BETA 521 0x0000 //TX_GSC_RTOL_TH 522 0x7000 //TX_GSC_RTOH_TH 523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x122E //TX_DR_RESRV_7 527 0x1100 //TX_DR_RESRV_8 528 0x1333 //TX_WIND_MARK_TH 529 0x399A //TX_CORR_THR 530 0x0004 //TX_SNR_THR 531 0x0010 //TX_ENGY_THR 532 0x1770 //TX_CORR_HIGH_TH 533 0x6000 //TX_ENGY_THR_2 534 0x3400 //TX_MEAN_RTO_THR 535 0x0028 //TX_WNS_ENOISE_MIC0_TH 536 0x3000 //TX_RATIOMICL_TH 537 0x64CD //TX_CALIG_HS 538 0x0000 //TX_LVL_CTRL 539 0x0014 //TX_WIND_SUPRTO 540 0x000A //TX_WNS_MIN_G 541 0x0000 //TX_WNS_B_POST_FLT 542 0x2800 //TX_RATIOMICH_TH 543 0xD120 //TX_WIND_INBEAM_L_TH 544 0x0FA0 //TX_WIND_INBEAM_H_TH 545 0x2000 //TX_WNS_RESRV_0 546 0x59D8 //TX_WNS_RESRV_1 547 0x0000 //TX_WNS_RESRV_2 548 0x0000 //TX_WNS_RESRV_3 549 0x0000 //TX_WNS_RESRV_4 550 0x0000 //TX_WNS_RESRV_5 551 0x0000 //TX_WNS_RESRV_6 552 0x0000 //TX_BVE_NOISE_FLOOR_0 553 0x0070 //TX_BVE_NOISE_FLOOR_1 554 0x0070 //TX_BVE_NOISE_FLOOR_2 555 0x0010 //TX_BVE_NOISE_FLOOR_3 556 0x0070 //TX_BVE_NOISE_FLOOR_4 557 0x00B0 //TX_BVE_NOISE_FLOOR_5 558 0x0E66 //TX_BVE_NOISE_FLOOR_6 559 0x0050 //TX_BVE_NOISE_FLOOR_7 560 0x770A //TX_BVE_NOISE_FLOOR_8 561 0x0000 //TX_BVE_NOISE_FLOOR_9 562 0x0000 //TX_BVE_IN_N 563 0x0000 //TX_BVE_OUT_N 564 0x0000 //TX_BVE_MICALPHA_DOWN 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4848 //TX_FDEQ_GAIN_5 573 0x4848 //TX_FDEQ_GAIN_6 574 0x4848 //TX_FDEQ_GAIN_7 575 0x4848 //TX_FDEQ_GAIN_8 576 0x4848 //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 588 0x4848 //TX_FDEQ_GAIN_21 589 0x4848 //TX_FDEQ_GAIN_22 590 0x4848 //TX_FDEQ_GAIN_23 591 0x0202 //TX_FDEQ_BIN_0 592 0x0203 //TX_FDEQ_BIN_1 593 0x0303 //TX_FDEQ_BIN_2 594 0x0304 //TX_FDEQ_BIN_3 595 0x0405 //TX_FDEQ_BIN_4 596 0x0506 //TX_FDEQ_BIN_5 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 601 0x1013 //TX_FDEQ_BIN_10 602 0x1719 //TX_FDEQ_BIN_11 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 606 0x282C //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 610 0x0000 //TX_FDEQ_BIN_19 611 0x0000 //TX_FDEQ_BIN_20 612 0x0000 //TX_FDEQ_BIN_21 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING 616 0x0020 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 625 0x4868 //TX_PREEQ_GAIN_MIC0_8 626 0x6860 //TX_PREEQ_GAIN_MIC0_9 627 0x6048 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 637 0x4848 //TX_PREEQ_GAIN_MIC0_20 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 641 0x0E10 //TX_PREEQ_BIN_MIC0_0 642 0x1010 //TX_PREEQ_BIN_MIC0_1 643 0x1010 //TX_PREEQ_BIN_MIC0_2 644 0x1010 //TX_PREEQ_BIN_MIC0_3 645 0x1010 //TX_PREEQ_BIN_MIC0_4 646 0x1010 //TX_PREEQ_BIN_MIC0_5 647 0x1010 //TX_PREEQ_BIN_MIC0_6 648 0x1010 //TX_PREEQ_BIN_MIC0_7 649 0x1010 //TX_PREEQ_BIN_MIC0_8 650 0x1010 //TX_PREEQ_BIN_MIC0_9 651 0x1010 //TX_PREEQ_BIN_MIC0_10 652 0x1010 //TX_PREEQ_BIN_MIC0_11 653 0x1010 //TX_PREEQ_BIN_MIC0_12 654 0x1010 //TX_PREEQ_BIN_MIC0_13 655 0x1010 //TX_PREEQ_BIN_MIC0_14 656 0x0200 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 661 0x0000 //TX_PREEQ_BIN_MIC0_20 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 665 0x0020 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 674 0x4848 //TX_PREEQ_GAIN_MIC1_8 675 0x4848 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 686 0x4848 //TX_PREEQ_GAIN_MIC1_20 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 690 0x0E10 //TX_PREEQ_BIN_MIC1_0 691 0x1010 //TX_PREEQ_BIN_MIC1_1 692 0x1010 //TX_PREEQ_BIN_MIC1_2 693 0x1010 //TX_PREEQ_BIN_MIC1_3 694 0x1010 //TX_PREEQ_BIN_MIC1_4 695 0x1010 //TX_PREEQ_BIN_MIC1_5 696 0x1010 //TX_PREEQ_BIN_MIC1_6 697 0x1010 //TX_PREEQ_BIN_MIC1_7 698 0x1010 //TX_PREEQ_BIN_MIC1_8 699 0x1010 //TX_PREEQ_BIN_MIC1_9 700 0x1010 //TX_PREEQ_BIN_MIC1_10 701 0x1010 //TX_PREEQ_BIN_MIC1_11 702 0x1010 //TX_PREEQ_BIN_MIC1_12 703 0x1010 //TX_PREEQ_BIN_MIC1_13 704 0x1010 //TX_PREEQ_BIN_MIC1_14 705 0x0200 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 710 0x0000 //TX_PREEQ_BIN_MIC1_20 711 0x0000 //TX_PREEQ_BIN_MIC1_21 712 0x0000 //TX_PREEQ_BIN_MIC1_22 713 0x0000 //TX_PREEQ_BIN_MIC1_23 714 0x0020 //TX_PREEQ_SUBNUM_MIC2 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 721 0x4848 //TX_PREEQ_GAIN_MIC2_6 722 0x4848 //TX_PREEQ_GAIN_MIC2_7 723 0x4848 //TX_PREEQ_GAIN_MIC2_8 724 0x4848 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 726 0x4848 //TX_PREEQ_GAIN_MIC2_11 727 0x4848 //TX_PREEQ_GAIN_MIC2_12 728 0x4848 //TX_PREEQ_GAIN_MIC2_13 729 0x4848 //TX_PREEQ_GAIN_MIC2_14 730 0x4848 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 734 0x4848 //TX_PREEQ_GAIN_MIC2_19 735 0x4848 //TX_PREEQ_GAIN_MIC2_20 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 739 0x0E10 //TX_PREEQ_BIN_MIC2_0 740 0x1010 //TX_PREEQ_BIN_MIC2_1 741 0x1010 //TX_PREEQ_BIN_MIC2_2 742 0x1010 //TX_PREEQ_BIN_MIC2_3 743 0x1010 //TX_PREEQ_BIN_MIC2_4 744 0x1010 //TX_PREEQ_BIN_MIC2_5 745 0x1010 //TX_PREEQ_BIN_MIC2_6 746 0x1010 //TX_PREEQ_BIN_MIC2_7 747 0x1010 //TX_PREEQ_BIN_MIC2_8 748 0x1010 //TX_PREEQ_BIN_MIC2_9 749 0x1010 //TX_PREEQ_BIN_MIC2_10 750 0x1010 //TX_PREEQ_BIN_MIC2_11 751 0x1010 //TX_PREEQ_BIN_MIC2_12 752 0x1010 //TX_PREEQ_BIN_MIC2_13 753 0x1010 //TX_PREEQ_BIN_MIC2_14 754 0x0200 //TX_PREEQ_BIN_MIC2_15 755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 759 0x0000 //TX_PREEQ_BIN_MIC2_20 760 0x0000 //TX_PREEQ_BIN_MIC2_21 761 0x0000 //TX_PREEQ_BIN_MIC2_22 762 0x0000 //TX_PREEQ_BIN_MIC2_23 763 0x0006 //TX_MASKING_ABILITY 764 0x0800 //TX_NND_WEIGHT 765 0x0062 //TX_MIC_CALIBRATION_0 766 0x0062 //TX_MIC_CALIBRATION_1 767 0x0062 //TX_MIC_CALIBRATION_2 768 0x0062 //TX_MIC_CALIBRATION_3 769 0x0046 //TX_MIC_PWR_BIAS_0 770 0x0046 //TX_MIC_PWR_BIAS_1 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x000C //TX_GAIN_LIMIT_0 774 0x000C //TX_GAIN_LIMIT_1 775 0x000C //TX_GAIN_LIMIT_2 776 0x000C //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN 780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI 781 0x7F5B //TX_BVE_FEVADLI_ALPHA 782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP 783 0x3000 //TX_TDDRC_ALPHA_UP_01 784 0x3000 //TX_TDDRC_ALPHA_UP_02 785 0x3000 //TX_TDDRC_ALPHA_UP_03 786 0x3000 //TX_TDDRC_ALPHA_UP_04 787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 791 0x78D6 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 795 0x0018 //TX_FDDRC_BAND_MARGIN_0 796 0x0030 //TX_FDDRC_BAND_MARGIN_1 797 0x0050 //TX_FDDRC_BAND_MARGIN_2 798 0x0080 //TX_FDDRC_BAND_MARGIN_3 799 0x0007 //TX_FDDRC_BLOCK_EXP 800 0x5000 //TX_FDDRC_THRD_2_0 801 0x5000 //TX_FDDRC_THRD_2_1 802 0x5000 //TX_FDDRC_THRD_2_2 803 0x5000 //TX_FDDRC_THRD_2_3 804 0x6400 //TX_FDDRC_THRD_3_0 805 0x6400 //TX_FDDRC_THRD_3_1 806 0x6400 //TX_FDDRC_THRD_3_2 807 0x6400 //TX_FDDRC_THRD_3_3 808 0x2000 //TX_FDDRC_SLANT_0_0 809 0x2000 //TX_FDDRC_SLANT_0_1 810 0x2000 //TX_FDDRC_SLANT_0_2 811 0x2000 //TX_FDDRC_SLANT_0_3 812 0x5333 //TX_FDDRC_SLANT_1_0 813 0x5333 //TX_FDDRC_SLANT_1_1 814 0x5333 //TX_FDDRC_SLANT_1_2 815 0x5333 //TX_FDDRC_SLANT_1_3 816 0x0000 //TX_DEADMIC_SILENCE_TH 817 0x0000 //TX_MIC_DEGRADE_TH 818 0x0000 //TX_DEADMIC_CNT 819 0x0000 //TX_MIC_DEGRADE_CNT 820 0x0000 //TX_FDDRC_RESRV_4 821 0x0000 //TX_FDDRC_RESRV_5 822 0x0000 //TX_FDDRC_RESRV_6 823 0x7FFF //TX_KS_NOISEPASTE_FACTOR 824 0x0001 //TX_KS_CONFIG 825 0x7FFF //TX_KS_GAIN_MIN 826 0x0000 //TX_KS_RESRV_0 827 0x0000 //TX_KS_RESRV_1 828 0x0000 //TX_KS_RESRV_2 829 0x7C00 //TX_LAMBDA_PKA_FP 830 0x2000 //TX_TPKA_FP 831 0x0080 //TX_MIN_G_FP 832 0x2000 //TX_MAX_G_FP 833 0x4848 //TX_FFP_FP_K_METAL 834 0x4000 //TX_A_POST_FLT_FP 835 0x0F5C //TX_RTO_OUTBEAM_TH 836 0x4CCD //TX_TPKA_FP_THD 837 0x0000 //TX_MAX_G_FP_BLK 838 0x0000 //TX_FFP_FADEIN 839 0x0000 //TX_FFP_FADEOUT 840 0x0000 //TX_WHISPERCTH 841 0x0000 //TX_WHISPERHOLDT 842 0x0000 //TX_WHISP_ENTHH 843 0x0000 //TX_WHISP_ENTHL 844 0x0000 //TX_WHISP_RTOTH 845 0x0000 //TX_WHISP_RTOTH2 846 0x0000 //TX_MUTE_PERIOD 847 0x0000 //TX_FADE_IN_PERIOD 848 0x0100 //TX_FFP_RESRV_2 849 0x0020 //TX_FFP_RESRV_3 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0000 //TX_FILTINDX 854 0x0000 //TX_TDDRC_THRD_0 855 0x0000 //TX_TDDRC_THRD_1 856 0x2000 //TX_TDDRC_THRD_2 857 0x2000 //TX_TDDRC_THRD_3 858 0x3000 //TX_TDDRC_SLANT_0 859 0x6E00 //TX_TDDRC_SLANT_1 860 0x3000 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W 866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x78D6 //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH 870 0x0000 //TX_TFMASKLTHL 871 0x0CCD //TX_TFMASKHTH 872 0x0CCD //TX_TFMASKLTH_BINVAD 873 0xF333 //TX_TFMASKLTH_NS_EST 874 0x2CCD //TX_TFMASKLTH_DOA 875 0xECCD //TX_TFMASKTH_BLESSCUT 876 0x1000 //TX_B_LESSCUT_RTO_MASK 877 0x3800 //TX_SB_RHO_MEAN_TH_ABN 878 0x2000 //TX_B_POST_FLT_MASK 879 0x0000 //TX_B_POST_FLT_MASK1 880 0x5333 //TX_GAIN_WIND_MASK 881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC 882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC 883 0x7333 //TX_FASTNS_OUTIN_TH 884 0x0CCD //TX_FASTNS_TFMASK_TH 885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH 897 0x2339 //TX_SENDFUNC_REG_MICMUTE 898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 899 0x02BC //TX_MICMUTE_RATIO_THR 900 0x0140 //TX_MICMUTE_AMP_THR 901 0x0004 //TX_MICMUTE_HPF_IND 902 0x00C0 //TX_MICMUTE_LOG_EYR_TH 903 0x0008 //TX_MICMUTE_CVG_TIME 904 0x0008 //TX_MICMUTE_RELEASE_TIME 905 0x01FE //TX_MIC_VOLUME_MIC0MUTE 906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 907 0x001E //TX_MICMUTE_FRQ_AEC_L 908 0x7999 //TX_MICMUTE_EAD_THR 909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE 910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST 911 0x4000 //TX_DTD_THR1_MICMUTE_0 912 0x7000 //TX_DTD_THR1_MICMUTE_1 913 0x7FFF //TX_DTD_THR1_MICMUTE_2 914 0x7FFF //TX_DTD_THR1_MICMUTE_3 915 0x6CCC //TX_DTD_THR2_MICMUTE_0 916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 921 0x4000 //TX_MICMUTE_C_POST_FLT 922 0x03E8 //TX_MICMUTE_DT_CUT_K 923 0x0001 //TX_MICMUTE_DT_CUT_THR 924 0x03E8 //TX_MICMUTE_DT_CUT_K2 925 0x0001 //TX_MICMUTE_DT_CUT_THR2 926 0x0064 //TX_MICMUTE_DT2_HOLD_N 927 0x1000 //TX_MICMUTE_RATIODTH_THCUT 928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL 929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH 930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK 931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH 932 0x0258 //TX_MICMUTE_DT_CUT_K1 933 0x0800 //TX_MICMUTE_N2_SN_EST 934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 937 0x7000 //TX_MICMUTE_B_POST_FILT_0 938 0x2710 //TX_MIC1RUB_AMP_THR 939 0x0010 //TX_MIC1MUTE_RATIO_THR 940 0x0450 //TX_MIC1MUTE_AMP_THR 941 0x0008 //TX_MIC1MUTE_CVG_TIME 942 0x0008 //TX_MIC1MUTE_RELEASE_TIME 943 0x0000 //TX_AMS_RESRV_01 944 0x0000 //TX_AMS_RESRV_02 945 0x0000 //TX_AMS_RESRV_03 946 0x0000 //TX_AMS_RESRV_04 947 0x0000 //TX_AMS_RESRV_05 948 0x0000 //TX_AMS_RESRV_06 949 0x0000 //TX_AMS_RESRV_07 950 0x0000 //TX_AMS_RESRV_08 951 0x0000 //TX_AMS_RESRV_09 952 0x0000 //TX_AMS_RESRV_10 953 0x0000 //TX_AMS_RESRV_11 954 0x0000 //TX_AMS_RESRV_12 955 0x0000 //TX_AMS_RESRV_13 956 0x0000 //TX_AMS_RESRV_14 957 0x0000 //TX_AMS_RESRV_15 958 0x0000 //TX_AMS_RESRV_16 959 0x0000 //TX_AMS_RESRV_17 960 0x0000 //TX_AMS_RESRV_18 961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x002C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC 4 0x000A //RX_FRAME_SZ 5 0x0000 //RX_DELAY_OPT 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 10 0x0800 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x0000 //RX_B_PE 13 0x1800 //RX_THR_PITCH_DET_0 14 0x1000 //RX_THR_PITCH_DET_1 15 0x0800 //RX_THR_PITCH_DET_2 16 0x0008 //RX_PITCH_BFR_LEN 17 0x0003 //RX_SBD_PITCH_DET 18 0x0100 //RX_PP_RESRV_0 19 0x0020 //RX_PP_RESRV_1 20 0x0400 //RX_N_SN_EST 21 0x000C //RX_N2_SN_EST 22 0x0003 //RX_NS_LVL_CTRL 23 0x9000 //RX_THR_SN_EST 24 0x7CCD //RX_LAMBDA_PFILT 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH 133 0x3000 //RX_BWE_UV_TH2 134 0x1800 //RX_BWE_UV_TH3 135 0x1000 //RX_BWE_V_TH 136 0x04CD //RX_BWE_GAIN1_V_TH1 137 0x0F33 //RX_BWE_GAIN1_V_TH2 138 0x7333 //RX_BWE_UV_EQ 139 0x199A //RX_BWE_V_EQ 140 0x7333 //RX_BWE_TONE_TH 141 0x0004 //RX_BWE_UV_HOLD_T 142 0x6CCD //RX_BWE_GAIN2_ALPHA 143 0x799A //RX_BWE_GAIN3_ALPHA 144 0x001E //RX_BWE_CUTOFF 145 0x3000 //RX_BWE_GAINFILL 146 0x3200 //RX_BWE_MAXTH_TONE 147 0x2000 //RX_BWE_EQ_0 148 0x2000 //RX_BWE_EQ_1 149 0x2000 //RX_BWE_EQ_2 150 0x2000 //RX_BWE_EQ_3 151 0x2000 //RX_BWE_EQ_4 152 0x2000 //RX_BWE_EQ_5 153 0x2000 //RX_BWE_EQ_6 154 0x0000 //RX_BWE_RESRV_0 155 0x0000 //RX_BWE_RESRV_1 156 0x0000 //RX_BWE_RESRV_2 #VOL 0 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0013 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0020 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x005B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0099 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x5000 //RX_TDDRC_ALPHA_UP_1 7 0x5000 //RX_TDDRC_ALPHA_UP_2 8 0x5000 //RX_TDDRC_ALPHA_UP_3 9 0x2000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x65AD //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 114 0x1A00 //RX_TDDRC_THRD_2 115 0x1A00 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 117 0x7EB8 //RX_TDDRC_SLANT_1 118 0x5000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W 124 0x01C8 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 40 0x4848 //RX_FDEQ_GAIN_1 41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 43 0x4848 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4848 //RX_FDEQ_GAIN_8 48 0x4848 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 58 0x4848 //RX_FDEQ_GAIN_19 59 0x4848 //RX_FDEQ_GAIN_20 60 0x4848 //RX_FDEQ_GAIN_21 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 77 0x1E28 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 82 0x0000 //RX_FDEQ_BIN_19 83 0x0000 //RX_FDEQ_BIN_20 84 0x0000 //RX_FDEQ_BIN_21 85 0x0000 //RX_FDEQ_BIN_22 86 0x0000 //RX_FDEQ_BIN_23 87 0x4000 //RX_FDEQ_RESRV_0 88 0x0320 //RX_FDEQ_RESRV_1 89 0x0018 //RX_FDDRC_BAND_MARGIN_0 90 0x0030 //RX_FDDRC_BAND_MARGIN_1 91 0x0050 //RX_FDDRC_BAND_MARGIN_2 92 0x0080 //RX_FDDRC_BAND_MARGIN_3 93 0x0007 //RX_FDDRC_BLOCK_EXP 94 0x5000 //RX_FDDRC_THRD_2_0 95 0x5000 //RX_FDDRC_THRD_2_1 96 0x5000 //RX_FDDRC_THRD_2_2 97 0x5000 //RX_FDDRC_THRD_2_3 98 0x6400 //RX_FDDRC_THRD_3_0 99 0x6400 //RX_FDDRC_THRD_3_1 100 0x6400 //RX_FDDRC_THRD_3_2 101 0x6400 //RX_FDDRC_THRD_3_3 102 0x2000 //RX_FDDRC_SLANT_0_0 103 0x2000 //RX_FDDRC_SLANT_0_1 104 0x2000 //RX_FDDRC_SLANT_0_2 105 0x2000 //RX_FDDRC_SLANT_0_3 106 0x5333 //RX_FDDRC_SLANT_1_0 107 0x5333 //RX_FDDRC_SLANT_1_1 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #RX 2 157 0x002C //RX_RECVFUNC_MODE_0 158 0x0000 //RX_RECVFUNC_MODE_1 159 0x0003 //RX_SAMPLINGFREQ_SIG 160 0x0003 //RX_SAMPLINGFREQ_PROC 161 0x000A //RX_FRAME_SZ 162 0x0000 //RX_DELAY_OPT 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 167 0x0800 //RX_PGA 168 0x7FFF //RX_A_HP 169 0x0000 //RX_B_PE 170 0x1800 //RX_THR_PITCH_DET_0 171 0x1000 //RX_THR_PITCH_DET_1 172 0x0800 //RX_THR_PITCH_DET_2 173 0x0008 //RX_PITCH_BFR_LEN 174 0x0003 //RX_SBD_PITCH_DET 175 0x0100 //RX_PP_RESRV_0 176 0x0020 //RX_PP_RESRV_1 177 0x0400 //RX_N_SN_EST 178 0x000C //RX_N2_SN_EST 179 0x0003 //RX_NS_LVL_CTRL 180 0x9000 //RX_THR_SN_EST 181 0x7CCD //RX_LAMBDA_PFILT 182 0x000A //RX_FENS_RESRV_0 183 0x0190 //RX_FENS_RESRV_1 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 187 0x0002 //RX_EXTRA_NS_L 188 0x0800 //RX_EXTRA_NS_A 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 192 0x199A //RX_A_POST_FLT 193 0x0000 //RX_LMT_THRD 194 0x4000 //RX_LMT_ALPHA 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 268 0x0002 //RX_FILTINDX 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 282 0x7C00 //RX_LAMBDA_PKA_FP 283 0x2000 //RX_TPKA_FP 284 0x2000 //RX_MIN_G_FP 285 0x0080 //RX_MAX_G_FP 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 288 0x0000 //RX_MAXLEVEL_CNG 289 0x3000 //RX_BWE_UV_TH 290 0x3000 //RX_BWE_UV_TH2 291 0x1800 //RX_BWE_UV_TH3 292 0x1000 //RX_BWE_V_TH 293 0x04CD //RX_BWE_GAIN1_V_TH1 294 0x0F33 //RX_BWE_GAIN1_V_TH2 295 0x7333 //RX_BWE_UV_EQ 296 0x199A //RX_BWE_V_EQ 297 0x7333 //RX_BWE_TONE_TH 298 0x0004 //RX_BWE_UV_HOLD_T 299 0x6CCD //RX_BWE_GAIN2_ALPHA 300 0x799A //RX_BWE_GAIN3_ALPHA 301 0x001E //RX_BWE_CUTOFF 302 0x3000 //RX_BWE_GAINFILL 303 0x3200 //RX_BWE_MAXTH_TONE 304 0x2000 //RX_BWE_EQ_0 305 0x2000 //RX_BWE_EQ_1 306 0x2000 //RX_BWE_EQ_2 307 0x2000 //RX_BWE_EQ_3 308 0x2000 //RX_BWE_EQ_4 309 0x2000 //RX_BWE_EQ_5 310 0x2000 //RX_BWE_EQ_6 311 0x0000 //RX_BWE_RESRV_0 312 0x0000 //RX_BWE_RESRV_1 313 0x0000 //RX_BWE_RESRV_2 #VOL 0 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x000B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 1 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0013 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 2 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0020 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 3 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0036 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 4 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x005B //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 5 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0099 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0 #VOL 6 163 0x5000 //RX_TDDRC_ALPHA_UP_1 164 0x5000 //RX_TDDRC_ALPHA_UP_2 165 0x5000 //RX_TDDRC_ALPHA_UP_3 166 0x2000 //RX_TDDRC_ALPHA_UP_4 184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 190 0x65AD //RX_TDDRC_LIMITER_THRD 191 0x0800 //RX_TDDRC_LIMITER_GAIN 269 0x0000 //RX_TDDRC_THRD_0 270 0x0000 //RX_TDDRC_THRD_1 271 0x1A00 //RX_TDDRC_THRD_2 272 0x1A00 //RX_TDDRC_THRD_3 273 0x3000 //RX_TDDRC_SLANT_0 274 0x7EB8 //RX_TDDRC_SLANT_1 275 0x5000 //RX_TDDRC_ALPHA_UP_0 276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 277 0x0000 //RX_TDDRC_HMNC_FLAG 278 0x199A //RX_TDDRC_HMNC_GAIN 279 0x0001 //RX_TDDRC_SMT_FLAG 280 0x0CCD //RX_TDDRC_SMT_W 281 0x01C8 //RX_TDDRC_DRC_GAIN 195 0x0020 //RX_FDEQ_SUBNUM 196 0x4848 //RX_FDEQ_GAIN_0 197 0x4848 //RX_FDEQ_GAIN_1 198 0x4848 //RX_FDEQ_GAIN_2 199 0x4848 //RX_FDEQ_GAIN_3 200 0x4848 //RX_FDEQ_GAIN_4 201 0x4848 //RX_FDEQ_GAIN_5 202 0x4848 //RX_FDEQ_GAIN_6 203 0x4848 //RX_FDEQ_GAIN_7 204 0x4848 //RX_FDEQ_GAIN_8 205 0x4848 //RX_FDEQ_GAIN_9 206 0x4848 //RX_FDEQ_GAIN_10 207 0x4848 //RX_FDEQ_GAIN_11 208 0x4848 //RX_FDEQ_GAIN_12 209 0x4848 //RX_FDEQ_GAIN_13 210 0x4848 //RX_FDEQ_GAIN_14 211 0x4848 //RX_FDEQ_GAIN_15 212 0x4848 //RX_FDEQ_GAIN_16 213 0x4848 //RX_FDEQ_GAIN_17 214 0x4848 //RX_FDEQ_GAIN_18 215 0x4848 //RX_FDEQ_GAIN_19 216 0x4848 //RX_FDEQ_GAIN_20 217 0x4848 //RX_FDEQ_GAIN_21 218 0x4848 //RX_FDEQ_GAIN_22 219 0x4848 //RX_FDEQ_GAIN_23 220 0x0202 //RX_FDEQ_BIN_0 221 0x0203 //RX_FDEQ_BIN_1 222 0x0303 //RX_FDEQ_BIN_2 223 0x0304 //RX_FDEQ_BIN_3 224 0x0405 //RX_FDEQ_BIN_4 225 0x0506 //RX_FDEQ_BIN_5 226 0x0708 //RX_FDEQ_BIN_6 227 0x090A //RX_FDEQ_BIN_7 228 0x0B0C //RX_FDEQ_BIN_8 229 0x0D0E //RX_FDEQ_BIN_9 230 0x1013 //RX_FDEQ_BIN_10 231 0x1719 //RX_FDEQ_BIN_11 232 0x1B1E //RX_FDEQ_BIN_12 233 0x1E1E //RX_FDEQ_BIN_13 234 0x1E28 //RX_FDEQ_BIN_14 235 0x282C //RX_FDEQ_BIN_15 236 0x0000 //RX_FDEQ_BIN_16 237 0x0000 //RX_FDEQ_BIN_17 238 0x0000 //RX_FDEQ_BIN_18 239 0x0000 //RX_FDEQ_BIN_19 240 0x0000 //RX_FDEQ_BIN_20 241 0x0000 //RX_FDEQ_BIN_21 242 0x0000 //RX_FDEQ_BIN_22 243 0x0000 //RX_FDEQ_BIN_23 244 0x4000 //RX_FDEQ_RESRV_0 245 0x0320 //RX_FDEQ_RESRV_1 246 0x0018 //RX_FDDRC_BAND_MARGIN_0 247 0x0030 //RX_FDDRC_BAND_MARGIN_1 248 0x0050 //RX_FDDRC_BAND_MARGIN_2 249 0x0080 //RX_FDDRC_BAND_MARGIN_3 250 0x0007 //RX_FDDRC_BLOCK_EXP 251 0x5000 //RX_FDDRC_THRD_2_0 252 0x5000 //RX_FDDRC_THRD_2_1 253 0x5000 //RX_FDDRC_THRD_2_2 254 0x5000 //RX_FDDRC_THRD_2_3 255 0x6400 //RX_FDDRC_THRD_3_0 256 0x6400 //RX_FDDRC_THRD_3_1 257 0x6400 //RX_FDDRC_THRD_3_2 258 0x6400 //RX_FDDRC_THRD_3_3 259 0x2000 //RX_FDDRC_SLANT_0_0 260 0x2000 //RX_FDDRC_SLANT_0_1 261 0x2000 //RX_FDDRC_SLANT_0_2 262 0x2000 //RX_FDDRC_SLANT_0_3 263 0x5333 //RX_FDDRC_SLANT_1_0 264 0x5333 //RX_FDDRC_SLANT_1_1 265 0x5333 //RX_FDDRC_SLANT_1_2 266 0x5333 //RX_FDDRC_SLANT_1_3 267 0x0000 //RX_FDDRC_RESRV_0 286 0x0100 //RX_SPK_VOL 287 0x0000 //RX_VOL_RESRV_0