on init
    chown system system /sys/devices/system/cpu/cpufreq/policy0/sched_pixel/lcpi_threshold
    chown system system /sys/devices/system/cpu/cpufreq/policy0/sched_pixel/spc_threshold
    chown system system /sys/devices/system/cpu/cpufreq/policy0/sched_pixel/limit_frequency
    chown system system /sys/devices/system/cpu/cpufreq/policy0/sched_pixel/pmu_limit_enable
    chown system system /sys/devices/system/cpu/cpufreq/policy4/sched_pixel/lcpi_threshold
    chown system system /sys/devices/system/cpu/cpufreq/policy4/sched_pixel/spc_threshold
    chown system system /sys/devices/system/cpu/cpufreq/policy4/sched_pixel/limit_frequency
    chown system system /sys/devices/system/cpu/cpufreq/policy4/sched_pixel/pmu_limit_enable
    chown system system /sys/devices/system/cpu/cpufreq/policy8/sched_pixel/lcpi_threshold
    chown system system /sys/devices/system/cpu/cpufreq/policy8/sched_pixel/spc_threshold
    chown system system /sys/devices/system/cpu/cpufreq/policy8/sched_pixel/limit_frequency
    chown system system /sys/devices/system/cpu/cpufreq/policy8/sched_pixel/pmu_limit_enable

    chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/memlat_cpuidle_state_aware
    chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/memlat_cpuidle_state_aware
    chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/memlat_cpuidle_state_aware
    chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/memlat_cpuidle_state_aware
    chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/memlat_cpuidle_state_aware
    chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/memlat_cpuidle_state_aware
    chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/memlat_cpuidle_state_aware
    chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/memlat_cpuidle_state_aware
    chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu8_memlat@17000010/memlat_cpuidle_state_aware

    # Boot time tuning
    # Set uclamp_min to capacity of little core + 1 to avoid little core
    write /proc/vendor_sched/groups/ta/uclamp_min 221
    write /proc/vendor_sched/groups/ta/prefer_idle 1
    write /proc/vendor_sched/groups/fg/uclamp_min 221
    write /proc/vendor_sched/groups/fg/prefer_idle 1
    write /proc/vendor_sched/groups/sys/uclamp_min 221
    write /proc/vendor_sched/groups/sys/prefer_idle 1

    # governor setting
    write /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor sched_pixel
    write /sys/devices/system/cpu/cpu0/cpufreq/sched_pixel/up_rate_limit_us 500
    write /sys/devices/system/cpu/cpu0/cpufreq/sched_pixel/down_rate_limit_us 5000
    write /sys/devices/system/cpu/cpu0/cpufreq/sched_pixel/down_rate_limit_scale_pow 2
    write /sys/devices/system/cpu/cpu4/cpufreq/scaling_governor sched_pixel
    write /sys/devices/system/cpu/cpu4/cpufreq/sched_pixel/up_rate_limit_us 500
    write /sys/devices/system/cpu/cpu4/cpufreq/sched_pixel/down_rate_limit_us 20000
    write /sys/devices/system/cpu/cpu8/cpufreq/scaling_governor sched_pixel
    write /sys/devices/system/cpu/cpu8/cpufreq/sched_pixel/up_rate_limit_us 500
    write /sys/devices/system/cpu/cpu8/cpufreq/sched_pixel/down_rate_limit_us 20000

    # memlat cpuidle awareness setting
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/memlat_cpuidle_state_aware 2
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/memlat_cpuidle_state_aware 2
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/memlat_cpuidle_state_aware 2
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/memlat_cpuidle_state_aware 2
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/memlat_cpuidle_state_aware 2
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/memlat_cpuidle_state_aware 2
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/memlat_cpuidle_state_aware 2
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/memlat_cpuidle_state_aware 2
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu8_memlat@17000010/memlat_cpuidle_state_aware 2

    # change permissions and default values for camera-daemon cpu controller
    chown system system /dev/cpuctl/camera-daemon/cpu.uclamp.min
    chown system system /dev/cpuctl/camera-daemon/cpu.uclamp.max
    chown root root /dev/cpuctl/camera-daemon/cpu.uclamp.latency_sensitive
    chown system system /dev/cpuctl/camera-daemon/cgroup.procs

    mkdir /dev/cpuset/camera-daemon-high-group
    write /dev/cpuset/camera-daemon-high-group/cpus 0-8
    write /dev/cpuset/camera-daemon-high-group/mems 0
    chown system system /dev/cpuset/camera-daemon-high-group/tasks
    chmod 0664 /dev/cpuset/camera-daemon-high-group/tasks

    mkdir /dev/cpuset/camera-daemon-mid-group
    write /dev/cpuset/camera-daemon-mid-group/cpus 0-8
    write /dev/cpuset/camera-daemon-mid-group/mems 0
    chown system system /dev/cpuset/camera-daemon-mid-group/tasks
    chmod 0664 /dev/cpuset/camera-daemon-mid-group/tasks

    mkdir /dev/cpuset/camera-daemon-mid-high-group
    write /dev/cpuset/camera-daemon-mid-high-group/cpus 0-8
    write /dev/cpuset/camera-daemon-mid-high-group/mems 0
    chown system system /dev/cpuset/camera-daemon-mid-high-group/tasks
    chmod 0664 /dev/cpuset/camera-daemon-mid-high-group/tasks

    # Add memlat governor settings
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/polling_interval 10
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/polling_interval 10
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/polling_interval 10
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/polling_interval 10
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/polling_interval 10
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/polling_interval 10
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/polling_interval 10
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/polling_interval 10
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu8_memlat@17000010/polling_interval 10
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/mem_latency/ratio_ceil 1800
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/mem_latency/ratio_ceil 1800
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/mem_latency/ratio_ceil 1800
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/mem_latency/ratio_ceil 1800
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/mem_latency/ratio_ceil 3700
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/mem_latency/ratio_ceil 3700
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/mem_latency/ratio_ceil 3700
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/mem_latency/ratio_ceil 3700
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu8_memlat@17000010/mem_latency/ratio_ceil 3400
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/mem_latency/stall_floor 3000
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/mem_latency/stall_floor 3000
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/mem_latency/stall_floor 3000
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/mem_latency/stall_floor 3000
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/mem_latency/stall_floor 2400
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/mem_latency/stall_floor 2400
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/mem_latency/stall_floor 2400
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/mem_latency/stall_floor 2400
    write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu8_memlat@17000010/mem_latency/stall_floor 500

on zygote-start
    # For PixelLogger configuration file.
    chmod 0771 /data/vendor/wifi
    write /proc/vendor_sched/groups/ta/uclamp_min 1
    write /proc/vendor_sched/groups/fg/uclamp_min 0
    write /proc/vendor_sched/groups/sys/uclamp_min 0
    write /proc/vendor_sched/groups/ta/preferred_idle_mask_low 0x3f
    write /proc/vendor_sched/groups/ta/preferred_idle_mask_mid 0x1f0
    write /proc/vendor_sched/groups/ta/preferred_idle_mask_high 0x1f0
    write /proc/vendor_sched/groups/ta/prefer_idle 1
    write /proc/vendor_sched/groups/fg/preferred_idle_mask_low 0x3f
    write /proc/vendor_sched/groups/fg/preferred_idle_mask_mid 0x1f0
    write /proc/vendor_sched/groups/fg/preferred_idle_mask_high 0x1f0
    write /proc/vendor_sched/groups/fg/prefer_idle 1
    write /proc/vendor_sched/groups/sys/preferred_idle_mask_low 0x3f
    write /proc/vendor_sched/groups/sys/preferred_idle_mask_mid 0x1f0
    write /proc/vendor_sched/groups/sys/preferred_idle_mask_high 0x1f0
    write /proc/vendor_sched/groups/sys/prefer_idle 1

    write /proc/vendor_sched/groups/bg/ug 0
    write /proc/vendor_sched/groups/sys_bg/ug 0
    write /proc/vendor_sched/groups/ota/ug 0
    write /proc/vendor_sched/groups/dex2oat/ug 1
    write /proc/vendor_sched/groups/ta/ug 2
    write /proc/vendor_sched/groups/fg/ug 2
    write /proc/vendor_sched/groups/nnapi/ug 2
    write /proc/vendor_sched/groups/rt/ug 2
    write /proc/vendor_sched/groups/sf/ug 2
    write /proc/vendor_sched/groups/sys/ug 2

on property:init.svc.vendor.charger=running
    stop keymaster-4-0

    setprop sys.usb.configfs 1
    setprop vendor.setup.power 1

    # keep one little and one big
    write /sys/devices/system/cpu/cpu1/online 0
    write /sys/devices/system/cpu/cpu2/online 0
    write /sys/devices/system/cpu/cpu3/online 0
    write /sys/devices/system/cpu/cpu4/online 0
    write /sys/devices/system/cpu/cpu5/online 0
    write /sys/devices/system/cpu/cpu6/online 0
    write /sys/devices/system/cpu/cpu7/online 0

on property:sys.boot_completed=1
    # Set kswapd affinity
    write /sys/kernel/vendor_mm/kswapd_cpu_affinity ff

    # Restore prefer idle
    write /proc/vendor_sched/groups/ta/preferred_idle_mask_low 0x1ff
    write /proc/vendor_sched/groups/ta/preferred_idle_mask_mid 0x1ff
    write /proc/vendor_sched/groups/ta/preferred_idle_mask_high 0x1ff
    write /proc/vendor_sched/groups/fg/preferred_idle_mask_low 0x1ff
    write /proc/vendor_sched/groups/fg/preferred_idle_mask_mid 0x1ff
    write /proc/vendor_sched/groups/fg/preferred_idle_mask_high 0x1ff
    write /proc/vendor_sched/groups/sys/preferred_idle_mask_low 0x1ff
    write /proc/vendor_sched/groups/sys/preferred_idle_mask_mid 0x1ff
    write /proc/vendor_sched/groups/sys/preferred_idle_mask_high 0x1ff

    # Setup final cpuset
    write /dev/cpuset/top-app/cpus 0-8
    write /dev/cpuset/foreground/cpus 0-7
    write /dev/cpuset/background/cpus 0-3
    write /dev/cpuset/system-background/cpus 0-3
    write /dev/cpuset/restricted/cpus 0-3
    write /dev/cpuset/camera-daemon/cpus 0-8
    setprop vendor.powerhal.init 1

    # Set PMU freq limit parameters
    write /sys/devices/system/cpu/cpufreq/policy0/sched_pixel/lcpi_threshold 0
    write /sys/devices/system/cpu/cpufreq/policy0/sched_pixel/spc_threshold 76
    write /sys/devices/system/cpu/cpufreq/policy0/sched_pixel/limit_frequency 1328000
    write /sys/devices/system/cpu/cpufreq/policy4/sched_pixel/lcpi_threshold 0
    write /sys/devices/system/cpu/cpufreq/policy4/sched_pixel/spc_threshold 73
    write /sys/devices/system/cpu/cpufreq/policy4/sched_pixel/limit_frequency 1836000
    write /sys/devices/system/cpu/cpufreq/policy8/sched_pixel/lcpi_threshold 0
    write /sys/devices/system/cpu/cpufreq/policy8/sched_pixel/spc_threshold 68
    write /sys/devices/system/cpu/cpufreq/policy8/sched_pixel/limit_frequency 2363000
    write /proc/vendor_sched/pmu_poll_time 10

    # Disable PMU freq limit
    write /sys/devices/system/cpu/cpufreq/policy0/sched_pixel/pmu_limit_enable 1
    write /sys/devices/system/cpu/cpufreq/policy4/sched_pixel/pmu_limit_enable 1
    write /sys/devices/system/cpu/cpufreq/policy8/sched_pixel/pmu_limit_enable 1
    write /proc/vendor_sched/pmu_poll_enable 0

# MTE
on property:persist.device_config.runtime_native_boot.mode_override=sync
    # Per-core mode overrides.
    # Little Cores: sync
    write /sys/devices/system/cpu/cpu0/mte_tcf_preferred sync
    write /sys/devices/system/cpu/cpu1/mte_tcf_preferred sync
    write /sys/devices/system/cpu/cpu2/mte_tcf_preferred sync
    write /sys/devices/system/cpu/cpu3/mte_tcf_preferred sync
    # Mid Cores: sync
    write /sys/devices/system/cpu/cpu4/mte_tcf_preferred sync
    write /sys/devices/system/cpu/cpu5/mte_tcf_preferred sync
    write /sys/devices/system/cpu/cpu6/mte_tcf_preferred sync
    write /sys/devices/system/cpu/cpu7/mte_tcf_preferred sync
    # Big Core: sync mode performance is prohibitively bad
    write /sys/devices/system/cpu/cpu8/mte_tcf_preferred asymm

on property:persist.device_config.runtime_native_boot.mode_override=asymm
    # Per-core mode overrides.
    write /sys/devices/system/cpu/cpu0/mte_tcf_preferred asymm
    write /sys/devices/system/cpu/cpu1/mte_tcf_preferred asymm
    write /sys/devices/system/cpu/cpu2/mte_tcf_preferred asymm
    write /sys/devices/system/cpu/cpu3/mte_tcf_preferred asymm
    write /sys/devices/system/cpu/cpu4/mte_tcf_preferred asymm
    write /sys/devices/system/cpu/cpu5/mte_tcf_preferred asymm
    write /sys/devices/system/cpu/cpu6/mte_tcf_preferred asymm
    write /sys/devices/system/cpu/cpu7/mte_tcf_preferred asymm
    write /sys/devices/system/cpu/cpu8/mte_tcf_preferred asymm