ELF*@@;8FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"FFF"FF"FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""""F"FF""FF"F"FFFFFFFFFFFFFFFFFF"FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"""""""""""""""""""""""""""""""""""""""""F"F""""FF""""""""FFFF""""""""""""""""""""FF""""""FFFFFF""""""""""""FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF  4 NV V  V V + V   V 9 9 0i   D DO '  f   D     q  q   qq      qqqqqq  qq qK    q        qqw       <<<<<<           ' t     <g<<<<<<<<<!            }<<<<<<<<W B        F                                  F  (  i b +     d y     u                                     3333333&3333333333333333333333333333q + G + +      3&33+  y  / y b /    2 t n       C   c    "  0 D      L B  B /  B  @  B !    g / a s   W \     /     a   "    % "    %  % % C % / @ L g {    A      k    Q (                   *******     *     *                                   $T1T7`T 2lE    pingpong_0$pingpong_1$"pnum=%d fmt=%x rt=%d fl=%d lut=0x%llx lut_usage=%d", REC->pnum, REC->fmt, REC->rt, REC->fl, REC->lut, REC->lut_usage"pnum=%d fmt=%x mode=%d luts[0x%x, 0x%x]", REC->pnum, REC->fmt, REC->mode, REC->danger_lut, REC->safe_lut"pnum:%d xin_id:%d ot:%d vbif:%d", REC->pnum, REC->xin_id, REC->rd_lim, REC->vbif_idx"crtc:%d", REC->crtc_id"%s|%d|%s", REC->trace_begin ? "B" : "E", REC->pid, __get_str(trace_name)"%d|%s|%d", REC->pid, __get_str(counter_name), REC->value"crtc=%d bw_ctl=%llu clk_rate=%u stop_req=%d u_bus=%d u_clk=%d", REC->crtc, REC->bw_ctl, REC->core_clk_rate, REC->stop_req, REC->update_bus, REC->update_clk"id=%u, intr=%d, irq=%d", REC->drm_id, REC->intr_idx, REC->irq_idx"id=%u, intr=%d, irq=%d, pp=%d, atomic_cnt=%d", REC->drm_id, REC->intr_idx, REC->irq_idx, REC->pp_idx, REC->atomic_cnt"id=%u", REC->drm_id"id=%u, mode=%dx%d", REC->drm_id, REC->hdisplay, REC->vdisplay"id=%u, val=%d", REC->drm_id, REC->val"id=%u, flags=%u", REC->drm_id, REC->flags"id=%u, enable=%s", REC->drm_id, REC->enable ? "true" : "false""%s: id:%u, sw_event:%d, idle_pc_supported:%s, rc_state:%d", __get_str(stage_str), REC->drm_id, REC->sw_event, REC->idle_pc_supported ? "true" : "false", REC->rc_state"id=%u, event=%u, intf=%d", REC->drm_id, REC->event, REC->intf_idx"id=%u, idx=%u, frame_busy_mask=%lx", REC->drm_id, REC->idx, REC->frame_busy_mask"id=%u, intf_idx=%d, pending_kickoff_cnt=%d ctl_idx=%d extra_flush_bits=0x%x pending_flush_ret=0x%x", REC->drm_id, REC->intf_idx, REC->pending_kickoff_cnt, REC->ctl_idx, REC->extra_flush_bits, REC->pending_flush_ret"id=%u, time=%lld", REC->drm_id, ktime_to_ms(REC->time)"id=%u, event=%u", REC->drm_id, REC->event"id=%u, irq_idx=%d, rc=%d, time=%lld, expected=%lld cnt=%d", REC->drm_id, REC->irq_idx, REC->rc, REC->time, REC->expected_time, REC->atomic_cnt"id=%u, pp=%d, enable=%s, refcnt=%d", REC->drm_id, REC->pp, REC->enable ? "true" : "false", REC->refcnt"id=%u, pp=%d, new_count=%d, event=%u", REC->drm_id, REC->pp, REC->new_count, REC->event"id=%u, pp=%d, timeout_count=%d, kickoff_count=%d, event=%u", REC->drm_id, REC->pp, REC->timeout_count, REC->kickoff_count, REC->event"id=%u, intf_idx=%d", REC->drm_id, REC->intf_idx"id=%u, intf_idx=%d enable=%s refcnt=%d", REC->drm_id, REC->intf_idx, REC->enable ? "true" : "false", REC->drm_id"crtc_id:%u plane_id:%u fb_id:%u src:%d.%06ux%d.%06u%+d.%06u%+d.%06u dst:%dx%d%+d%+d stage_idx:%u stage:%d, sspp:%d multirect_index:%d multirect_mode:%u pix_format:%u modifier:%llu", REC->crtc_id, REC->plane_id, REC->fb_id, drm_rect_width(&REC->src_rect) >> 16, ((drm_rect_width(&REC->src_rect) & 0xffff) * 15625) >> 10, drm_rect_height(&REC->src_rect) >> 16, ((drm_rect_height(&REC->src_rect) & 0xffff) * 15625) >> 10, (&REC->src_rect)->x1 >> 16, (((&REC->src_rect)->x1 & 0xffff) * 15625) >> 10, (&REC->src_rect)->y1 >> 16, (((&REC->src_rect)->y1 & 0xffff) * 15625) >> 10, drm_rect_width(&REC->dst_rect), drm_rect_height(&REC->dst_rect), (&REC->dst_rect)->x1, (&REC->dst_rect)->y1, REC->stage_idx, REC->stage, REC->sspp, REC->multirect_idx, REC->multirect_mode, REC->pixel_format, REC->modifier"id:%u mixer:%d bounds:%dx%d%+d%+d", REC->drm_id, REC->mixer, drm_rect_width(&REC->bounds), drm_rect_height(&REC->bounds), (&REC->bounds)->x1, (&REC->bounds)->y1"id:%u encoder:%u enable:%s state{enabled:%s}", REC->drm_id, REC->enc_id, REC->enable ? "true" : "false", REC->enabled ? "true" : "false""id:%u enable:%s state{enabled:%s}", REC->drm_id, REC->enable ? "true" : "false", REC->enabled ? "true" : "false""id:%u frame_pending:%d", REC->drm_id, REC->frame_pendingH"index:%d layout:{%ux%u @ [%u/%u, %u/%u, %u/%u, %u/%u]} multirect_index:%d", REC->index, REC->layout.width, REC->layout.height, REC->layout.plane_addr[0], REC->layout.plane_size[0], REC->layout.plane_addr[1], REC->layout.plane_size[1], REC->layout.plane_addr[2], REC->layout.plane_size[2], REC->layout.plane_addr[3], REC->layout.plane_size[3], REC->multirect_index"id:%u is_virtual:%s multirect_mode:%u", REC->drm_id, REC->is_virtual ? "true" : "false", REC->multirect_mode"id:%d enc_id:%u", REC->id, REC->enc_id"id:%d enc_id:%u pp_id:%u", REC->id, REC->enc_id, REC->pp_id"index:%d xin_id:%u", REC->index, REC->xin_id"pp:%d cfg:%u", REC->pp, REC->cfg"irq_idx:%d callback:%pK", REC->irq_idx, REC->callback"dev:%s stop_req:%s clk_rate:%llu", __get_str(dev_name), REC->stop_req ? "true" : "false", REC->clk_rate"new=%x existing=%x", REC->new_bits, REC->pending_mask"pending_mask=%x CTL_FLUSH=%x", REC->pending_mask, REC->ctl_flush"async=%d crtc_mask=%x", REC->async, REC->crtc_mask"async=%d crtc_mask=%x", REC->async, REC->crtc_mask"crtc_mask=%x", REC->crtc_mask"crtc_mask=%x", REC->crtc_mask"crtc_mask=%x", REC->crtc_mask"crtc_mask=%x", REC->crtc_mask"crtc_mask=%x", REC->crtc_mask                                                2 "id=%d pid=%d ring=%d bos=%d cmds=%d", REC->id, REC->pid, REC->ringid, REC->nr_bos, REC->nr_cmds"id=%d pid=%d ring=%d:%d ticks=%lld", REC->id, REC->pid, REC->ringid, REC->seqno, REC->ticks"id=%d pid=%d ring=%d:%d elapsed=%lld ns mhz=%lld start=%lld end=%lld", REC->id, REC->pid, REC->ringid, REC->seqno, REC->elapsed, REC->clock, REC->start_ticks, REC->end_ticks"new_freq=%u", REC->freq"freq=%u, perf_index=%u", REC->freq, REC->perf_index"Purging %u bytes", REC->bytes"Evicting %u bytes", REC->bytes"Purging %u vmaps", REC->unmapped"%u", REC->dummy"%u", REC->dummy@DD044x||   f _    BC x~% jrD 8 5 RY `~ &2?AEM69<@; vxHek 3P \>A UDh k `lI I Yu#%)/;b BNPWbgkos~HM$&c%ls}j ) - !#MU[`bQ%4!#T   v  l z  ijk7X . h$ 0$   -H<  C)^ O`)+& }      B ?[i|   include/drm/drm_modeset_lock.hUnknown GPU revision: %u.%u.%u.%u - dir=%s iova: 0x%016llx IO:R %08x %08x loading PFP ucode version: %u a5xx_rbbm_err_irqme readfailed to read speed-bin. Some OPPs may not be supported by hardware *ERROR* Invalid non-legacy GMU request %s HDMI_HPDhpd gpio tells us: %d *ERROR* failed to create eDP bridge: %d completion lvl-vdd3%s: Training 2 failedlvds-vdda*ERROR* Width up scaling exceeds limits! %s[%d]: request %d SMP blocks dpu_core_irq_readdpu_core_irq_uninstallintf_mode: %d 3[drm:%s:%d] [dpu error]> 2 planes @ stage %d on left lm %d, op_mode 0x%X, ctl %d, flush mask 0x%x 3[drm:%s:%d] [dpu error]enc%d intf%d pp%d failed to register IRQ callback for %s 3[drm:%s:%d] [dpu error]crtc/crtc state object is NULL enc%d cur_line=%u vtotal=%u time_to_vsync=%u, cur_time=%lld, wakeup_time=%lld dpu_encoder_setup_displayenc%d intf%d created dpu_encoder_phys_cmd_prepare_for_kickoffpp_done_irqdrm_mode_to_intf_timing_paramswait disable failed: id:%u intf:%d ret:%d invalid arguments INTF_CONFIG2INTF_UNDERFLOW_COLORPP_START_POSPP_TEAR_CHECK_ENwd_ctl2QSEED3_PHASE_STEP_UV_H + scaler_offsetBid=%u, val=%d stage_idxmultirect_modecfg3[drm:%s:%d] [dpu error]failed to init vbif %d: %d 3[drm:%s:%d] [dpu error]clock enable failed rc:%d handle irq fail: irq=%lu rc=%d %s created for pipe:%u id:%u virtual:%u disp_snapshotgpuuser 0x%08llx *ERROR* kms hw init failed: %d msm_gem_fault/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/msm_gem_shrinker.c4*** fault: iova=%16lx, flags=%d A6XX_SP_LB_5_DATAA6XX_HLSQ_PWR_REST_TAGCLUSTER_SP_PSA6XX_DBGBUS_SP_0A6XX_DBGBUS_SP_1 count: %d - debugbus-block: failed to disable DP controller setting rate=%lu on clk=%s dp_ctrl_link_train_1failed to initialize catalog, rc = %d Disconnected sink_request: %d device tree parsing failed no test requested rate=%lu tx_l%d_tx_band = 0x%x tx_l%d_vmode_ctrl1 = 0x%x 3%s: key exchange failed %d 3%s: AKSV QFPROM doesn't have 20 1's, 20 0's *ERROR* failed to modeset init host: %d msm_dsicore_mmss3%s: Failed to set rate src clk, %d dsi%d_ctrl3%s: unable to enable ahb_clk 3%s: read data does not match with rx_buf len %zu dsi%d_regmsm_dsi_phyA320a540_zap.mdtA640 rptr: %d RBBM_INT: %08X %s: timeout waiting for GPU to idle! %s: zap-shader resume failed: %d - { offset: 0x%04x, value: 0x%08x } *ERROR* Could not allocate SQE ucode: %d a6xx_gmu_irq*ERROR* Level %u not found in the RPMh list *ERROR* Available levels: *ERROR* unknown hdmi_cfg: %pOFn video: power_on=%d, pixclock=%lu hdmi_phy*ERROR* failed to get phy clock: %s (%d) /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/edp/edp.c&aux->msg_mutex3%s:failed to init phy 3%s: Could not get lvl-vdd reg, ret = %d edp_regulator_enable3Failed to enable lvl-vdd reg regulator, %d3%s: Failed to set rate aux clk 3%s: PHY NOT ready pixclock=%lu *ERROR* failed to enable lcdc_clk: %d *ERROR* failed to initialize LVDS connector VG3*ERROR* Only pair booked CTLs disskipping %s %s: release from plane %s release %s fix_core_ab_votecrtc_commitcrtc%u3[drm:%s:%d] [dpu error]source split at stage: %d. invalid yoff/height: left: %dx%d%+d%+d right: %dx%d%+d%+d /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.cirq timeout id=%u, intr=%d, irq=%d, pp=%d, atomic_cnt=%d errorencoder_underrun_callback3[drm:%s:%d] [dpu error]invalid encoder or kms mismatch in subsample vs dimensions 3invalid IRQ index: [%d] SSPP_SW_PIX_EXT_C3_LR + idxcsc_reg_off + 0x3cunsigned intid=%u, flags=%u indexenum dpu_sspp_multirect_indexpp:%d cfg:%u dev_namenew=%x existing=%x 3[drm:%s:%d] [dpu error]mdp register memory map failed: %d pingpong_%dplane%d R0: %d - %d xin_idplane%d Check plane state failed (%d) crtc=%u*ERROR* failed to initialize vblank MSM_GEM_NEWMSM_GEM_SUBMIT*ERROR* framebuffer init failed: %d msm_gem_evict purgeableShared !msm_obj->dontneedadd_vmamemptrs--- /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/msm_rd.cmeqCP_UCODE_DBG_DATAA6XX_HLSQ_ICB_CVS_CB_BASE_TAGA6XX_HLSQ_FRONTEND_METAA6XX_DBGBUS_A2D&aux->mutexselect: %#x, acr_ctrl: %#x sink: p|v=0x%x link training #2 successful clock recovery not done, adjusting vx px Info: n_sym = %d, num_of_tus = %d Event thread create failed invalid params adjusted: v_level=%d, p_level=%d test_audio_period_ch_8 = 0x%x dpcd read failed, rlen=%zd 4[drm] Invalid property %s, default max DP lanes = %d fail to enable clks: %s. err=%d failed to get audio data 6%s: hdcp authentication canceled HDCP_DDC_STATUS=0x%x, FAIL=%d, NACK0=%d 3%s: Read %s failed msm_dsi_host_initdsi_isr3%s: failed to set pinctrl default state, %d 3%s: cannot get interface clock %s: Version %x:%x 3%s: packet size is too big dsi_pll%s: pll init failed: %d, need separate pll clk driver returning vco rate = %lu dsi_14nm_phy_enable*ERROR* %s: set pll usecase failed, %d Using legacy qcom,chipid binding! - iova: 0x%016llx qcom,gpu-freqRBBM | PFP master split | status=0x%X a630_sqe.fwTPrscchfi*ERROR* failed to get i2c: %d %u Hz, %d bit, %d channels master_ifacepixel clock %d(kHz) not supported 3%s: cannot get panel-hpd-gpios, %d DONE *ERROR* failed to get lvds-vccs-3p3v: %d qcom,lcdc-align-lsb*ERROR* unexpected MDP minor revision: v%d.%d *ERROR* unsupported configuration%s: set mode: "%s": %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x qcom,mdssmdp_physVIG1dpu_core_irq_unregister_callback3[drm:%s:%d] [dpu error]crtc%d ts:%lld received panel dead event crtc:%d width:%d height:%d no encoder found for crtc %d dpu_encoder_helper_register_irqdpu_encoder_trigger_kickoff_pendingdpu_encoder_prepare_commit3[drm:%s:%d] [dpu error]enc%d unknown wait event %d 3[drm:%s:%d] [dpu error]line time calculation is 0 _dpu_encoder_trigger_flush3[drm:%s:%d] [dpu error]invalid crtc index 3[drm:%s:%d] [dpu error]Failed to get global statedpu_encoder_phys_cmd_tearcheck_configctl_start_irqunderrunenc%d intf%d enabling mode: enc%d intf%d prog fetch is not needed, large vbp+vsw id:%u enable=%d/%d INTF_VSYNC_PULSE_WIDTH_F0PP_SYNC_CONFIG_VSYNCunpack_pat_off + idxSSPP_SRC_YSTRIDE0 + idxQSEED3_PHASE_INIT + scaler_offsetsw_eventid=%u, pp=%d, new_count=%d, event=%u stagepending_mask=%x CTL_FLUSH=%x 6[drm:%s:%d] dpu hardware revision:0x%x &pdpu->lockdpu_rm_init_dpu_rm_make_reservation_dpu_vbif_wait_for_xin_haltmsm_obj->vmap_count < 1!is_vunmapable(msm_obj)mark_purgeable!msm_gem_is_locked(&msm_obj->base)rdring%didelapsed%llx num_lanes = %u 0CP_SQE_STATA6XX_SP_LB_0_DATAA6XX_HLSQ_CVS_MISC_RAMA6XX_DBGBUS_RB_0A6XX_DBGBUS_VFD_0Before, core_inited=%d power_on=%d After, sink_count=%d is_connected=%d core_inited=%d power_on=%d px: 0=%d, 1=%d, 2=%d, 3=%d SET NEW RESOLUTION: failed to enable regulators, %d msm_hdmi_hdcp_wait_key_an_ready3%s: bstatus error 3%s: Write KSV fifo timedoutmsm_hdmi_hdcp_auth_part2_write_ksv_fifoBLOCK_DONE 3%s: can't get src clock parent. ret=%d 3%s: Failed to set rate pixel clk, %d 3%s: Failed to enable byte intf clk 3%s: Failed to set rate byte clk, %d 3%s: can't find byte_clk clock. ret=%d 3%s: power on host %d failed, %d div_frac_start = %x *ERROR* PLL(%d) lock failed dsi%d_pll_bit_clkdrivers/gpu/drm/msm/adreno/a3xx_gpu.cdrivers/gpu/drm/msm/adreno/a4xx_gpu.cdrivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.cdrivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.cdrivers/gpu/drm/msm/disp/mdp5/mdp5_kms.cdrivers/gpu/drm/msm/msm_iommu.cA540A680loaded %s from legacy location fault-info: No memory protection without MMU CP | DMA error me writeiommus*ERROR* unknown GPU, add it to a6xx_ucode_check_version()!! *ERROR* failed to power off SPTPRAC: 0x%x HFI_H2F_MSG_PERF_TABLEHFI_H2F_MSG_STARTconnect status = %d %s: p|v=0x%x 3%s: Failed to enable aux clk 3%s: Failed to enable link clk *ERROR* failed to configure lcdc_clk: %d msm8x74 ctl=%d enname inuse plane ---- ----- ----- 3[drm:%s:%d] [dpu error][%pS] invalid irq_idx=%d clk:%llu mode %d min_mdp_clk %llu min_bus_vote %llu irq not triggered id=%u, intr=%d, irq=%d, pp=%d, atomic_cnt=%d dpu_encoder_register_frame_event_callbackdpu_encoder_get_intf_modedpu_encoder_resource_control3[drm:%s:%d] [dpu error]enc%d failed to init cmd enc: %ld 3[drm:%s:%d] [dpu error]enc%d intf%d ctl start interrupt wait failed failed wait_for_idle: id:%u ret:%d intf:%d 3[drm:%s:%d] [dpu error]invalid arg(s), enc %d PP_SYNC_WRCOUNTbase + PP_DITHER_BITDEPTHSSPP_SRC3_ADDR + idxSSPP_SAFE_LUT + idxbase + PCC_GREEN_B_OFFQSEED3_DST_SIZE + scaler_offsetQSEED3_OP_MODE + scaler_offsetQSEED3_DE_ADJUST_DATA_1 + offsetreg_off(null)eventframe_pending3[drm:%s:%d] [dpu error]failed to init kms, ret=%d _dpu_kms_initialize_dsisafe_statusplane%d FB[%u] %d.%06ux%d.%06u%+d.%06u%+d.%06u->crtc%u %dx%d%+d%+d, %4.4s ubwc %d 3[drm:%s] [dpu error]failed to get dspp on lm %d 3[drm:%s:%d] [dpu error]invalid arguments vbif %d *ERROR* failed to find MDSS MDP node %d: offset=%d pitch=%d, obj: *ERROR* Invalid madv state: %u vs %u nr_cmdsid=%d pid=%d ring=%d:%d ticks=%lld roq refresh rate = %d A6XX_HLSQ_CHUNK_CVS_RAMDP_CONFIGURATION_CTRL=0x%x No valid test pattern requested: %#x %s: enabled tpg sdp_cfg = 0x%x Failed to disable link clocks. ret=%d Before, phy=%x init_count=%d power_on=%d sink: pattern=%x invalid dev audio comp timeout failed to parse test_v_start(DP_TEST_V_START_HI) Requested: rate = 0x%x, lane count = 0x%x no clocks are defined %s clocks for %s DP_CTRL_PMdp_power_regulator_initPHY is %sready hdcp inactive or no aksv. returning 3%s: write ksv fifo failed %d R0'=%02x%02x 3%s: BSTATUS read failed 3%s: No downstream devices *ERROR* failed to create dsi bridge: %d dsi_link_clk_set_rate_6gdsi_link_clk_enable_6g- &x->waitintr=%x enable=%d *ERROR* DSI PLL lock failed DSI PLL%d rate=%lu, parent's=%lu drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.ca300_pm4.fwA420firmware-nameqcom,gpu-pwrlevels%s: %08x pfp writearm,mmu-500status: %08x UNKNOWNLRZgmu_pdc_seq*ERROR* failed to match fw block (addr=%.8x size=%d data[0]=%.8x) Enableqfprom_physicalhpd-5vhdmi-mux3%s: edid read fail msm_edp_ctrl_get_panel_infoalready off %s: intf_sel=%08x bus_clkDMA_P*ERROR* failed to construct plane for VG%d *ERROR* Increase static pool size to at least %d %s: flush=%08x LM1threshold_highvblank fps:%lld count:%u total:%llums total_framecount:%llu unreg cb fail id=%u, intr=%d, irq=%d ret=%dencoder_kickoffctl_startenc%d intf%d tc %d vsync_clk_speed_hz %u vtotal %u vrefresh %u enc%d intf%d v_front_porch %u v_back_porch %u vsync_pulse_width %u enc%d intf%d wc_lines %u needed_vfp_lines %u actual_vfp_lines %u 3[drm:%s:%d] [dpu error]already disabled CTL_LAYER(mixer_id)CTL_LAYER_EXT3(lm)invalid ctx %pK pcc base 0x%x disable pcc feature base + PCC_GREEN_R_OFFSSPP_SPAREMDP_VSYNC_SELQSEED3_SRC_SIZE_Y_RGB_A + scaler_offsetcsc_reg_off + 0xcVBIF_WRITE_GATHER_EN3[drm:%s:%d] [dpu error]vbif register memory map failed: %d danger_statusmdssdpu_plane_initEnabling danger: plane%d invalid dest rect %dx%d%+d%+d 3[drm:%s] [dpu error]failed pingpong object creation: err %d 3[drm:%s] [dpu error]skip dspp %d with invalid id _dpu_rm_reserve_intf3[drm:%s] [dpu error]couldn't find intf id %d dynamic_ot_wr_%d_pps_dpu_vbif_get_ot_limit/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/msm_atomic.cMSM_SUBMITQUEUE_CLOSE!msm_gem_is_locked(obj)msm_gem_purgemsm_gem_active_putinvalid offset %u at reloc %u comm: %s cmdline: %s dp_panel max_pclk_khz = %d shader-blocks: A6XX_SP_LB_1_DATAA6XX_SP_LB_3_DATAA6XX_DBGBUS_LARCA6XX_DBGBUS_CX%s: invalid msg: size(%zu), request(%x) 6[drm-dp] %s: %08x: %08x %08x %08x %08x4[drm-dp] %s: PUSH_IDLE pattern timedout successUnabled to start pixel clocks. ret=%d invalid data present=%#x sink_count=%d invalid link video pattern = 0x%x hdcp irq %x 3%s: receive r0 failed %d 3%s: wait ksv fifo ready failed %d bus3%s: Failed to enable dsi src clk 3%s: Read cmd Tx failed, too short: %d msm_dsi_host_power_onfailed to find data lane mapping, using default 3%s: failed to add cmd type = 0x%x 3%s: cmd dma tx failed, type=0x%x, data0=0x%x, ret=%d len=%d 3%s: dsi%d already registered dsi_mgr_bridge_pre_enableqcom,sync-dual-dsiDSI PLL is %slocked, %sready A430A530compatiblerptr: %d a6xx_hfi_irqhpd-gdsc3no eDP device edp_video_ready panel-en3%s: Failed to enable pixel clk *ERROR* unknown bpp: %d *ERROR* failed to get axi_clk %s: disabled! *ERROR* couldn't assign mixers %d %s: assign to plane %s for caps %x LM0 normalized_zpos=%u final threshold bw limit = %d 3[drm:%s:%d] [dpu error]invalid crtc index[%d] frame done wait timed out, ret:%d &dpu_enc->enc_lock3[drm:%s:%d] [dpu error]invalid mdptop _dpu_encoder_calculate_linetimeenc%d enable:%d h_tile_instance %d = %d, split_role %d 3[drm:%s:%d] [dpu error]enc%d dpu resource control failed: %d 3[drm:%s:%d] [dpu error]enc%d no intf block assigned at idx: %d 3[drm:%s:%d] [dpu error]failed to allocate dpu_encoder_phys_cmd_enable_helperenc%d intf%d created intf idx:%d 3[drm:%s:%d] [dpu error]failed to create encoder 3[drm:%s:%d] [dpu error]vstart:%d,vend:%d,vtot:%d,vdisplay:%d dpu_get_dpu_format_extinvalid pointer plane %u expected pitch %u, fb %u 3hw recovery is not complete for ctl:%d INTF_VSYNC_PERIOD_F0SSPP_SRC1_ADDR + idx[%s:0x%X] <= 0x%X QSEED3_PHASE_INIT_UV_V + scaler_offset3%pS->%s: %s failed. rc=%d *ERROR* Failed to get clock name for %d danger_lutcrtc:%d hdisplayrcstruct dpu_hw_fmt_layoutREG_DMA is not defined_dpu_kms_drm_obj_initdisable_danger3[drm:%s] [dpu error]intf id %d already reserved msm_obj->pin_count < 0msm_obj->madv > madvis_active*ERROR* invalid cache flag: %x invalid flags: %x perf%u /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c v_level = %d A6XX_SP_LB_4_DATACLUSTER_GRASA6XX_DBGBUS_LRZA6XX_DBGBUS_DBGCTU: valid_boundary_link: %d hpd_state=%d sink_request=%d failed to get DP sink modes, rc=%d sampling rate (0x%x) greater than max (0x%x) ctrlDP_STREAM_PMinvalid power_data com_pll_cctrl_mode0 = 0x%x 3%s: verify r0 failed %d Before: HDMI_DDC_SW_STATUS=0x%08x 3%s: Wait An timedoutdsi probed=%p dsi host already off dsi_host_parse_dtdsi_mgr_bridge_disablepingpong_tearcheck_setup*ERROR* vsync_clk round rate failed %ld 3A512qcom/%srb %d: fence: %d/%d CP_INT: %08X *ERROR* The GMU did not go into slumber core-vccpower down *ERROR* failed to enable regulator: %s (%d) 3%s:regulator init fail *ERROR* failed to get lvds-vdda: %d msm8x94%s: x=%d, y=%d roi_w=%d roi_h=%d src_x=%d src_y=%d *ERROR* failed to construct plane %d (%d) MDP5 version v%d.%dTOTAL: %d (of %d) RGB0DMA1CURSOR03[drm:%s:%d] [dpu error]crtc%d failed performance check %d 3[drm:%s:%d] [dpu error]non-contiguous coordinates for src split. stage: %d left: %dx%d%+d%+d right: %dx%d%+d%+d kickoffdpu_encoder_frame_done_timeoutenc%d intf%d invalid - vsync_hz %u vsync_irqprogrammable_fetch_get_num_linesNV12/5/1/1.25 AB24/5/1/1.25 XB24/5/1/1.25QSEED3_COEF_LUT_CTRL + offsetmsm_dss_get_clk*ERROR* Failed to set clock defaults %d 3[drm:%s:%d] [dpu error]drm device node invalid crtc=%d bw_ctl=%llu clk_rate=%u stop_req=%d u_bus=%d u_clk=%d id=%u, intr=%d, irq=%d, pp=%d, atomic_cnt=%d ktime_tcrtc_id:%u plane_id:%u fb_id:%u src:%d.%06ux%d.%06u%+d.%06u%+d.%06u dst:%dx%d%+d%+d stage_idx:%u stage:%d, sspp:%d multirect_index:%d multirect_mode:%u pix_format:%u modifier:%llu ctl_flush[%x]3[drm:%s:%d] [dpu error]rm init failed: %d 3[dpu error]failed to add irq_domain /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c3[drm:%s:%d] [dpu error]invalid vbif %d gem20130625MSM_GEM_CPU_FINIPurgeable: %4d objects, %9zu bytes mmap_offset(msm_obj->madv != 2) && msm_obj->sgtpriv->shrinkable_count < 0gpu_reg: %p vddcxmsm_dp_test_data active_low = %dx%d 1A6XX_HLSQ_CHUNK_CPS_RAM_TAGA6XX_HLSQ_GFX_CPS_CONST_RAM_TAGbuf size greater than allowed size of 128 bytes pattern: %#x READY%s: test->0x%x *ERROR* max v_level reached failed to read link video pattern. rlen=%zd failed to parse test_h_width(DP_TEST_H_WIDTH_HI) Invalid: link rate = 0x%x,lane count = 0x%x %pS->%s: ioremap failed Header Byte 3: value = 0x%x, parity_byte = 0x%x pix_clk: %lu com_hsclk_sel = 0x%x 6%s: msleep is canceled by event %d 3%s:An/Aksv write failed Start DDC read HDCP REAUTH WORK dsi_ctrl4%s:Invalid response cmd 3%s: can't find dsi_pixel clock. ret=%d dsi_mgr_bridge_post_disable%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d dsi%d_lane*ERROR* %s: failed to map phy lane base include/linux/thread_info.ha420_pm4.fw*ERROR* failed to load %s: %d IO:region %s 00000000 00020000 *ERROR* timeout waiting for space in ringbuffer %d zap-shaderMH_INT: %08X loading PM4 ucode version: %x /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/adreno/a5xx_preempt.c/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/adreno/a6xx_gmu.cDisablecan't find qfprom resource status=%04x, ctrl=%04x alt_iface*ERROR* failed to create eDP connector: %d edp_aux_transfer3%s:clk init fail exit: connect status=%d Just return edid buffer 3%s: Can't find iface clock, %d *ERROR* failed to get tv_clk fetch config: dmap=%02x, vg=%02x VG4Border Color is enabled mdss_phys*ERROR* failed to construct pipe for %s (%d) %s: assign to right of plane %s for caps %x LM3%s: failed to assign hwpipe(s)! comp-%d (L/R): rpt=%d/%d, ovf=%d/%d, req=%d RGB33[drm:%s:%d] [dpu error]irq_idx=%d still enabled/registered min_llcc_ib3[drm:%s:%d] [dpu error]failed to allocate state mixer:%d ctl:%d width:%d height:%d src_x:%4d src_y:%4d src_w:%4d src_h:%4d dst x:%4d dst_y:%4d dst_w:%4d dst_h:%4d dpu_encoder_vsync_time3[drm:%s:%d] [dpu error]pclk period is 0 id:%d, sw_event:%d,rc:%d-unexpected id:%u, unexpected sw_event: %d 3[drm:%s:%d] [dpu error]enc%d expected 0 num_phys_encs not %d 3[drm:%s:%d] [dpu error]invalid arg(s), drm_enc %d, crtc/conn state %d/%d CTL_PREPARESSPP_SW_PIX_EXT_C1C2_REQ_PIXELS + idxMERGE_3D_MUXwd_load_valueQSEED3_PHASE_INIT_Y_V + scaler_offsetmodetrace_namevdisplayid=%u, time=%lld index:%d xin_id:%u 3[drm:%s:%d] [dpu error]failed to parse clocks, ret=%d mapped mdss address space @%pK 3[drm:%s] [dpu error]skip merge_3d %d with invalid id num_lm: %d num_enc: %d num_intf: %d 3[drm:%s] [dpu error]failed to get pp on lm %d crtc_event:%dinvalid op: %08x *ERROR* unsupported pixel format: %4.4s !is_purgeable(msm_obj)update_inactive*ERROR* %s: hangcheck detected gpu lockup rb %d! pfp capabilities = %lu bpp = %d registers-gmu: A6XX_HLSQ_GFX_CVS_CONST_RAMA6XX_HLSQ_DATAPATH_METACLUSTER_FETU: tu_size_minus1: %d failed to initialize link, rc = %d %d test_audio_period_ch_6 = 0x%x height=%d vporch= %d %d %d lane_count=%d failed to initialize power data %d Header Byte 2: value = 0x%x, parity_byte = 0x%x Unknown link rate HDCP: Off msm_dsi_host_get_phy_clk_req3%s: Invalid version vco=%lld ref=%d dsi%d_pll_by_2_bit_clk3PLL(%d) lock failed a630_zap.mdtringbuffer: kgsl_3d0_reg_memory*ERROR* Unable to load %s ocmempreempt_countersa650_sqe.fwCP | HW fault | status=0x%8.8X UCHEgmu_pdc*ERROR* %u n=%u, cts=%u, multiplier=%u *ERROR* failed to enable hpd clk: %s (%d) msm_edp_ctrl_initedp_gpio_configv=%d p=%d 3%s: Failed to set rate to pixel clk VG1*ERROR* failed to get irq mdp5scale config = %x crtc=%d bw=%llu paths:%d dpu_crtc_duplicate_statecpp[%d]:%u 3[drm:%s:%d] [dpu error]multirect validation failed for planes (%d - %d) id: %u, sw_event:%d, rc in OFF state id:%u ctl %d reset 3[drm:%s:%d] [dpu error]enc%d mode unsupported, phys idx %d CTL_MERGE_3D_FLUSHCTL_TOPCTL_STARTcsc_reg_offQSEED3_DE_SHAPE_CTL + offset3%pS->%s: '%s' get failed. rc=%d rtupdate_busintr_idxMDP : 0x%x 3[drm:%s:%d] [dpu error]failed to prepare framebuffer plane%d invalid source %dx%d%+d%+d plane%d pnum:%d fmt: %4.4s rt:%d fl:%u lut:0x%llx lm %d dspp %d already reserved 3[drm:%s] [dpu error]invalid intf id: %ddpu_vbif_set_qos_remapdynamic_ot_wr_%d_ot_limitmsm_obj->madv != 0 %9s: %s %s seq %llu %s*ERROR* %s: submitted fence: %u num_lanes = %d p_level = %d vdisplay: %d A6XX_TP0_SMO_DATAA6XX_HLSQ_INDIRECT_METAA6XX_DBGBUS_TPL1_1A6XX_DBGBUS_GMU_CX misc settings = 0x%x dp_audio_cfg = 0x%x failed to add DP OPP table Unable to start link clocks. ret=%d Link already setup, return failed to read link rate. rlen=%zd failed to read lane count. rlen=%zd audio pattern type = 0x%x v_porches(back|front|width) = (%d|%d|%d) error reading clock-names %d failed to enable DP core clocks, %d HDMI PLL is %slocked tx_l%d_tx_emp_post1_lvl = 0x%x 3%s:An write failed 3%s: BCAPS read failed dsi_clk_init_v23%s: Failed to set rate byte intf clk, %d failed to request IRQ%u: %d &msm_host->dev_mutex3%s: cannot duplicate mode 3%s: can't find pixel_clk clock. ret=%d 3%s: create packet failed, %d Video test pattern setup done 3%s: invalid id %d %d, %d, %d, %d, %d, %d, %d, %d, %d, %d DSI PLL%d returning vco rate = %lu, dec = %x, frac = %x drivers/gpu/drm/msm/adreno/a6xx_gmu.cdrivers/gpu/drm/msm/msm_drv.cleia_pm4_470.fwa640_gmu.bin retired-fence: %d size: %d Tried to idle a non-current ringbuffer UCHE | Out of bounds access | addr=0x%llX CP | opcode error | possible opcode=0x%8.8X *ERROR* Unable to power on the GPU RSC *ERROR* Unable to power on SPTPRAC: 0x%x GMU firmware fault GMU watchdog expired msm hdmi i2c3%s: edp is NULL! new rate=%d %d *ERROR* failed to get core_clk *ERROR* Height down scaling exceeds limits! *ERROR* unexpected MDP major version: v%d.%d *ERROR* No more CTL available! hwmixer=%s *ERROR* bad cursor size: %dx%d *ERROR* failed to %sable cursor: %d Invalid source size %d.%06ux%d.%06u%+d.%06u%+d.%06u idx:%d irq:%d cb:%d calculated bandwidth=%uk crtc%d commit crtc%d -> enable %d, active %d, skip atomic_check *ERROR* crtc%d event %d overflow 3[drm:%s:%d] [dpu error]time to vsync should not be zero, vtotal=%d beginid:%u, sw_event:%d, rc in %d state 3[drm:%s:%d] [dpu error]invalid pingpong hw _dpu_encoder_trigger_start3[drm:%s:%d] [dpu error]enc%d invalid connector state 3[drm:%s:%d] [dpu error]invalid dev dpu_encoder_phys_cmd_disable3[drm:%s:%d] [dpu error]enc%d intf%d already disabled id:%u pp:%d enable=%s/%d enc%d intf%d tc %d hw_vsync_mode %u vsync_count %u vsync_init_val %u enc%d intf%d /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.cCTL_SW_RESETdpu_intr_set[i].en_offINTF_HSYNC_CTLout_size_off + idxbase + PCC_GREEN_G_OFFwd_ctlQSEED3_PRELOAD + scaler_offsetrd_limcrtcbw_ctlid=%u, intr=%d, irq=%d extra_flush_bitstimeuint64_tid:%u enable:%s state{enabled:%s} %08xmsm_dputop3[drm:%s:%d] [dpu error][%u]SSPP init returned invalid cfg src_blk_dpu_plane_set_scanoutskip mixer %d without pingpong 3[drm:%s] [dpu error]skip pingpong %d with invalid id dpu_rm_reservereserving hw for enc %d crtc %d dynamic_ot_rd_%d_ot_limitfbcon msm_obj->active_count%08x: %c %2d (%2d) %08llx %pget_and_pin_iova_range_lockednon-aligned cmdstream buffer: %u /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/include/linux/iommu.hfreq=%u, perf_index=%u sync_width = %dx%d registers: A6XX_SP_CB_BINDLESS_DATAA6XX_DBGBUS_HLSQ_SPTP6[drm-dp] %s: P0CLK regs init sub module failed &dp->event_mutexfailed to initialize power, rc = %d trueRequested vSwingLevel=%d, change to %d &link->psm_mutexsink_count = 0x%x, cp_ready = 0x%x failed to parse test_v_total(DP_TEST_V_TOTAL_HI) channel_count (0x%x) greater than max (0x%x) test_audio_period_ch_4 = 0x%x disablefailed to set clks rate 3[drm-dp] %s: regulator enable failed, %d msm_hdmi_hdcp_init6%s: Authentication Part I successful msm_hdmi_hdcp_read_validate_aksvEnd DDC read %d Link ASKV=%08x%08x 3%s: Wait KSV fifo ready timedoutV' H1tx_gem3%s: failed to parse dt 3%s: alloc rx temp buf failed 3%s: alloc tx gem obj failed, %d dsi_calc_pclkdsi_get_config3%s: Panel %d unprepare failed,%d *ERROR* %s: couldn't identify PHY index, %d phy-type*not* refdrivers/gpu/drm/msm/disp/mdp4/mdp4.xml.hdrivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/adreno/adreno_device.cA650*ERROR* SCM is not available *ERROR* failed to load %s rb wptr: %d a5xx_uche_err_irqa5xx_fault_handler/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/adreno/a6xx_gpu.cUCHE | Out of bounds access SP*ERROR* failed to get phy *ERROR* failed to disable pwr regulator: %s (%d) msm_hdmi_phy3%s: vdda_vreg set regulator mode failed. sdm660intf_%d: %s vblank time out, crtc=%d stage=%s VIG33[drm:%s:%d] [dpu error]Fail to disable IRQ for irq_idx:%d /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c plane:%u stage:%d pitches[%d]:%8u dpu_encoder_vsync_event_handlerenc%d intf%d disabled autorefresh 3[drm:%s:%d] [dpu error]already enabled 3[drm:%s:%d] [dpu error]invalid encoder dpu_encoder_phys_cmd_control_vblank_irq3[drm:%s:%d] [dpu error]invalid arg(s), encoder %d 3[drm:%s:%d] [dpu error]timing engine setup is not supported 4[drm:%s:%d] low vbp+vfp may lead to perf issues in some cases failed: id:%u intf:%d ret:%d enable:%d refcnt:%d failed to retrieve base addr INTF_CONFIGLM_BLEND0_CONST_ALPHA + stage_offLM_BLEND0_FG_ALPHA + stage_offSSPP_SRC0_ADDR + idxSSPP_SW_PIX_EXT_C3_REQ_PIXELS + idxinvalid ctx %pK QSEED3_PHASE_STEP_Y_V + scaler_offsetid=%u, intf_idx=%d plane_idlayoutenum dpu_vbifVBIF NRT is not definedmdp1-memdpu_kms_wait_for_commit_done3[drm:%s:%d] [dpu error][%u]failed to allocate local plane struct 3[drm:%s:%d] [dpu error][%u]SSPP init failed default_scaling3[drm:%s:%d] [dpu error]plane%d failed to get format layout, %d lm %d pp %d already reserved %s Status: Using legacy clk name binding. Use "%s" instead of "%s" *ERROR* failed to create crtc_event kthread *ERROR* msm_disp_snapshot_init failed ret = %d *ERROR* could not allocate mmap offset *ERROR* failed to request IRQ%u: %d &rd->read_lockbytesdummyCP_MEMPOOLCLUSTER_PC_VS data: !!ascii85 | aux status: %#x NOT READYlink training #2 failed. ret=%d hpd_state=%d invalid lane count = 0x%x invalid link bit depth = 0x%x invalid test_audio_period_ch_1 = 0x%x Test:0x%x link rate = 0x%x, lane count = 0x%x enableoffINTEGLOOP_GAIN: %u com_dec_start_mode0 = 0x%x com_integloop_gain0_mode0 = 0x%x msm_hdmi_hdcp_auth_workmsm_hdmi_hdcp_auth_part1_key_exchange3%s:BKSV Process failed 3%s: Wait key state timedoutLink0-An=%08x%08x 3%s: KSV FIFO read failed V' H4Queue AUTH WORK msm_hdmi_hdcp_hw_ddc_clean&msm_host->cmd_mutex%s: no endpoint coredsi_short_read1_respid=%d dsi_phy_driver_probedsi_phy_enable_resource*ERROR* %s: D-PHY timing calculation failed DSI PLL%d dsi%d_phy_pll_out_byteclkDSI PLL%d outdiv %x bit_clk_div %x pix_clk_div %x pll_mux %x a330_pm4.fw last-fence: %d ALUFULL*ERROR* no a4xx device GPMU | voltage droop %s: %ps: timeout waiting for GPU to idle: status %8.8X irq %8.8X rptr/wptr %d/%d mx.lvlhdmi_isr*ERROR* phy driver is not ready disabling audio: unsupported pixclock: %lu cmd_mode=%d *ERROR* failed to construct INTF%d hwpipe=%s assign %s:%u, %u blks core_perfmin_core_ibendencoder_vblank_callback3[drm:%s:%d] [dpu error]enc%d too many physical encoders %d dpu_encoder_virt_mode_setenc%d intf%d caching mode: INTF_POLARITY_CTLINTF_MUXpnumpnum:%d xin_id:%d ot:%d vbif:%d crtc_idid=%u, mode=%dx%d s643[drm:%s:%d] [dpu error]failed to get hw_mdp: %d 3[dpu error]failed to parse clocks, ret=%d danger_vblankplane%d using 0x%X 0x%X 0x%X... plane%d pipe:%d vbif:%d xin:%d rt:%d, clk_ctrl:%d 3[drm:%s] [dpu error]invalid kms 3[drm:%s] [dpu error]skip mixer %d with invalid id 3[drm:%s] [dpu error]Allocated resource %d unavailable to assign to enc %d /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.cqos tbl not defined vbifmdp6[drm] using VRAM carveout: %lx@%pa MSM_GEM_CPU_PREPFB[%u]: iova[%d]: %08llx (%d)msm_gem_iovaget_pages/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/msm_gpu.h/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/include/linux/dma-fence.h %5d.%02d dp_panel_info: active = %dx%d bw_code = %d indexed-registers: crashdumpA6XX_DBGBUS_UCHEA6XX_DBGBUS_COMA6XX_DBGBUS_UCHE_WRAPPERdpu_dp_auxdp_ctrlFailed to start link clocks. ret=%d failed to enable DP link controller failed to initialize panel, rc = %d 3[drm-dp] %s: invalid cb data sink count read failed. rlen=%zd pixel clock (KHz)=(%d) DP_CORE_PM*ERROR* failed to map pll base VCO freq: %llu PLL_CPCTRL: %u After enabling HDCP Link0_Status=0x%08x :BKSV=%02x%08x 3%s: unable to identify DSI host index 3%s: can't find dsi_esc clock. ret=%d cannot get disp-te-gpios %ld set mode: "%s": %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x *ERROR* vsync_clk clk_set_rate failed, %d DSI PLL lock success drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.cdrivers/gpu/drm/msm/msm_gem.cyamato_pm4.fwA509a530v3_gpmu.fw2MMU_PAGE_FAULT: %08X *ERROR* a630 SQE ucode is too old. Have version %x need at least %x CP_SCRATCH_REG%d: %u VFD*ERROR* GPU RSC sequence stuck while waking up the GPU *ERROR* failed to enable pwr regulator: %s (%d) core-vddamsm_edp_auxrate=%d lane=%d edp_clk_enable3%s: Failed to enable mdp core clk *ERROR* could not pin blank-cursor bo: %d MDP4 version v%d.%dmsm8x74v1%s: event: %p *ERROR* failed to find dsi from intf %d %s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u VIG0dpu_core_perf_crtc_updatecrtc:%d stop_req:%d core_clk:%llu optional max core clk rate, use default duplicate unregister id=%u, intr=%d, irq=%denc%d created _dpu_encoder_resource_control_helper3[drm:%s:%d] [dpu error]missing trigger cb enc%d encoder disabled _dpu_encoder_phys_cmd_wait_for_ctl_start3[drm:%s:%d] [dpu error]unsupported chipset id:%X CTL_LAYER_EXT(lm)INTF_TIMING_ENGINE_ENSSPP_SW_PIX_EXT_C1C2_LR + idxQSEED3_PHASE_INIT_UV_H + scaler_offsetenum dpu_intf_dpu_danger_signal_statusdpu_runtime_resumedpu_plane_validate_multirect_v23[drm:%s:%d] [dpu error]No multirect mode possible for the planes (%d - %d) plane%d R1: %d - %d plane:%d img:%dx%d plane%d pnum:%d fmt: %4.4s w:%u fl:%u 3[drm:%s] [dpu error]More than %d resources assigned to enc %d ctl %d caps 0x%lX *ERROR* %s: offending task: %s (%s) &rd->fifo_eventclockstart_ticksA6XX_HLSQ_GFX_CPS_CONST_RAMA6XX_DBGBUS_CCU_0A6XX_DBGBUS_VFD_26[drm-dp] %s: AHB regs intr_mask=%#x config=%#x max. pre-emphasis level reached %d max tries reached /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/dp/dp_display.cfailed to initialize hpd, rc = %d HPD already %s sink count: %d failed to read link bit depth. rlen=%zd failed to parse (DP_TEST_VSYNC_HI) read dpcd failed %d dpctrl_linkcore clks already enabled Header Byte 1: value = 0x%x, parity_byte = 0x%x 3[drm-dp] %s: invalid input xovccastill active or activating or no askv. returning 3%s: HDCP is not supported without qfprom V' H3*ERROR* %s: phy driver is not ready dsi_clk_init_6g_v23%s: can't set parent to dsi_clk_src. ret=%d 3%s: status=%x ret=%d msm_dsi_manager_register*ERROR* %s: resource enable failed, %d drivers/gpu/drm/msm/adreno/a6xx_gpu.cdrivers/gpu/drm/msm/adreno/a6xx_hfi.cdrivers/gpu/drm/msm/disp/mdp4/mdp4_kms.hdrivers/gpu/drm/msm/disp/mdp5/mdp5_plane.ca330_pfp.fwa508_zap.mdta640_zap.mdt*ERROR* gpu hw init failed: %d no a2xx device reservedpfp readCP | AHB error | addr=%X access=%s error=%d | status=0x%8.8X sqefwCP*ERROR* GMU firmware error %d hdmi_msm*ERROR* failed to set pixel clk: %s (%d) pixclock: %lu eDP probed=%p isr=%x mask=%x isr2=%x mask2=%x 3%s: read link status failed 3%s: Failed to set rate to link clk right hwmixer=%s *ERROR* too many planes! cnt=%d, start stage=%d *ERROR* failed to enable regulator vdd: %d mdss_isrno iommu, fallback to phys contig buffers for scanout smp alpha=%u STAGE_UNUSEDclient type: %d 3[drm:%s:%d] [dpu error]> %d plane stages assigned dpu_encoder_destroydpu_encoder_phys_cmd_prepare_commit3[drm:%s:%d] [dpu error]invalid hw_intf %d hw_ctl %d dpu_encoder_phys_vid_prepare_for_kickoff6.0CTL_LAYER_EXT(mixer_id)CTL_FETCH_PIPE_ACTIVECTL_LAYER(lm)INTF_FRAME_LINE_COUNT_ENLM_OUT_SIZESSPP_SW_PIX_EXT_C0_LR + idxSSPP_CREQ_LUT_0 + idxQSEED3_DE_ADJUST_DATA_0 + offsetidle_pc_supportedstage_strid=%u, pp=%d, enable=%s, refcnt=%d kickoff_countid=%u, intf_idx=%d enable=%s refcnt=%d mixerctl_%ddspp_%ddpu_plane_flushplane%d invalid yuv source %dx%d%+d%+d 3[drm:%s] [dpu error]skip intf %d with invalid id 3[drm:%s] [dpu error]failed dspp object creation: err %d 3[drm:%s] [dpu error]blk type %d not managed by rm 3[drm:%s] [dpu error]invalid number of lm: %d ====================%s================ shrinkinit /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/msm_fb.cActive: %4d objects, %9zu bytes msm_gem_pin_iova/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/msm_gem.cringidid=%d pid=%d ring=%d:%d elapsed=%lld ns mhz=%lld start=%lld end=%lld PFP state: drm_dp_link rate = %u back_porch = %dx%d pixel clock khz = %d 4[drm] Some DP AUX interrupts unhandled: %#010x TU: valid_lower_boundary_link: %d failed to initialize aux, rc = %d dp_hpd_handlerdevice service irq vector = 0x%x failed to read 0x%x dp_panel_tpg_configinvalid power data Disabling PHY 6%s: reauth work aborted msm_hdmi_hdcp_reauth_work4%s: hw_ddc_clean failed dsi_get_phy3%s: Failed to set rate esc clk, %d *ERROR* bad number of data lanes 3%s: power on host1 failed, %d 3%s: prepare panel %d failed, %d qcom,master-dsi6drivers/gpu/drm/msm/dp/dp_display.cA200a650_gmu.bina650_zap.mdtloading PM4 ucode version: %u *ERROR* could not allocate PFP: %d *ERROR* missing support for speed-bin: %u. Some OPPs may not be supported by hardware BOOT_SLUMBER*ERROR* Unable to get interrupt %s %d *ERROR* failed to get hpd clk: %s (%d) msm_hdmi/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/hdmi/hdmi_phy.cslave_iface3%s:failed to init aux already on link reconfig 3%s: Failed to enable vdda_vreg regulator. edp->pixel_clk, set_rate %ld *ERROR* could not allocate blank-cursor bo: %d DMA_Emsm8x36%s:%d %d %s no frames pending id=%u, intr=%d, irq=%d, pp=%d, pending_cnt=%d enc%d enable %d &dpu_enc->rc_lock3[drm:%s:%d] [dpu error]enc%d ctl %d reset failure dpu_encoder_virt_enable3[drm:%s:%d] [dpu error]enc%d failed to find attached connector dpu_encoder_phys_cmd_initenc%d intf%d tc %d enable %u start_pos %u rd_ptr_irq %u dpu_encoder_phys_vid_wait_for_commit_doneinvalid handle for plane %d 3[drm:%s:%d] [dpu error]unsupported format modifier %llX LM_BLEND0_OP + stage_offPP_VSYNC_INIT_VALSSPP_CREQ_LUT_1 + idxcsc_reg_off + 0x4uint32_tid=%u src_rectis_virtualdpu_plane_duplicate_stateplane%d not updating same src addrs 3[drm:%s] [dpu error]failed lm object creation: err %d 3[drm:%s] [dpu error]unable to find appropriate mixers _dpu_rm_reserve_lmscrtc_mask*ERROR* unable to parse port endpoint &priv->obj_lockid=%d pid=%d ring=%d bos=%d cmds=%d debugbus: A6XX_SP_LB_2_DATAA6XX_SP_CB_BINDLESS_TAGA6XX_HLSQ_PWR_REST_RAMA6XX_DBGBUS_PCA6XX_DBGBUS_TPL1_3z6[drm-dp] %s: LCLK regs process phy_test_req failed Mem allocation failure voltage level: %d emphasis level: %d TU: delay_start_link: %d *ERROR* failed to create dp connector: %d 3failed to initialize audio, rc = %d DP parse sink count failed Test:(0x%x) requested invalid audio pattern type = 0x%x test_audio_period_ch_1 = 0x%x test_audio_period_ch_7 = 0x%x channel_eq_done = %d, clock_recovery_done = %d %dx%d@%dfps clock parsing successful no ctrl clocks are defined hdmi_tx_l%dcom_core_clk_en = 0x%x 3%s: transfer V failed 3%s: fail to reset sha engine COMP_DONE 3%s: unable to calc clk rate, %d dsi_mgr_bridge_enablePHY timings: %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d dsi%d_phyDSI%d PLL save state %x %x dsi_7nm_phy_enabledrivers/gpu/drm/msm/msm_gem.hdrivers/gpu/drm/msm/msm_rd.ca530_pm4.fwfailed to load adreno gpu %s: timeout waiting to drain ringbuffer %d rptr/wptr = %X/%X size: %zd Could not find a clock rate. Using a reasonable default CP AHB error interrupt GMU set GPU frequency error: %d *ERROR* Unable to power off the GPU RSC lane=%d req_voltage_swing=0x%x lut_clk*ERROR* failed to initialize DSI: %d STAGE3*ERROR* Cannot allocate %d SMP blocks: %d 3[drm:%s:%d] [dpu error]Fail to enable IRQ for irq_idx:%d 3[drm:%s:%d] [dpu error]enc%d intf%d pp%d invalid IRQ index:%d enc_prepare_for_kickoffmode: ??? dpu_encoder_virt_disabledpu_encoder_phys_cmd_enableid:%d pp:%d kickoff timeout %d cnt %d koff_cnt %d vsyncCTL_INTF_ACTIVEINTF_DISPLAY_DATA_HCTLLM_BORDER_COLOR_1SSPP_SRC_CONSTANT_COLOR_REC1 + idxSSPP_SW_PIX_EXT_C0_TB + idxSSPP_SW_PIX_EXT_C3_TB + idxmodifierstruct dpu_irq_callback *dev:%s stop_req:%s clk_rate:%llu 3[drm:%s:%d] [dpu error]hw_intr init failed: %d dpu13[drm:%s:%d] [dpu error]encoder init failed for dsi display 3[drm:%s:%d] [dpu error]invalid plane 3[drm:%s:%d] [dpu error]invalid plane state async*ERROR* failed to get memory resource: %s MSM_SUBMITQUEUE_NEWmsm_gem_put_pages&gpu->lockPurging %u bytes unmappedresetmehpd isr status=%#x Failed to %s low power mode Requested preEmphasisLevel=%d, change to %d %pS->%s: msm_dss_get_res failed invalid input dp_audio_hook_plugged_cbpixclk=%lu (%lu) pxoHSCLK_SEL: %d tx_l2_lane_mode = 0x%x tx_l%d_vmode_ctrl2 = 0x%x 6%s: hdcp is not supported msm_hdmi_hdcp_msleepmsm_hdmi_hdcp_auth_part2_recv_ksv_fifomsm_hdmi_hdcp_recv_ksv_fifo3%s: can't find src clock. ret=%d Dsi Host %d initialized 3%s: Unable to get %s clock, ret = %d dsi_cmd_dma_addrequested=%ld, actual=%ld *ERROR* %s: can't enable ahb clk, %d *ERROR* failed to register PLL: %d drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c*ERROR* Couldn't power up the GPU: %d a660_zap.mdtqcom,chipid*ERROR* No A5XX device is defined 4*** gpu fault: iova=%08lx, flags=%d (%u,%u,%u,%u) CP illegal instruction error The GMU is not set up yet gx*ERROR* failed to get pwr clk: %s (%d) ddc_status=%08x msm_edp_aux_init/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/disp/mdp_kms.c*ERROR* failed to get hdmi_clk lvds-pll-vdda*ERROR* failed to initialize intf: %d, %d %s: assign pipe %s on stage=%d tbuRGB2%s: zpos %d 3[drm:%s:%d] [dpu error]pclk is 0, cannot calculate line time dsi_info->num_of_h_tiles %d enc%d intf%d room in vfp for needed prefetch fmt %4.4s mod 0x%llX ubwc %d yuv %d CTL_FLUSHreg->clr_offLM_BLEND0_BG_ALPHA + stage_offbase + PP_DITHER_ENSPLIT_DISPLAY_UPPER_PIPE_CTRLQSEED3_PHASE_STEP_UV_V + scaler_offsetupdate_clkid=%u, event=%u, intf=%d ppid:%d enc_id:%u 3[drm:%s:%d] [dpu error]modeset init failed: %d Create plane type %d with features %lx (cur %lx) 3[drm:%s:%d] [dpu error]initialize_dsi failed, rc = %d 3[drm:%s:%d] [dpu error]invalid params sspp_%dcsc_blkplane%d pnum:%d fmt: %4.4s mode:%d luts[0x%x, 0x%x] 3[drm:%s] [dpu error]failed to reserve hw resources: %d default_rd_ot_limitdynamic_ot_rd_%d_pps%s_clk&priv->mm_lockmsmlookup_vmaget_vaddrPurging %u vmaps h_skew = %d A6XX_TP1_MIPMAP_BASE_DATA dwords: %d enable=%d sdp_cfg2 = 0x%x dump_regsrate=%d, num_lanes=%d, pixel_rate=%d TU: upper_boundary_count: %d lane count = 0x%x Current: v_level = 0x%x, p_level = 0x%x failed to get %s clk. err=%d PLL calculation failed com_lock_cmp2_mode0 = 0x%x tx_l%d_tx_drv_lvl = 0x%x 3%s: Authentication Part I failed 3%s: HDCP V Match timedout*ERROR* too many bridges dsi_link_clk_enable_v23%s: get config failed msm_dsi_host_modeset_initdsi host already on cannot get disp-enable-gpios %ld *ERROR* regulator enable failed, %d SSC not enabled *ERROR* %s: PHY timing calculation failed drivers/gpu/drm/msm/disp/mdp_format.cdrivers/gpu/drm/msm/disp/dpu1/dpu_encoder.cdrivers/gpu/drm/msm/hdmi/hdmi_hdcp.cA306 - ttbr0=%.16llx rbbm-status: 0x%08x pm4fwRBBM | AHB bus error | %s | addr=0x%X | ports=0x%X:0x%X gpmufwa6xx_irqCCUVSCGPU_DCVShub*ERROR* failed to get hpd regulator: %s (%d) disabling audio: no video *ERROR* pinctrl state chg failed: %d *ERROR* failed to enable clock: %s (%d) edp_hpd edpedp_start_link_train_1new lrate=%u prate=%u(kHz) rate=%d lane=%d p=%u b=%d *ERROR* failed to enabled mdp_clk: %d msm8x96Single FLUSH mask %x,ID %d cursor_move is deprecated with cursor planes *ERROR* failed to init kms no SMP pool assigning Layer Mixer %d to crtc %s zpos=%u 3[drm:%s:%d] [dpu error]failed to set %s clock rate %llu 6[drm] minimum performance mode 3[drm:%s:%d] [dpu error]> 2 planes @ stage %d on right crtc%d -> enable %d, skip atomic_flush frame done completion waitenc%d _dpu_encoder_virt_enable_helper_dpu_encoder_update_vsync_sourceencoder%uid:%u pp:%d pending_cnt:%d _dpu_encoder_phys_cmd_pingpong_configSSPP_SRC_YSTRIDE1 + idxbasebase + PCC_BLUE_B_OFFQSEED3_PHASE_STEP_Y_H + scaler_offsetstop_reqrefcntkms_complete_commit3[drm:%s:%d] [dpu error]invalid arg(s) *ERROR* failed to ioremap: %s *ERROR* failed to allocate fb is_unevictable(msm_obj)put_iova_spacesmark_unpurgeable&gpu->active_lockmsm_dp_test_typeCopied %d bytes from user CP_DRAW_STATEA6XX_SP_INST_DATAA6XX_DBGBUS_VPCFailed to reinitialize mainlink. rc=%d dp_video_ready request_irq failed, ret=%d core_initialized=%d test_audio_period_ch_2 = 0x%x core_clk_on=%d link_clk_on=%d stream_clk_on=%d pixel clks already enabled HDMI_TX_L%dcom_svs_mode_clk_sel = 0x%x 3%s: wait key and an ready failed 3%s: read bcaps error, abort msm_hdmi_hdcp_recv_bcapsmsm_hdmi_hdcp_auth_part2_wait_ksv_fifo_readymsm_hdmi_hdcp_transfer_v_hrlen=%d pkt_size=%d rx_byte=%d 3%s: failed to enable bus clock %d ret %d %s: no valid device 3%s: cmd cannot fit into BLLP period, len=%d ifacedrivers/gpu/drm/msm/hdmi/hdmi_i2c.cdrivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.cdrivers/gpu/drm/msm/msm_gem_shrinker.c fast_rate=%u, slow_rate=27000000 registers-hlsq: CP | protected mode error | %s | addr=0x%8.8X | status=0x%8.8X HFI_H2F_MSG_PREPARE_SLUMBERpower up 3%s: aux timeout, edp_sw_mvid_nvid3%s: Training 1 failededp_do_link_trainTraining 1 completed successfully 3%s: set link_train=%d failed *ERROR* failed to enable hdmi_clk: %d msm8x76apq8084*ERROR* CTL %d cannot find LM*ERROR* CTL_%d: base is null! /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c*ERROR* modeset_init failed: %d No interconnect support may cause display underflows! STAGE_BASESTAGE1skip irq wait id=%u, intr=%d, irq=%s id: %u, sw_event:%d, rc:%d !ON state 3[drm:%s:%d] [dpu error]enc%d failed to init vid enc: %ld dpu_encoder_virt_atomic_checkenc%d intf%d pp %d enc%d intf%d update pending flush ctl %d intf %d dpu_encoder_phys_vid_disableSSPP_VIG_OP_MODE + idxSSPP_MULTIRECT_OPMODE + idxbase + PCC_BLUE_R_OFFcsc_reg_off + 0x8csc_reg_off + 0x40fmtEexpected_timeirq_idx:%d callback:%pK [%x]/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/include/linux/irqchip/chained_irq.hscaler_blkclk_ctrl3[drm:%s] [dpu error]unsupported: lm maxwidth differs 3[drm:%s] [dpu error]failed merge_3d object creation: err %d _dpu_rm_check_lm_and_get_connected_blkstimestamp %lld VRAM: %08x->%08x wait_fencefini msm_gem_put_vaddr_locked:msm_obj->vaddrget_iova_locked*ERROR* could not create ringbuffer %d: %d kernel: 5.15.144-android14-11-g5854f4c2aff0-ab11614155 msm_fault_handler%.*s/%d: fence=%unr_bos %02x: %08x MEQ state: ROQ state: bpc: %u A6XX_DBGBUS_TPL1_2DP off link/stream done no test pattern selected by sink request: 0x%x new rate=0x%x pdev not found &dp->event_qvx: 0=%d, 1=%d, 2=%d, 3=%d Illegal link rate=%d lane=%d DP panel not enabled, handle TPG on next on failed to update edid property %d 3[drm-dp] %s: %s: failed to init regulator, ret=%d tmds clk: %llu DEC_START: %llu TX_BAND: %d HDCP_DEBUG_CTRL=0x%08x 6%s: Unable to clear HDCP DDC Failure msm_hdmi_hdcp_scm_wresc=%lu, src=%lu *ERROR* %s: failed to get sfpb regmap *ERROR* failed to read lane data dsi_phy_regulator_initDSI%d PLL parent rate=%lu dsi%d_phy_pll_out_dsiclkdrivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.cdrivers/gpu/drm/msm/disp/dpu1/dpu_kms.cdrivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.cA220*ERROR* memory region is too small to load the MDT CP | Protected mode error| %s | addr=%x pfpfwqcom,gmua6xx_cp_hw_err_irqCP VSD decoder parity error cx.lvlHFI_H2F_MSG_BW_TABLEHFI_H2F_MSG_CORE_FW_STARTfailed to get HPD gpio failed to init hdcp: disabled *ERROR* failed to enable hpd regulator: %s (%d) &hdmi_i2c->ddc_eventedp_isrmsm_edp_ctrl_timing_cfg3%s: Set sw/pe to panel failed msm8998%s: free SMP blocks %s: release from crtc %s *ERROR* X scaling (%d->%d) failed: %d max_core_clk_rateformat:%p4cc, alpha_en:%u blend_op:0x%x id;%u, sw_event:%d, rc in ON state 3[drm:%s:%d] [dpu error]encoder master not set 3[drm:%s:%d] [dpu error]enc%d could not get intf: type %d, id %d statusenc%d intf%d tc %d cfgheight %u thresh_start %u thresh_cont %u 3[drm:%s:%d] [dpu error]invalid encoder/device CTL_LAYER_EXT2(lm)PP_SYNC_THRESHsrc_xy_off + idxbase + PCC_RED_B_OFFcsc_reg_off + 0x1ccsc_reg_off + 0x34*ERROR* Failed to get clock refs %d id=%u, enable=%s plane%d plane%d FB[%u] plane%d invalid src %dx%d%+d%+d line:%u 3[drm:%s] [dpu error]skip ctl %d with invalid id 3[drm:%s] [dpu error]failed ctl object creation: err %d lm %d already reserved featuresdefault_wr_ot_limit0x%lx : %08x %08x %08x %08x *ERROR* failed to install IRQ handler MSM Snapdragon DRM*ERROR* failed to allocate buffer object dumb %08zu %9s %-32s %s: no IOMMU, fallback to VRAM carveout! *ERROR* Couldn't register GPU cooling device %%BUSY&queue->lockpid_tbuffer overflow CP_ROQmainlink not ready Failed to start pixel clocks. ret=%d link training #1 failed. ret=%d Failed to disable clocks. ret=%d failed to initialize parser, rc = %d is_connected = %s sink request=%#xfailed to parse test_htotal(DP_TEST_H_TOTAL_HI) failed to parse test_v_height PLL_CCTRL: %u com_integloop_gain1_mode0 = 0x%x 3%s: auth prepare failed %d 3%s: ASKV validation failed 3%s: Wait Auth IRQ timeout 3%s: no. of cascade conn exceeds max allowedinvalid OPP table in device tree pclk=%lu, bclk=%lu /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/dsi/dsi_manager.c%d, %d, %d, %d, %d dsi%d_pll_post_out_div_clkAdreno 7c Gen 3*ERROR* could not parse qcom,chipid: %d revision: %d (%d.%d.%d.%d) /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/adreno/a2xx_gpu.cRBBM | ME master split | status=0x%X a5xx_gpmu_err_irq%s: GPMU firmware initialization timed out *ERROR* %s: Preemption failed to complete preemptCP | AHB bus error CP ucode error interrupt gfx.lvl*ERROR* Unexpected message id %d on the response queue vdda3%s: Could not get vdda reg, ret = %d 3%s: Can't find link clock, %d train=%d edp_lane_set_write*ERROR* failed to disable regulator: %d mdp4_irq_error_handler*ERROR* failed to get lut_clk mdp4*ERROR* failed to construct LCDC encoder fall back to the other CTL category for INTF %d! mdp5_crtc_wait_for_pp_done%s: send event: %p mdp5_irq_error_handler*ERROR* failed to get %s (%ld) LM5 right-hwpipe=%s fix_core_clk_ratefix_core_ib_votecrtc%d event:%u ts:%lld fb:%d image format:%4.4s wxh:%ux%u 3[drm:%s:%d] [dpu error]invalid parameters pre stop3[drm:%s:%d] [dpu error]enc%d frame done timeout _dpu_encoder_init_debugfsplane format modifier 0x%llX /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c1.0CTL_MERGE_3D_ACTIVECTL_LAYER_EXT3(mixer_id)INTF_BORDER_COLORSPLIT_DISPLAY_LOWER_PIPE_CTRLcsc_reg_off + 0x20csc_reg_off + 0x30QSEED3_DE_SHARPEN_CTL + offsetsafe_lut__data_loc char[]core_clk_rateflagsdst_rectcallbackdpu_bind3[drm:%s:%d] [dpu error]modeset_init failed for DP, rc = %d debug Danger signal status: 3[drm:%s:%d] [dpu error]plane%d scaling is not supported in multirect mode _dpu_plane_setup_cscplane%d/%d src_width:%d/%d 3[drm:%s] [dpu error]failed to global state ===================dpu drm state================ 6[drm] using %s VRAM carveout invalid flags: %08x !vma purgedmsm_gem_new*ERROR* failed to enable 'gpu_reg': %d offending task: %s (%s)rbbmtimer???/%d: fence=%uA6XX_HLSQ_ICB_CPS_CB_BASE_TAGA6XX_HLSQ_INST_RAMcx_dbgcA6XX_DBGBUS_CCUFCHE - debugbus-block: A6XX_DBGBUS_VBIF 6[drm-dp] %s: AUXCLK regs mainlink off done hpd=%d 3[drm-dp] %s: hpd dp_cb not initialized failed to read phy link pattern. rlen=%zd phy_test_pattern_sel = 0x%x PLL_RCTRL: %u com_div_frac_start2_mode0 = 0x%x tx_l0_lane_mode = 0x%x hdcp auth failed, queue reauth work 3%s: can't set parent to pixel_clk_src. ret=%d 3%s:Failed to enable vregs.ret=%d dsi_regulator_init3%s: Panel %d OFF failed, %d 3%s: enable panel %d failed, %d dsi%dn1_postdivby2_clk*ERROR* DSI PLL(%d) lock failed, status=0x%08x DSI%d DSI%d PHY disabled drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.cdrivers/gpu/drm/msm/msm_atomic.cdrivers/gpu/drm/msm/dsi/dsi.ca540_gpmu.fw2A630Could not find the GPU powerlevels *ERROR* could not allocate PM4: %d a6xx_fault_handlerEXTERNALVPC*ERROR* GMU firmware initialization timed out The GMU frequency table is being truncated HFI_H2F_MSG_FW_VERSION/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/hdmi/hdmi.c*ERROR* rate[%d] not supported! Training 2 completed successfully %s:%dlvds-vccs-3p3v*ERROR* Width down scaling exceeds limits! %s: begin vbif_physLM2%s: cleanup: FB[%u] *ERROR* Y scaling (%d->%d) failed: %d *ERROR* out of blks (req=%d > avail=%d) crtc=%d p=%d new_bw=%llu,old_bw=%llu %s: check 3[drm:%s:%d] [dpu error]invalid src split cfg. priority mismatch. stage: %d left: %d right: %d dpu_crtc_frame_event_cbid:%d skip schedule work mode: command intf %d 3[drm:%s:%d] [dpu error]invalid args dpu_encoder_phys_cmd_mode_set3[drm:%s:%d] [dpu error]enc%d intf%d ctl %d reset failure: %d image dimensions outside max range INTF_ACTIVE_HCTLINTF_HSYNC_SKEWPP_AUTOREFRESH_CONFIGHDMI_DP_CORE_SELECTcsc_reg_off + 0x38lut_addrpnum=%d fmt=%x rt=%d fl=%d lut=0x%llx lut_usage=%d %d|%s|%d unsigned longid:%u mixer:%d bounds:%dx%d%+d%+d 3[drm:%s:%d] [dpu error]wait for commit done returned %d Safe signal status: creq_vblankxin_halt_timeoutvbif:%d xin:%d ot_lim:%d failed to create disp state task dpu devcoredump memory-region*ERROR* waiting on invalid fence: %u (of %u) could not allocate stolen bo mappedExclusivemsm_gem_free_object*ERROR* cannot import without IOMMU invalid cmdstream size: %u non-aligned reloc offset: %u %s *ERROR* failed to get irq: %d Only creating %zu ringbuffers %sdp_debugA6XX_SP_CB_LEGACY_DATAA6XX_HLSQ_INST_RAM_TAGA6XX_DBGBUS_HLSQA6XX_DBGBUS_RB_1invalid DP OPP table in device tree TU: boundary_moderation_en: %d sink count is zero, nothing to do 3event_q is full: pndx=%d gndx=%d test_audio_period_ch_3 = 0x%x using EXTENDED_RECEIVER_CAPABILITY_FIELD version: %d.%d hdmi-audio-codecmpd4_lvds_pllhdmipll3%s: hdcp authentication failed msm_hdmi_hdcp_auth_prepareAKSV=%02x%08x msm_reset_hdcp_ddc_failuresLink0-AKSV=%02x%08x phys3%s: Set max pkt size failed, %d 3%s: can't set parent to esc_clk_src. ret=%d 3%s: forcing mdss_dsi lanes to 1 3%s: failed to get iova: %d dsi_cmd_dma_txdsi_short_read2_resp3%s: failed to register mipi dsi host for DSI %d: %d *ERROR* %s: failed to init regulator, ret=%d DSI%d PLL parent rate=%lu parent rate %lu a530_zap.mdt - id: %d *ERROR* no a3xx device %s: Int status %08x RBBM | ETS master split | status=0x%X TRANSLATION*ERROR* Unable to slumber GMU: status = 0%x/0%x *ERROR* Unable to set the OPP table for the GMU *ERROR* Message %s id %d returned error %d isr=%x panel-hpdlane=%d req_pre_emphasis=0x%x *ERROR* failed to set mdp_clk to %lu: %d *ERROR* unexpected MDP version: v%d.%d %s: error: %08x *ERROR* failed to construct encoder STAGE6DMA0enable_bw_releaseperf_modecrtc%d multirect: mode: %d index: %d lm %d, ctl %d, flush mask 0x%x 3[drm:%s:%d] [dpu error]crtc%d wait for frame done failed;frame_pending%d dpu_crtc_disable3[drm:%s:%d] [dpu error]event_thread not found for crtc:%d vblank irq err id:%u pp:%d ret:%d, enable %s/%d enc%d intf%d tearcheck not supported CTL_LAYER_EXT2(mixer_id)INTF_DISPLAY_V_END_F0PP_SYNC_CONFIG_HEIGHTcsc_reg_off + 0x28csc_reg_off + 0x2cQSEED3_DE_THRESHOLD + offsetQSEED3LITE_DIR_FILTER_WEIGHT + offsetpp_idxvalid=%u, idx=%u, frame_busy_mask=%lx multirect_idxid:%u is_virtual:%s multirect_mode:%u pending_mask3[drm:%s:%d] [dpu error]plane%d Unsupported format for multirect mode skip intf %d with type none qos remap not supported /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.cmm*ERROR* failed to allocate drm_device MSM_GET_PARAMput_iova_vmasgpu-ring-%dpidME state: %02x: %08x %08x %08x %08x A6XX_DBGBUS_TESSUnexpected DP AUX IRQ %#010x when not busy dp_catalog_dump_regsPHY_TEST_PATTERN request mainlink %s link training #1 successful dp_display_isrDRM DP AUX register failed dp_hpd_getinvalid link rate = 0x%x failed to read test_audio_period (0x%x) %s: calling catalog tpg_enable ds port status failed, rlen=%zd msm_dss_ioremapstreamWaiting for PLL lock fdata: %llu 3%s: recv ksv fifo failed %d Start DDC write 3%s: cmd dma tx failed, type=0x%x, data0=0x%x, len=%d, ret=%d *ERROR* wait for video done timed out 3regulator %d set op mode failed, %d msm_dsi_phy_enable*ERROR* %s: failed to restore phy state, %d dsi_phy_lanedsi%dn1_postdiv_clkdrivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.cdrivers/gpu/drm/msm/adreno/a6xx_gpu_state.cleia_pfp_470.fwA405amd,imageonamd,imageon-%u.%uloaded %s from new location - type=%s *ERROR* Unable to authorize the image operating-points-v2%s: timeout waiting for SP GDSC enable *ERROR* a650 SQE ucode is too old. Have version %x need at least %x RBBM | ATB ASYNC overflow &gmu->lockaudio: enabled=%d, channels=%d, channel_allocation=0x%x, level_shift_value=%d, downmix_inhibit=%d, rate=%d failed to set clk %s (%d) sw_status=%08x, hw_status=%08x, int_ctrl=%08x msm_hdmi_phy_probeedp_drm_workedp_regulator_initDMA_Ssetting mdp_clk=%lu /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.cMDP5: %s hw config selected comp-%d (T/B): rpt=%d/%d, ovf=%d/%d, req=%d %d MMBs allocated (%d reserved) dpu_core_irq_register_callback3[drm:%s:%d] [dpu error]invalid irq_cb:%d func:%d no registered cb, idx:%d 3[drm:%s:%d] [dpu error]exceeds bandwidth: %ukb > %ukb statedpu_encoder_setup3[drm:%s:%d] [dpu error]get_line_count function not defined id:%u, sw_event:%d, rc:%d frame pending mode: video 3[drm:%s:%d] [dpu error]enc%d no ctl block assigned at idx: %d pp_done&cmd_enc->pending_vblank_wqenc%d intf%d vfp_fetch_lines %u vfp_fetch_start_vsync_counter %u CTL_INTF_FLUSHINTF_ACTIVE_V_END_F0base + PCC_BLUE_G_OFFQSEED3_DE_SHARPEN + offsetVBIF_XIN_CLR_ERRflcounter_namenew_countstruct drm_rectpp_iddpu_kms_hw_init3[drm:%s:%d] [dpu error]failed to setup DPU encoder %d: rc:%d plane%d pnum:%d ds:%d vb:%d pri[0x%x, 0x%x] is_rt:%d Inactive plane:%d 3[drm:%s:%d] [dpu error]invalid arguments VBIF %d client %d is halted *ERROR* could not install perf debugfs !mutex_is_locked(&priv->mm_lock)non-aligned cmdstream buffer size: %u /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/msm_gem_vma.cebi1_clk: %p time: %lld.%09ld No per-process page tables&perf->read_lockA6XX_HLSQ_CPS_MISC_RAMA6XX_DBGBUS_CPA6XX_DBGBUS_DPMA6XX_DBGBUS_VFD_3 - context: %d LM failed: TEST_LINK_TRAINING failed to initialize debug, rc = %d failed to initialize ctrl, rc = %d exitDP link status read failed h_porches(back|front|width) = (%d|%d|%d) msm_hdmi_hdcp_irqAfter: HDMI_DDC_SW_STATUS=0x%08x 3%s: error: scm_call ret=%d resp=%u msm_hdmi_hdcp_auth_part1_verify_r0*ERROR* failed to create dsi connector: %d 3%s: can't find byte_intf clock. ret=%d /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/dsi/dsi_host.cmsm_dsi_host_set_display_mode3%s: failed to init regulator, ret=%d Could not find panel for %u (%ld) *ERROR* %s: regulator enable failed, %d *ERROR* %s: failed to register clk provider: %d dsi%dpllbytevco_clk_rate=%lld ref_clk_rate=%lld DSI%d PHY enabled drivers/gpu/drm/msm/msm_gpu.cdrivers/gpu/drm/msm/msm_gem_submit.ca420_pfp.fwa530_pfp.fwA618Found GPU: %u.%u.%u.%u /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/adreno/a5xx_gpu.c%s: timeout waiting for RBCCU GDSC enable: %X crashdump readPERMISSION4*** gpu fault: ttbr0=%.16llx iova=%.16lx dir=%s type=%s source=%s (%u,%u,%u,%u) PERFCOUNTER*ERROR* The HFI response queue is unexpectedly empty *ERROR* failed to get hpd gpio: (%d) hpd-5v-enaudio %sabled *ERROR* failed to configure avi infoframe 3%s:failed to configure GPIOs: %d3%s: Invalid link rate,%d 3%s: Set training pattern to panel failed 3%s: Failed to enable ahb clk msm8917CTL %d allocated cursor_set is deprecated with cursor planes *ERROR* failed to init sub-block irqs: %d %s: alloc SMP blocks assigning Right Layer Mixer %d to crtc %s core_irqcrtc:%d bw:%llu ctrl:%d Release BW crtc=%d dpu_core_perf_destroydpu_crtc_atomic_checkdpu_encoder_helper_wait_for_irqdpu_encoder_wait_for_event3[drm:%s:%d] [dpu error]invalid param dpu_enc:%d or disp_info:%d 3[drm:%s:%d] [dpu error]invalid num phys enc %d/%d dpu_encoder_helper_hw_reset3[drm:%s:%d] [dpu error]enc%d failed to add phys encs 3[drm:%s:%d] [dpu error]enc%d no pp block assigned at idx: %d failed wait_for_idle: id:%u ret:%d pp:%d enc%d intf%d split_role %d, halve horizontal %d %d %d %d enc%d intf%d less vfp than fetch req, using entire vfp NV12/5/1/1.23 AB24/5/1/1.23 XB24/5/1/1.23INTF_PROG_FETCH_STARTSSPP_CREQ_LUT + idxcsc_reg_off + 0x14reg_lvl + reg_highintf_idxpending_kickoff_cntid=%u, intf_idx=%d, pending_kickoff_cnt=%d ctl_idx=%d extra_flush_bits=0x%x pending_flush_ret=0x%x id=%u, irq_idx=%d, rc=%d, time=%lld, expected=%lld cnt=%d boundsmdp0-mem_dpu_kms_initialize_displayport3[drm:%s:%d] [dpu error]plane%d failed to allocate state lm %d not peer of lm %d unable to find appropriate mixers invalid arguments vbif %d mdp %d &kms->dump_mutexatomic-worker-%dMSM_WAIT_FENCEinvalid pad: %08x !msm_obj->evictable*ERROR* %s: hangcheck recover! module: msm *ERROR* Couldn't initialize GPU devfreq /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/msm_gpu_devfreq.cend_ticks%02xclusters: A6XX_SP_INST_TAGA6XX_HLSQ_CHUNK_CPS_RAMA6XX_HLSQ_CVS_MISC_RAM_TAGA6XX_DBGBUS_GPCDp display driver register failedfalse/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/dp/dp_hpd.clane=%d req_vol_swing=%d req_pre_emphasis=%d unable to remap dp io resources, rc=%d unsupported power module: %s links clks already enabled dp_power_regulator_enablecom_div_frac_start1_mode0 = 0x%x An not ready after enabling HDCP End DDC write %d msm_hdmi_hdcp_recv_bksvV' H0/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/dsi/dsi.cmdp_core3%s: Failed to enable dsi pixel clk Set clk rates: pclk=%d, byteclk=%lu, esc_clk=%lu, dsi_src_clk=%lu 3%s: unable to map Dsi ctrl base failed to get irq msm_dsi_host_cmd_rxsyscon-sfpbdisp-tedsi_phy_regulator*ERROR* regulator %d set op mode failed, %d PLL%d ssc freq=%d spread=%d period=%d 3DSI PLL(%d) lock failed, status=0x%08x drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.cdrivers/gpu/drm/msm/disp/mdp5/mdp5_kms.hdrivers/gpu/drm/msm/disp/mdp5/mdp5_smp.cno GPU device was found yamato_pfp.fwa630_gmu.binadreno*ERROR* Unable to set the OPP table ALUACTIVEtimestamp hispeed_bina660_sqe.fwREAD*ERROR* Timeout waiting for GMU OOB set %s: 0x%x HFI_H2F_MSG_TESTcore_physicalHDMI_HPD_INT_STATUS tells us: %d *ERROR* failed to get phy regulator: %s (%d) 3%s: failed to register drm aux: %d msm_edp_ctrl_pixel_clock_valid3%s: Can't find pixel clock, %d link*ERROR* failed to get lvds-pll-vdda: %d *ERROR* failed to construct plane for RGB%d VG2CTL %d FLUSH pending mask %x %s: update crtc_frame_eventmodifier:%8llu 3[drm:%s:%d] [dpu error]invalid vertical/horizontal destination crtc %d stage:%d - plane %d sspp %d fb %d 3[drm:%s:%d] [dpu error]invalid argument(s) 3[drm:%s:%d] [dpu error]enc%d dp display enable failed: %d pp_rd_ptr&phys_enc->pending_kickoff_wqfound fmt: %4.4s DRM_FORMAT_MOD_QCOM_COMPRESSED /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.cLM_OP_MODEPP_RD_PTR_IRQbase + PP_DITHER_MATRIX + iSSPP_SW_PIX_EXT_C1C2_TB + idxSSPP_QOS_CTRL + idxbase + PCC_RED_G_OFFcsc_reg_off + 0x18QSEED3_DE_ADJUST_DATA_2 + offset3[drm:%s:%d] [dpu error]failed to get irq: %d trace_beginenum dpu_intr_idxrc_stateenum dpu_ssppssppenabledid:%u frame_pending:%d index:%d layout:{%ux%u @ [%u/%u, %u/%u, %u/%u, %u/%u]} multirect_index:%d &kms->commit_lock[i]3[drm:%s:%d] [dpu error]modeset_init failed for dsi[%d], rc = %d 3[drm:%s:%d] [dpu error]DPU plane state of plane id %d is NULL plane%uctl %d match /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/msm_drv.c*ERROR* failed to load kms MSM_SUBMITQUEUE_QUERYfb: %dx%d@%4.4s (%2d, ID:%d) %s-worker%3d.%d%%perf_indexEvicting %u bytes A6XX_TP0_MIPMAP_BASE_DATAA6XX_DBGBUS_VBIFmvid=0x%x, nvid=0x%x mainlink_level = 0x%x, safe_to_exit_level = 0x%x link rate=%d pixel_clk=%d msm-dp-displayPower client create failed failed to parse (DP_TEST_HSYNC_HI) test_audio_period_ch_5 = 0x%x Requested: v_level = 0x%x, p_level = 0x%x clock-namesfailed to init regulators %d DP_PHY_PMfailed to set link clks rate com_lock_cmp3_mode0 = 0x%x msm_hdmi_hdcp_recv_check_bstatus*ERROR* cannot find phy device 3%s: Read cmd Tx failed, %d 3%s: failed to enable link clocks. ret=%d *ERROR* bad physical lane entry %u dsi_clk_initdsi_cmds2buf_tx/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c*ERROR* vsync_clk clk_prepare_enable failed, %d DSI%d PLL drivers/gpu/drm/msm/adreno/a5xx_gpu.cdrivers/gpu/drm/msm/disp/dpu1/dpu_crtc.cA660*ERROR* %s: preemption timed out cx_memZap shader not enabled - using SECVID_TRUST_CNTL instead *ERROR* gpu fault ring %d fence %x status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4.4x ib2 %16.16llX/%4.4x GPU_SET*ERROR* GMU firmware is bigger than the available region *ERROR* HFI queue %d is not empty hpdmsm_edpmask=%x edp->link_clk, set_rate %ld lm%d: blend config = 0x%08x. ext_cfg = 0x%08x Pool of %d CTLs created. unref cursorStage %d fg_alpha %x bg_alpha %x blend_mode=%u %s: check (%d -> %d) update clk rate = %lld HZ min_dram_ib%s: send event: %pK core_clk_rate: %llu 3[drm:%s:%d] [dpu error]r1 only virt plane:%d not supported 3[drm:%s:%d] [dpu error]invalid dpu encoder/master frame donedpu_encoder_virt_add_phys_encs3[drm:%s:%d] [dpu error]invalid phys encoder enc%d intf%d pp:%d pending_cnt %d rd_ptr_irqdpu_encoder_phys_vid_initenc%d intf%d fmt_fourcc 0x%X 3[drm:%s:%d] [dpu error]invalid params - hstart:%d,hend:%d,htot:%d,hdisplay:%d 3[drm:%s:%d] [dpu error]vblank timeout dpu_hw_catalog_initdpu_intr_set[i].clr_offINTF_ACTIVE_V_START_F0LM_BORDER_COLOR_0SSPP_FETCH_CONFIGsrc_size_off + idxout_xy_off + idxQSEED3_SRC_SIZE_UV + scaler_offsetcsc_reg_off + 0x10vbif_idxpending_flush_retid:%u encoder:%u enable:%s state{enabled:%s} regdmavbif:%d xin:%d lvl:%d/%d vbif:%d xin:%d w:%d h:%d fps:%d pps:%llu ot:%u hangcheck_period_msfbqcom,mdp4msm_obj->dontneedTotal: %4d objects, %9zu bytes *ERROR* failed to allocate sgt *ERROR* failed to enable 'gpu_cx': %d ticks front_porch = %dx%d hdisplay: %d A6XX_TP1_TMO_DATAA6XX_SP_STATE_DATAA6XX_HLSQ_CHUNK_CVS_RAM_TAGA6XX_DBGBUS_RASA6XX_DBGBUS_RBPA6XX_DBGBUS_TPL1_0 - bank: %d Invalid pixel mux divider idle_patterns_sent Failed to enable mainlink clks. ret=%d Disconnected, no DP_LINK_STATUS_UPDATED No sink connected width=%d hporch= %d %d %d stream_pixelstrem_clks:%s link_clks:%s core_clks:%s invalid dp_audio data com_pll_rctrl_mode0 = 0x%x com_cp_ctrl_mode0 = 0x%x com_coreclk_div = 0x%x 3%s: check v match failed %d DDC failure detected src3%s: dev_pm_opp_set_rate failed %d dsi_link_clk_set_rate_v23%s: mode not set dsi_err_workerqcom,dual-dsi-modedsi_phydec_start = %x dsi_10nm_phy_enabledrivers/gpu/drm/msm/disp/mdp_kms.cdrivers/gpu/drm/msm/msm_gem_vma.cUse compatible qcom,adreno-%u%u%u.%u instead. loaded %s with helper - iova=%.16lx gfx-memRBBM | ATB bus overflow PC*ERROR* Unable to send message %s id %d /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/hdmi/hdmi_bridge.cframe_ctrl=%08x pinctrl state chg failed: %d 3%s: invalid msg: size(%zu), request(%x) &ctrl->dev_mutex3%s, fail to prepare enable ahb clk 3%s: Can't find core clock, %d 3%s: Can't find mdp_core clock, %d gpio on v_level=%d, p_level=%d edp_ctrl_off_workercore_clk*ERROR* Invalid or unsupported interface *ERROR* Height up scaling exceeds limits! sdm630*ERROR* CTLs already paired *ERROR* failed to allocate CTL manager Cursor off rotator-mem*ERROR* failed to construct LM%d (%d) LM4STAGE2STAGE4CURSOR13[drm:%s:%d] [dpu error]invalid crtc crtc%d first commit %s: successfully initialized crtc dpu_crtc_frame_event_workbw_ctl: %llu max_per_pipe_ib: %llu dpu_encoder_helper_split_configenc%d clk_rate=%lldkHz, clk_period=%d, linetime=%dns id;%u, sw_event:%d, rc in state %d stop3[drm:%s:%d] [dpu error]enc%d timeout pending buffers total size too small %u expected %u 3[drm:%s:%d] [dpu error]unsupported fmt: %4.4s modifier 0x%llX 3failed to create dpu_hw_ctl %d INTF_DISPLAY_HCTLop_mode_off + idxSSPP_UBWC_ERROR_STATUS + idxSSPP_DANGER_LUT + idxSPLIT_DISPLAY_ENmsm_dss_enable_clkenum dpu_pingpongatomic_cntidxmultirect_indexmapped dpu address space @%pK vbif_nrt3[drm:%s:%d] [dpu error]dpu_plane_init failed [crtc:%d] not active 3[drm:%s:%d] [dpu error]failed to install zpos property, rc = %d dpu_plane_prepare_fb_dpu_plane_calc_fill_level3[drm:%s] [dpu error]failed intf object creation: err %d dpu_rm_get_assigned_resources3[drm:%s] [dpu error]unable to find appropriate CTL VBIF %d: pnd 0x%X, src 0x%X invalid drm printer *ERROR* failed to allocate VRAM [%s%s%s: aspace=%p, %08llx,%s,inuse=%d]invalid buffer index: %u (out of %u) *ERROR* %s: completed fence: %u u64freq name = %s A6XX_TP0_TMO_DATAA6XX_TP1_SMO_DATACLUSTER_SP_VSA6XX_DBGBUS_DCSA6XX_DBGBUS_VFD_1 - regs-name: - type: - { offset: 0x%06x, value: 0x%08x } 4[drm] Unexpected interrupt: %#010x dp_catalog_panel_tpg_enablefailedfailed to complete DP link training Audio registration Dp failed failed to add mode %ux%u enteraux read failed. rlen=%zd failed to read link audio mode. rlen=%zd no core clocks are defined Enable core clks before link clks hdmi_pll*ERROR* failed to register pll clock com_lock_cmp1_mode0 = 0x%x 3%s: QFPROM AKSV chk failed (AKSV=%02x%08x) 3%s:AKSV write failed 3%s:R0' read failed V' H2msm_hdmi_hdcp_auth_part2_check_v_matchmsm_dsi_host_set_src_plldisp-enabledsi%d_pclk_muxdrivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c - source=%s bos: timestamp lo%s: GPMU firmware initialization failed: %d WRITEgmuGMU firmware is not loaded GMU fence error: 0x%x HFI_H2F_MSG_INIT*ERROR* Message %s id %d timed out waiting for response HDMI Core: %s, HDMI_CTRL=0x%08x htotal=%d, vtotal=%d, hstart=%d, hend=%d, vstart=%d, vend=%d *ERROR* failed to enable pwr clk: %s (%d) wait_for_completion msm_edp_ctrl_panel_connected3%s: Invalid link rate, %d hdmi_clk*ERROR* failed to allocate kms AVAIL: %d VIG2/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.ccrtc=%d clk_rate=%llu core_ib=%llu core_ab=%llu crtc%d -> enable %d, skip atomic_begin wait_for_completion_eventid: %u, sw_event:%d, rc in state %d id:%u pp:%d state:%d 3[drm:%s:%d] [dpu error]invalid encoder %d reg->en_offINTF_DISPLAY_V_START_F0/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.cdpu_kms_initlut%s|%d|%s drm_idirq_idxctl_idx[crtc:%d] not enable dpu_mdsssrc[%d,%d,%d,%d] dst[%d,%d,%d,%d] async=%d crtc_mask=%x *ERROR* could not install rd debugfs MSM_GEM_INFOMSM_GEM_MADVISEmsm_gem_get_pagesfailed to map: %d *ERROR* could not allocate memptrs: %d simple_ondemandnew_freq=%u Got %d for test active A6XX_SP_SMO_TAGA6XX_DBGBUS_RBBMA6XX_DBGBUS_VFDPA6XX_DBGBUS_VSCA6XX_DBGBUS_TPFCHEA6XX_DBGBUS_CCU_1%s: failed to register drm aux: %d dp_aux_registerdp_aux_transferhw: bit=%d train=%d max. voltage swing level reached %d wait4video timedout drm_dpcomponent add failed, rc=%d link rate = 0x%x sampling_rate = 0x%x, channel_count = 0x%x no downstream ports connected 3[drm-dp] %s: regulator %d set op mode failed, %d PLL_CMP: %u com_lock_cmp_en = 0x%x vddioKeys not ready(%d). s=%d, l0=%0x08x 3: BKSV doesn't have 20 1's and 20 0's 3%s: Recv ksv fifo timedout%s =%x 6%s: abort reauthentication! byte_intfSet clk rates: pclk=%d, byteclk=%lu 3%s: unable to initialize dsi clks bytedsi_drm_workbuf=%p dlen=%d diff=%d 3%s: rx ACK_ERR_PACLAGE pixel*ERROR* init panel failed %d *ERROR* %s: phy enable failed, %d *ERROR* %s: failed to map phy base *ERROR* %s: failed to map phy regulator base *ERROR* vsync_clk is not initialized DSI%d PLL restore state %x %x dsi%d_pll_out_div_clkdrivers/gpu/drm/msm/disp/mdp5/mdp5.xml.hdrivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.cA330A508%s: invalid param: %u *ERROR* No memory protection without IOMMU a5xx_cp_err_irqcrashdump writeCDP PrefetchHLSQ*ERROR* failed to get pwr regulator: %s (%d) 3%s: AUX channel is NOT ready 3%s: cannot get panel-en-gpios, %d edp_host_train_setexit setting lcdc_clk=%lu *ERROR* failed to construct crtc for %s *ERROR* failed to construct DSI encoder: %d *ERROR* errors: %08x msm_mdpencoder is disabled id=%u, intr=%d, irq=%d idleid:%u invalid timeout vblank_irqUBWC format not supported for fmt: %4.4s dpu_intr_set[reg_idx].clr_offformat_off + idxSSPP_VIG_CSC_10_OP_MODE + idxSSPP_SRC0_ADDR + idx + i * 0x4SSPP_SRC2_ADDR + idxSSPP_SRC_CONSTANT_COLOR + idxMERGE_3D_MODEVBIF_XIN_HALT_CTRL03%pS->%s: '%s' is not available pnum=%d fmt=%x mode=%d luts[0x%x, 0x%x] valueid=%u, pp=%d, timeout_count=%d, kickoff_count=%d, event=%u pixel_formatnew_bits3[drm:%s:%d] [dpu error]catalog init failed: %d dpu_kms_destroyintf_%ddanger3[dpu error]clock enable failed, ret:%d allocating %d bytes for fb %d stolenfb vmas:Resident: %4d objects, %9zu bytes Purged: %4d objects, %9zu bytes use_vram && !priv->vram.sizeinvalid type: %08x vddu32seqnomsm_dp_test_activemsm_dp dp_link: test_requested = %d lclk = %lld A6XX_SP_UAV_DATAA6XX_SP_TMO_UMO_TAGA6XX_HLSQ_CPS_MISC_RAM_TAGA6XX_HLSQ_GFX_CVS_CONST_RAM_TAGCLUSTER_PSA6XX_DBGBUS_GMU_GX - cluster-name: set pattern for link_train=%d failed %s clock doesn't exit to set rate %lu DP link status read failed, err: %d dp_hpd_connectlink 0x%x not supported no phy test Current: rate = 0x%x, lane count = 0x%x panel edid read failed no stream (pixel) clocks are defined failed to '%s' clks for: %s. err=%d onfailed to init clocks %d failed to %d clks, err: %d setting the default safe_to_exit_level = %u com_div_frac_start3_mode0 = 0x%x 3%s: no. of devs connected exceeds max allowed3%s: can't set parent to byte_clk_src. ret=%d dsi_bus_clk_enablelane number=%d Cmd test pattern setup done *ERROR* %s: failed to map pll base *ERROR* %s: vtotal(%d) or vrefresh(%d) is 0 dsi%dvco_clkdrivers/gpu/drm/msm/msm_gem_prime.cA305qcom,adreno-%u.%u%s: Unable to load GPMU firmware. GPMU will not be active TP|VFD*ERROR* Unable to start the HFI queues *ERROR* Unable to find the %s registers *ERROR* Unable to map the %s registers *ERROR* failed to create HDMI bridge: %d *ERROR* failed to enable HPD: %d Failed to attach an audio codec %d *ERROR* timeout waiting for DDC pattern=%x edp_train_pattern_set_writeedp_start_link_train_2invalid pipetv_clk*ERROR* failed to get lvds_clk iface_clk*ERROR* failed to construct DTV encoder *ERROR* failed to initialize HDMI: %d pp done time out, lm=%d *ERROR* failed to init irq: %d *ERROR* failed to construct crtc %d (%d) *ERROR* unknown intf: %d tbu_rtSTAGE0RGB13[drm:%s:%d] [dpu error]invalid IRQ index: [%d] 3[drm:%s:%d] [dpu error]no bandwidth limits specified crtc=%d disable threshold_low_dpu_core_perf_calc_crtcoffsets[%d]:%8u dpu_crtc_atomic_flushenc%d sw_event:%d, work cancelled /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c3[drm:%s:%d] [dpu error]enc%d intf%d disable autorefresh failed enc%d intf%d pp %d, enabling mode: 3unknown interface type %d 3failed to create dpu_hw_intf %d SSPP_CDP_CNTLQSEED3_PHASE_INIT_Y_H + scaler_offsetcsc_reg_off + 0x24VBIF_XINL_QOS_RP_REMAP_000 + reg_high3%pS->%s: %s en fail. rc=%d int%s: id:%u, sw_event:%d, idle_pc_supported:%s, rc_state:%d fb_idenc_idid:%d enc_id:%u pp_id:%u _dpu_kms_setup_displaysSSPP%d : 0x%x Disabling danger: plane%d plane doesn't have scaler/csc for yuv 3[drm:%s:%d] [dpu error]VBIF %d client %d not halting. TIMEDOUT. %pVboolcrtc_mask=%x /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/msm_debugfs.c16mmsm_gem_unpin_iova_locked*ERROR* could not get pages: %ld is_vunmapableinvalid handle %u at index %u /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/msm_gpu.cgpu_cx: %p hangrd - { offset: 0x%06x, value: 0x%08x } size: %d dp_ctrl_push_idleTU: lower_boundary_count: %d core_init=%d phy_init=%d After, core_inited=%d power_on=%d sink_count=%d failed to parse test_h_start(DP_TEST_H_START_HI) failed to parse test_rr_d (DP_TEST_MISC1) failed to parse test_rr_n link video pattern = 0x%x link dynamic range = 0x%x link bit depth = 0x%x TEST_H_TOTAL = %d, TEST_V_TOTAL = %d TEST_H_START = %d, TEST_V_START = %d TEST_HSYNC_POL = %d TEST_HSYNC_WIDTH = %d TEST_VSYNC_POL = %d TEST_VSYNC_WIDTH = %d TEST_H_WIDTH = %d TEST_V_HEIGHT = %d TEST_REFRESH_DENOMINATOR = %d TEST_REFRESH_NUMERATOR = %d bpp = %d updated bpp = %d ???Waiting for PHY ready phy_mode = 0x%x 6%s: AUTH_FAIL_INT rcvd, LINK0_STATUS=0x%08x &hdcp_ctrl->auth_event_queue3%s:BCAPS read failed BCAPS=%02x 3%s:BKSV read failed 3%s: BSTATUS write failed 3%s: Failed to enable dsi esc clk data-lanesqcom,dsi-phy-regulator-ldo-mode*ERROR* %s: Unable to get ahb clk a300_pfp.fwa512_zap.mdtA510a660_gmu.bin/mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/adreno/adreno_gpu.c wptr: %d loading PFP ucode version: %x RBBM | AHB transfer timeout 4*** gpu fault: iova=%.16lx flags=%d (%u,%u,%u,%u) GMU AHB bus error HFI_H2F_MSG_GX_BW_PERF_VOTE*ERROR* failed to create HDMI connector: %d extpfailed to disable hpd regulator: %s (%d) DDC timeout: %d *ERROR* couldn't init PLL *ERROR* failed to get IRQ: %d /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/edp/edp_connector.cedp_clk_init%s: idle pattern timedout msm_edp_phy_ready*ERROR* failed to enable regulator: %d msm8x16*ERROR* mdss irq domain add failed dpu_core_perf_crtc_checkdpu_core_perf_crtc_release_bw6[drm] fix performance mode 6[drm] normal performance mode 3[drm:%s:%d] [dpu error]%s: failed to get plane%d state, %d 3[drm:%s:%d] [dpu error]display: %dx%d%+d%+d plane: %dx%d%+d%+d irq timeout id=%u, intf=%d, pp=%d, intr=%d id:%u invalid timeout frame_busy_mask=%lu intf:%d vsync:%8d underrun:%8d dpu_encoder_phys_vid_setup_timing_engineINTF_PANEL_FORMATSSPP_UBWC_STATIC_CTRLSSPP_SW_PIX_EXT_C0_REQ_PIXELS + idxbase + PCC_RED_R_OFFmsm_dss_clk_set_ratelut_usageframe_busy_maskid=%u, event=%u timeout_countenum dpu_stageclk_rate3[drm:%s:%d] [dpu error]invalid kms 3[drm:%s:%d] [dpu error]dpu_kms_mmu_init failed: %d 3[drm:%s:%d] [dpu error]initialize_DP failed, rc = %d hw_log_mask3[drm:%s:%d] [dpu error][%u]invalid sblk dpu_plane_reset%d*ERROR* failed to populate children devices create framebuffer: mode_cmd=%p (%dx%d@%4.4s)create: FB ID: %d (%p)msm_gem_vunmapmsm_gem_active_get flags id ref offset kaddr size madv name is_active(msm_obj)handle %u at index %u already on submit list /mnt/disks/build-disk/src/android/common-android14-5.15/out/bazel/output_user_root/c126e7d3c13484ebc27ab7dd47bee034/sandbox/linux-sandbox/33/execroot/__main__/common/drivers/gpu/drm/msm/msm_iommu.cA6XX_DBGBUS_TSEusing phy test link parameters After, phy=%x init_count=%d power_on=%d read DPCD with updated AUX config link_rate=%d DIV_FRAC_START: %llu 6%s:AUTH_SUCCESS_INT received An not ready(%d). l0_status=0x%08x msm_hdmi_hdcp_send_aksv_an3: BKSV chk fail. BKSV=%02x%02x%02x%02x%02x msm_hdmi_hdcp_auth_part1_recv_r0HDCP_SHA_STATUS=%08x 3%s: can't get esc clock parent. ret=%d 3%s: Failed to enable dsi byte clk dsi_calc_clk_rate_6g3%s: regulator init failed *ERROR* %s: invalid lane configuration %d 3%s: can't find dsi_byte clock. ret=%d isr=0x%x, id=%d 3%s: get vaddr failed, %d data = 0x%x and ntohl(data) = 0x%x 3regulator enable failed, %d dsi%d_plldsi%dpllstep_size=%lld 4PLL turned on before configuring PHY 3Ref gen not ready. Aborting 4Turning OFF PHY while PLL is on ,9=@BP 0P P P P P P P P P P P P LP P P P P P P P P ((((((((((((((((((((((l(@8 ,P0@ P0@ P0@ @0P @(4@(4@(0LT8d H08T\@t 8HhxX((HX8pxlxp@P `0$4LT,(HX8hpP0@ P0@ @0P P0@ X8H(P0@ P0@ 8,D @0P @(4P0@ `P0@ `P0@ `@0P `P0@ `P0@ `@(4L@(4L@(4L@(4L@(4L4(@ P8D,\@(4LL4@(X@(4LdDT4@0P `P0@ `P0@ `@0P `P0@ `P0@ `@0P `P0@ `X8H(P0@ P0@ P0@ P0@ P0@ T4D$P0@ D4T$P0@ P0@ P0@ P0@ @0P P0@ P0@ P0@ P0@ @0P @0P @(4(4(0(P`p@0 P`0p@ P`0p@ P`0p@ P`0p@ P`0p@ P`0p@ pP`0@ P`0p@ d@L(p|X4d@L(p|X4d@L(p|X4P`0p@ P`0p@ `Pp0@ pP`0@ pP`0@ P`0p@ `pP`@p0P `Pp0@ `Pp0@ `Pp0@ P`0p@ XL@(4dp|d@L(p|X4d@L(p|X4d@L(p|X4h H X ( x 8  `@p0P P`0p@ P`0p@ P`0p@ P`0p@ P`0p@ P`0p@ 4LXdp@|(L4Xp|d@(L4X(p|d@\ 0@P\ht u, P,DX 4T<08              ,       T T    ,@ 0@ 0@ 0@ 0@ 0@ 0@ 0@ 0hang_debugsnapshot_debugbusallow_vram_carveoutBBB1B3B@BJBBBB  @@jBvBBBBB Bqcom,adrenoqcom,adreno-3xxamd,imageonqcom,kgsl-3d0 ;=@DFG@@CDKKMORRT[x  ) + / 1 @ C E E N O , , 0 0 8 < @ @ D D     4 5   &*,,    ! ! !!!!!!""""""######$#&###$$$$$$% % %%%%%%&&&&&&''''''$'&'''@@HHIIII ;=@DFG<<@O@@CDKKMORRT[x  ) + / 1 @ @ B C E E N O   0 0 8 9 < <     4 5   ! ! !!!!!!"""""" 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""""3DB"U  4  4 ȉ0< <0<P|$lpx0<P |  4  4 ȉ0< <0<P|$l`Dx0<P | Dm  4  4 ȉ0< <0<P|$l`Dx0<P | D`mqcom,hdmi-tx-8996qcom,hdmi-tx-8994qcom,hdmi-tx-8084qcom,hdmi-tx-8974qcom,hdmi-tx-8960qcom,hdmi-tx-8660  D4$@@   H8(@0    @ @ pb`mpb1`m0pbb`m`pbxi0uxi10u0xib0u`xiqiNui1Nu0ibNu`il "DB "1DB0 "bDB` " DD10Db`D'void (struct drm_crtc *)''void (struct irq_data *)''int (struct dp_parser *)''void (struct hdmi_phy *)''int (struct dpu_hw_ctl *)''void (struct drm_plane *)' $D`qcom,hdmi-phy-8660qcom,hdmi-phy-8960qcom,hdmi-phy-8974qcom,hdmi-phy-8084qcom,hdmi-phy-8996qcom,mdss-edp D <Y2b1xwg"!X(04' 9D 2Y/b1dk "?3X(5AR24AB24RA24BA24XR24XB24RX24BX24RG24BG24RG16BG16NV12NV21NV16NV61VYUYUYVYYUYVYVYUYU12YV12 ( @`?@`3@#@c@P @ *u  @`?@`7@`#@`c@P`p @`di @@?@`3@#@c@P@  !%)-159=AEIM x}   !%)-159=AEIM02,-.$&(* x} ,   ?!%)-159=AEIMQUY]468./01$&(*, xi @@@`@@p@di(@@@`@@p @di ,  @`@`@`@P`p@`ddi@`?@`7@`#@`c@P`p @`  @@`?@`7@`#@c@P` @`  @ @?@`7@`#@c@`@  @qcom,mdp5qcom,mdss_mdp     AR24AB24XB24RA24BA24BX24XR24RX24RG24BG24RG16BG16AR15AB15RA15BA15XR15XB15RX15BX15AR12AB12RA12BA12XR12XB12RX12BX12BA30RA30AB30AR30XR30BX30XB30RX30NV12NV21NV16NV61VYUYUYVYYUYVYVYUYU12YV12BG16AB24AR24XB24XR24AB30XB30NV12AB24AR24XB24XR24AB30XB30BG16@@PP``p  top_0\ctl_0)ctl_1*ctl_2+ctl_3,ctl_4-sspp_0@ sspp_1` sspp_2 sspp_3  sspp_8 @ sspp_9 ` sspp_10  sspp_11  lm_0@ lm_1P lm_2` @lm_3 lm_4 lm_5 pingpong_0$ pingpong_1$ pingpong_2 pingpong_3 intf_0 intf_1intf_2intf_3 vbif_0@@gg$5 5 ix sspp_src_0Psspp_scaler0 sspp_csc0&sspp_src_1Psspp_scaler1 sspp_csc1&sspp_src_2Psspp_scaler2 sspp_csc2&sspp_src_3Psspp_scaler3 sspp_csc3&sspp_src_8Psspp_src_9Psspp_src_10Psspp_src_11PAR24AB24RA24BX24BA24XR24XB24RX24RG24BG24RG16BG16AR15AB15RA15BA15XR15XB15RX15BX15AR12AB12RA12BA12XR12XB12RX12BX12NV12NV21NV16NV61VYUYUYVYYUYVYVYUYU12YV12AR24AB24RA24BA24XR24RX24BX24XB24RG24BG24RG16BG16AR15AB15RA15BA15XR15XB15RX15BX15AR12AB12RA12BA12XR12XB12RX12BX12 8Ph 0 0 WW3W3W3"W3" W3"" W3"" W3""" W3""" W3""""W3""""W3"""" wfUD wfUD3 wfUD3 wfUD3"wfUD3"wfUD3# ctl_0)ctl_1*ctl_2+ctl_3,ctl_4-ctl_57lm_0@ lm_1P lm_2` lm_3p lm_4 @lm_5  pingpong_0$ pingpong_1$ pingpong_2  pingpong_3  pingpong_4  >pingpong_5( ?merge_3d_00merge_3d_11merge_3d_22intf_0 intf_1intf_2intf_3 dspp_0@dspp_1`dspp_2dspp_3PP$5 5 ixW3""""wfUD3" top_0sspp_0@sspp_1`sspp_2sspp_3 sspp_8 @ sspp_9 ` sspp_10  sspp_11   K>I5 #ixsspp_src_0Psspp_scaler0 sspp_csc0&sspp_src_1Psspp_scaler1 sspp_csc1&sspp_src_2Psspp_scaler2 sspp_csc2&sspp_src_3Psspp_scaler3 sspp_csc3&wW3"""  top_0ctl_0)ctl_1*ctl_2+sspp_0@"sspp_8 @ sspp_9 ` sspp_10  lm_0@ lm_1P intf_0 intf_1dspp_0@gg$5 jixsspp_src_0Psspp_scaler0 sspp_csc0&  8Ph ` top_0 ctl_0P )ctl_1` *ctl_2p +ctl_3 ,sspp_0@"sspp_8 @ sspp_9 ` sspp_10  lm_0@ lm_2` lm_3p pingpong_0 pingpong_1 pingpong_2 pingpong_3 intf_0@ intf_1Pintf_5 `GG%&jix , $ ȡġȩĩȱıȹĹ$ $ AAAQQQȑđ   @ p`Pdpuqcom,sdm845-dpuqcom,sc7180-dpuqcom,sc7280-dpuqcom,sm8150-dpuqcom,sm8250-dpu**0***0*@@@drm_msm_atomicvramdumpstatemodesetqcom,mdp4qcom,mdssqcom,sdm845-mdssqcom,sc7180-mdssqcom,sc7280-mdssqcom,sm8150-mdssqcom,sm8250-mdssqcom,adrenoqcom,adreno-3xxamd,imageonqcom,kgsl-3d0; @d Bd Cd Dd@ Ed@ FdH Gd @ Hd Jd Kd@ Ld@ enable_evictionrd_fullnum_hw_submissionsdrm_msm_gpup$LLLLMMM MPPPP P PPP$P*P-P0P@PSPPPPPPPPPPPPPPPQQ@Q@QBQDQLQMQOQQQTQTQWQXQ]Q]QbQbQdQeQQQQQQQQQQQQQRR@R -<=?@BIXZ@^ '@BDGL/<?D #&&(+..03668;>>@CFF+@@ 3   `   ` T= = @ %%< <@<G<<<::00 000-000104060<0=0@0@0B0B0I0I0X0X0Z0a0d0h0l0m00000000000000000000011111111 1 1$1%1)1)11111T1T1V1V1X1X1Z1Z1\1\1^1^1`1`1b1b1 4 4448828<BBDDGGVV = 33@U !#$&'03@COo    ( > B M      +0289 (+07$7 #0144prxy 00 %((,/PR ;>@CS_pw  # +0255:?PR #  )*+,-./01234567?IJK@L@MNPQRSTUVWX YZ([`@a@b@ ==      epyЈ &3 '( %6 A! AE!B F" &B" "$0<@dpè )  ɹЩө01Ѵ      !$()89:;@AHIJKqcom,sc7180-dpvdda-1p2(Uvdda-0p9 -   LP;TX\` M ^$B(, 3 , v L$(,048<@D HLP;TX\`3dho ! LP;T\`II $(,l 3 vLP;Tk  LP;TX\` L }$(,@  LP;TX\` K {$ (,q 8  N $(,*LP;TX\`3dh23 , { L$(,048<@D H*LP;TX\`3dh23 , wL $(,048 <@D HLP;TX\`3dhqcom,mdss-dsi-ctrl       vddadavdd'dvddiodpvddIdvddadvddiod(+vddadvddiodvcca'dvdddlab_regibb_regvddadvddiodvddaFvccahB vddiod@`vddadvddiod@`vdda1@ ` vddvddaP@ ` vdda(U@ ` vdda(U@ vdda @ ` qcom,dsi-phy-14nmqcom,dsi-phy-14nm-660qcom,dsi-phy-10nmqcom,dsi-phy-10nm-8998qcom,dsi-phy-7nmqcom,dsi-phy-7nm-8150qcom,sc7280-dsi-phy-7nmvccahB m|MDdvcca m|MD d vdds ʚ;ÝD d vdds ʚ;ÝD d vdds F#*D d vdds ʚ;ÝD d vddsF#*D 'void (struct msm_gpu *, struct drm_minor *)''struct msm_gpu *(struct drm_device *)''int (struct msm_gpu *, unsigned long long *)'@ 'unsigned int (struct msm_gpu *, struct msm_ringbuffer *)' 'void (struct hdmi_phy *, unsigned long)' @`'void (struct mdp_irq *, unsigned int)''void (struct mdp_kms *, unsigned int, unsigned int)'    $ @@ @ P0`'unsigned int (struct dpu_hw_intr *, int, _Bool)''unsigned long (struct dpu_hw_intr *)''int (struct dpu_hw_intr *, int)''void (struct dpu_hw_intr *, unsigned long)''void (struct dpu_hw_intr *, void (*)(void *, int), void *)''int (struct dpu_hw_intr *)''void (struct dpu_hw_mixer *, unsigned int)''unsigned int (struct dpu_hw_ctl *, enum dpu_lm)''void (struct dpu_hw_ctl *, enum dpu_lm, struct dpu_hw_stage_cfg *)''void (struct dpu_hw_ctl *, unsigned long *)''void (struct dpu_hw_mixer *, unsigned int, unsigned int, unsigned int, unsigned int)''void (struct dpu_hw_mixer *, struct dpu_hw_mixer_cfg *)''void (struct dpu_hw_dspp *, struct dpu_hw_pcc_cfg *)''unsigned int (struct dpu_hw_ctl *, enum dpu_dspp)''int (struct dpu_encoder_phys *)''void (struct dpu_encoder_phys *, struct dpu_encoder_hw_resources *)''void (struct dpu_hw_mdp *, struct split_pipe_cfg *)''_Bool (struct dpu_encoder_phys *)''void (struct dpu_encoder_phys *)''int (struct dpu_encoder_phys *, _Bool)''void (struct dpu_hw_ctl *)''void (struct dpu_hw_mdp *)''void (struct dpu_hw_mdp *, struct dpu_vsync_source_cfg *)''void (struct dpu_hw_pingpong *, struct dpu_hw_dither_cfg *)''void (struct dpu_encoder_phys *, _Bool)''void (struct dpu_hw_ctl *, unsigned int)''void (void *, unsigned int)''int (struct dpu_encoder_phys *, struct dentry *)''void (struct dpu_encoder_phys *, struct drm_display_mode *, struct drm_display_mode *)''int (struct dpu_encoder_phys *, struct drm_crtc_state *, struct drm_connector_state *)''_Bool (struct dpu_encoder_phys *, const struct drm_display_mode *, struct drm_display_mode *)''_Bool (struct dpu_hw_pingpong *, unsigned int *)''void (struct dpu_hw_pingpong *, unsigned int, _Bool)''int (struct dpu_hw_pingpong *, _Bool)''int (struct dpu_hw_pingpong *, struct dpu_hw_pp_vsync_info *)''int (struct dpu_hw_pingpong *, struct dpu_hw_tear_check *)''unsigned int (struct dpu_hw_pingpong *)''void (struct dpu_hw_ctl *, enum dpu_intf)''void (struct dpu_hw_ctl *, enum dpu_merge_3d)''void (struct dpu_hw_intf *, const struct intf_timing_params *, const struct dpu_format *)''void (struct dpu_hw_ctl *, struct dpu_hw_intf_cfg *)''void (struct dpu_hw_intf *, _Bool, enum dpu_pingpong)''void (struct dpu_hw_merge_3d *, enum dpu_3d_blend_mode)''void (struct dpu_hw_intf *, const struct intf_prog_fetch *)''void (struct dpu_hw_intf *, unsigned char)''unsigned int (struct dpu_hw_ctl *)''unsigned int (struct dpu_hw_intf *)''void (struct dpu_hw_intf *, struct intf_status *)''void (struct drm_encoder *, struct dpu_encoder_phys *)''void (struct drm_encoder *, struct dpu_encoder_phys *, unsigned int)''void (struct dpu_mdss_cfg *)' @@'void (void *, int)''void (struct drm_encoder *)''void (struct dpu_hw_mdp *, struct dpu_danger_safe_status *)''unsigned int (struct dpu_hw_ctl *, enum dpu_sspp)''void (struct dpu_hw_pipe *, struct dpu_csc_cfg *)''void (struct dpu_hw_pipe *, unsigned int, enum dpu_sspp_multirect_index)''void (struct dpu_hw_pipe *, const struct dpu_format *, unsigned int, enum dpu_sspp_multirect_index)''void (struct dpu_hw_pipe *, struct dpu_hw_pipe_cfg *, enum dpu_sspp_multirect_index)''void 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_tpstrtab_msm_atomic_commit_tail_starta6xx_hfi_starttrace_raw_output_msm_atomic_wait_flush_start__tracepoint_msm_atomic_wait_flush_starttrace_event_raw_event_msm_atomic_wait_flush_start__event_msm_atomic_wait_flush_startprint_fmt_msm_atomic_wait_flush_startevent_class_msm_atomic_wait_flush_starttrace_event_fields_msm_atomic_wait_flush_starttrace_event_type_funcs_msm_atomic_wait_flush_start__traceiter_msm_atomic_wait_flush_start__bpf_trace_tp_map_msm_atomic_wait_flush_startperf_trace_msm_atomic_wait_flush_start__bpf_trace_msm_atomic_wait_flush_start__SCK__tp_func_msm_atomic_wait_flush_start__tpstrtab_msm_atomic_wait_flush_starta6xx_rpmh_startdp_hpd_event_thread_startdp_catalog_ctrl_get_interruptvm_get_page_prot__bitmap_andnotmsm_dsi_phy_snapshotmsm_dsi_host_snapshotdpu_kms_mdp_snapshotmsm_dp_snapshotmsm_dsi_snapshotdp_catalog_snapshottrace_raw_output_dpu_perf_set_ot__tracepoint_dpu_perf_set_ottrace_event_raw_event_dpu_perf_set_ot__event_dpu_perf_set_otprint_fmt_dpu_perf_set_otevent_class_dpu_perf_set_ottrace_event_fields_dpu_perf_set_ottrace_event_type_funcs_dpu_perf_set_ot__traceiter_dpu_perf_set_ot__bpf_trace_tp_map_dpu_perf_set_otperf_trace_dpu_perf_set_ot__bpf_trace_dpu_perf_set_ot__SCK__tp_func_dpu_perf_set_ot__tpstrtab_dpu_perf_set_otdpu_encoder_get_linecountmdp5_encoder_get_linecountmdp5_encoder_get_framecountmsm_gem_shrinker_countdev_pm_opp_get_opp_countdrm_dp_read_sink_countdrm_crtc_set_max_vblank_countdpu_hw_pp_get_line_countdpu_hw_intf_get_line_countdpu_encoder_phys_cmd_get_line_countdpu_encoder_phys_vid_get_line_countdpu_encoder_get_frame_countdpu_encoder_phys_vid_get_frame_countparam_ops_uintroq_printmeq_printpfp_printdrm_mm_printmsm_disp_state_printme_printkstrtointof_graph_get_next_endpointof_graph_parse_endpointdrm_syncobj_add_pointprepare_to_wait_eventdpu_encoder_wait_for_eventdrm_helper_hpd_irq_eventdrm_crtc_send_vblank_eventiommu_presentof_graph_get_remote_port_parentclk_set_parentclk_hw_get_parentclk_get_parentdivider_round_rate_parentcontext_init.identmsm_ioctl_gem_submit.identdrm_crtc_enable_color_mgmtmsm_gem_faultmdp4_plane_set_property.cfi_jta6xx_gpu_busy.cfi_jta5xx_gpu_busy.cfi_jttrace_raw_output_dpu_enc_frame_done_cb_not_busy.cfi_jttrace_event_raw_event_dpu_enc_frame_done_cb_not_busy.cfi_jt__traceiter_dpu_enc_frame_done_cb_not_busy.cfi_jtperf_trace_dpu_enc_frame_done_cb_not_busy.cfi_jt__bpf_trace_dpu_enc_frame_done_cb_not_busy.cfi_jtmsm_ioctl_submitqueue_query.cfi_jta6xx_destroy.cfi_jta5xx_destroy.cfi_jta4xx_destroy.cfi_jta3xx_destroy.cfi_jta2xx_destroy.cfi_jtmsm_gpummu_destroy.cfi_jtmsm_iommu_destroy.cfi_jt__msm_gem_submit_destroy.cfi_jtdpu_mdss_destroy.cfi_jtmdp5_mdss_destroy.cfi_jtdpu_kms_destroy.cfi_jtmdp5_kms_destroy.cfi_jtmdp4_lvds_connector_destroy.cfi_jtdsi_mgr_connector_destroy.cfi_jtedp_connector_destroy.cfi_jtmdp4_dtv_encoder_destroy.cfi_jtdpu_encoder_destroy.cfi_jtmdp4_dsi_encoder_destroy.cfi_jtmdp4_lcdc_encoder_destroy.cfi_jtmdp5_encoder_destroy.cfi_jtadreno_gpu_state_kref_destroy.cfi_jtmsm_submitqueue_destroy.cfi_jt__msm_file_private_destroy.cfi_jta6xx_gpu_state_destroy.cfi_jta5xx_gpu_state_destroy.cfi_jtdpu_plane_destroy.cfi_jtmdp5_plane_destroy.cfi_jtmdp4_plane_destroy.cfi_jtmsm_iommu_pagetable_destroy.cfi_jtmsm_gem_address_space_destroy.cfi_jtdpu_encoder_phys_cmd_destroy.cfi_jtdpu_encoder_phys_vid_destroy.cfi_jtdpu_crtc_destroy.cfi_jtmdp5_crtc_destroy.cfi_jtmdp4_crtc_destroy.cfi_jtdrm_gem_fb_destroy.cfi_jtmdp4_destroy.cfi_jtmsm_job_dependency.cfi_jtmdp5_set_split_display.cfi_jta6xx_show.cfi_jta5xx_show.cfi_jtmsm_gpu_show.cfi_jt_dpu_debugfs_status_show.cfi_jt_dpu_encoder_status_show.cfi_jtdpu_debugfs_danger_stats_show.cfi_jtdpu_debugfs_safe_stats_show.cfi_jtdpu_debugfs_core_irq_show.cfi_jtsmp_show.cfi_jtadreno_show.cfi_jtmsm_mm_show.cfi_jtmsm_gem_show.cfi_jtdp_test_active_show.cfi_jtdpu_crtc_debugfs_state_show.cfi_jtdp_test_type_show.cfi_jtmsm_fb_show.cfi_jtdp_test_data_show.cfi_jtmsm_ioctl_gem_new.cfi_jtmsm_ioctl_submitqueue_new.cfi_jttrace_raw_output_dpu_cmd_release_bw.cfi_jttrace_event_raw_event_dpu_cmd_release_bw.cfi_jt__traceiter_dpu_cmd_release_bw.cfi_jtperf_trace_dpu_cmd_release_bw.cfi_jt__bpf_trace_dpu_cmd_release_bw.cfi_jta6xx_gpu_state_put.cfi_jta5xx_gpu_state_put.cfi_jtadreno_gpu_state_put.cfi_jttrace_raw_output_dpu_plane_set_scanout.cfi_jttrace_event_raw_event_dpu_plane_set_scanout.cfi_jt__traceiter_dpu_plane_set_scanout.cfi_jtperf_trace_dpu_plane_set_scanout.cfi_jt__bpf_trace_dpu_plane_set_scanout.cfi_jttrace_raw_output_dpu_enc_wait_event_timeout.cfi_jttrace_event_raw_event_dpu_enc_wait_event_timeout.cfi_jt__traceiter_dpu_enc_wait_event_timeout.cfi_jtperf_trace_dpu_enc_wait_event_timeout.cfi_jt__bpf_trace_dpu_enc_wait_event_timeout.cfi_jttrace_raw_output_dpu_enc_phys_cmd_pdone_timeout.cfi_jttrace_event_raw_event_dpu_enc_phys_cmd_pdone_timeout.cfi_jt__traceiter_dpu_enc_phys_cmd_pdone_timeout.cfi_jtperf_trace_dpu_enc_phys_cmd_pdone_timeout.cfi_jt__bpf_trace_dpu_enc_phys_cmd_pdone_timeout.cfi_jtdpu_encoder_frame_done_timeout.cfi_jt__traceiter_dpu_enc_frame_done_timeout.cfi_jtdpu_hw_lm_setup_out.cfi_jtdpu_hw_sspp_setup_creq_lut.cfi_jtdpu_hw_sspp_setup_danger_safe_lut.cfi_jttrace_raw_output_msm_atomic_async_commit_start.cfi_jttrace_event_raw_event_msm_atomic_async_commit_start.cfi_jt__traceiter_msm_atomic_async_commit_start.cfi_jtperf_trace_msm_atomic_async_commit_start.cfi_jt__bpf_trace_msm_atomic_async_commit_start.cfi_jt__traceiter_dpu_hw_ctl_trigger_start.cfi_jtdpu_encoder_phys_cmd_trigger_start.cfi_jt__traceiter_dpu_enc_trigger_start.cfi_jttrace_raw_output_msm_atomic_commit_tail_start.cfi_jttrace_event_raw_event_msm_atomic_commit_tail_start.cfi_jt__traceiter_msm_atomic_commit_tail_start.cfi_jtperf_trace_msm_atomic_commit_tail_start.cfi_jt__bpf_trace_msm_atomic_commit_tail_start.cfi_jttrace_raw_output_msm_atomic_wait_flush_start.cfi_jttrace_event_raw_event_msm_atomic_wait_flush_start.cfi_jt__traceiter_msm_atomic_wait_flush_start.cfi_jtperf_trace_msm_atomic_wait_flush_start.cfi_jt__bpf_trace_msm_atomic_wait_flush_start.cfi_jtdpu_kms_mdp_snapshot.cfi_jttrace_raw_output_dpu_perf_set_ot.cfi_jttrace_event_raw_event_dpu_perf_set_ot.cfi_jt__traceiter_dpu_perf_set_ot.cfi_jtperf_trace_dpu_perf_set_ot.cfi_jt__bpf_trace_dpu_perf_set_ot.cfi_jtmsm_gem_shrinker_count.cfi_jtdpu_hw_pp_get_line_count.cfi_jtdpu_hw_intf_get_line_count.cfi_jtdpu_encoder_phys_cmd_get_line_count.cfi_jtdpu_encoder_phys_vid_get_line_count.cfi_jtdpu_encoder_phys_vid_get_frame_count.cfi_jtroq_print.cfi_jtmeq_print.cfi_jtpfp_print.cfi_jtme_print.cfi_jtmsm_gem_fault.cfi_jta6xx_hw_init.cfi_jta5xx_hw_init.cfi_jta4xx_hw_init.cfi_jta3xx_hw_init.cfi_jta2xx_hw_init.cfi_jtdpu_kms_hw_init.cfi_jtmdp5_hw_init.cfi_jtmdp4_hw_init.cfi_jttrace_event_raw_init.cfi_jta6xx_gpu_init.cfi_jta5xx_gpu_init.cfi_jta4xx_gpu_init.cfi_jta3xx_gpu_init.cfi_jta2xx_gpu_init.cfi_jta5xx_debugfs_init.cfi_jtdpu_kms_debugfs_init.cfi_jtmdp5_kms_debugfs_init.cfi_jtmsm_debugfs_init.cfi_jtdsi_pll_7nm_init.cfi_jtdsi_pll_14nm_init.cfi_jtdsi_pll_10nm_init.cfi_jtsdm845_cfg_init.cfi_jtsc7280_cfg_init.cfi_jtsc7180_cfg_init.cfi_jtsm8250_cfg_init.cfi_jtsm8150_cfg_init.cfi_jt__traceiter_dpu_kms_commit.cfi_jtdrm_atomic_helper_commit.cfi_jtdpu_kms_flush_commit.cfi_jttrace_raw_output_msm_atomic_flush_commit.cfi_jttrace_event_raw_event_msm_atomic_flush_commit.cfi_jt__traceiter_msm_atomic_flush_commit.cfi_jtperf_trace_msm_atomic_flush_commit.cfi_jt__bpf_trace_msm_atomic_flush_commit.cfi_jtmdp5_flush_commit.cfi_jtmdp4_flush_commit.cfi_jtdpu_kms_complete_commit.cfi_jt__traceiter_dpu_crtc_complete_commit.cfi_jtmdp5_complete_commit.cfi_jtmdp4_complete_commit.cfi_jtdpu_kms_prepare_commit.cfi_jtdpu_encoder_phys_cmd_prepare_commit.cfi_jtmdp5_prepare_commit.cfi_jtmdp4_prepare_commit.cfi_jtdpu_kms_disable_commit.cfi_jtmdp5_disable_commit.cfi_jtmdp4_disable_commit.cfi_jtdpu_kms_enable_commit.cfi_jtmdp5_enable_commit.cfi_jtmdp4_enable_commit.cfi_jta6xx_submit.cfi_jta5xx_submit.cfi_jta4xx_submit.cfi_jta3xx_submit.cfi_jta2xx_submit.cfi_jttrace_raw_output_msm_gpu_submit.cfi_jttrace_event_raw_event_msm_gpu_submit.cfi_jt__traceiter_msm_gpu_submit.cfi_jtperf_trace_msm_gpu_submit.cfi_jt__bpf_trace_msm_gpu_submit.cfi_jtmsm_ioctl_gem_submit.cfi_jtmsm_gem_dumb_map_offset.cfi_jtdrm_atomic_helper_connector_reset.cfi_jt__traceiter_dpu_enc_prepare_kickoff_reset.cfi_jtdpu_plane_reset.cfi_jtdrm_atomic_helper_plane_reset.cfi_jtmdp5_plane_reset.cfi_jtdpu_crtc_reset.cfi_jtdrm_atomic_helper_crtc_reset.cfi_jtmdp5_crtc_reset.cfi_jtreset_set.cfi_jtmdp5_crtc_cursor_set.cfi_jtmdp4_crtc_cursor_set.cfi_jtshrink_set.cfi_jtdpu_encoder_virt_mode_set.cfi_jtmdp4_dtv_encoder_mode_set.cfi_jtmdp4_dsi_encoder_mode_set.cfi_jtmdp4_lcdc_encoder_mode_set.cfi_jtdsi_mgr_bridge_mode_set.cfi_jtedp_bridge_mode_set.cfi_jtmsm_hdmi_bridge_mode_set.cfi_jtdpu_encoder_phys_cmd_mode_set.cfi_jtdpu_encoder_phys_vid_mode_set.cfi_jt__traceiter_dpu_enc_mode_set.cfi_jtmsm_devfreq_target.cfi_jtof_clk_hw_onecell_get.cfi_jtshrink_get.cfi_jta6xx_gpu_state_get.cfi_jta5xx_gpu_state_get.cfi_jta4xx_gpu_state_get.cfi_jta3xx_gpu_state_get.cfi_jta2xx_gpu_state_get.cfi_jttrace_raw_output_msm_gem_evict.cfi_jttrace_event_raw_event_msm_gem_evict.cfi_jt__traceiter_msm_gem_evict.cfi_jtperf_trace_msm_gem_evict.cfi_jt__bpf_trace_msm_gem_evict.cfi_jtmdp4_lvds_connector_detect.cfi_jtdsi_mgr_connector_detect.cfi_jtedp_connector_detect.cfi_jtmsm_hdmi_bridge_detect.cfi_jtdpu_hw_sspp_setup_multirect.cfi_jtdp_hpd_connect.cfi_jtdpu_hw_intf_audio_select.cfi_jtmsm_gem_free_object.cfi_jtmdp_get_format.cfi_jtdpu_hw_sspp_setup_format.cfi_jtdpu_get_msm_format.cfi_jtdpu_format_check_modified_format.cfi_jtmsm_devfreq_get_dev_status.cfi_jtdpu_hw_intr_get_interrupt_status.cfi_jtdpu_hw_ctl_wait_reset_status.cfi_jtdpu_hw_intf_get_status.cfi_jtdpu_hw_get_danger_status.cfi_jtdpu_hw_get_safe_status.cfi_jttrace_raw_output_dpu_perf_set_qos_luts.cfi_jttrace_event_raw_event_dpu_perf_set_qos_luts.cfi_jt__traceiter_dpu_perf_set_qos_luts.cfi_jtperf_trace_dpu_perf_set_qos_luts.cfi_jt__bpf_trace_dpu_perf_set_qos_luts.cfi_jttrace_raw_output_dpu_perf_set_danger_luts.cfi_jttrace_event_raw_event_dpu_perf_set_danger_luts.cfi_jt__traceiter_dpu_perf_set_danger_luts.cfi_jtperf_trace_dpu_perf_set_danger_luts.cfi_jt__bpf_trace_dpu_perf_set_danger_luts.cfi_jtdpu_hw_sspp_setup_rects.cfi_jtdpu_hw_sspp_setup_sourceaddress.cfi_jttrace_raw_output_dpu_enc_irq_wait_success.cfi_jttrace_event_raw_event_dpu_enc_irq_wait_success.cfi_jt__traceiter_dpu_enc_irq_wait_success.cfi_jtperf_trace_dpu_enc_irq_wait_success.cfi_jt__bpf_trace_dpu_enc_irq_wait_success.cfi_jt__traceiter_dpu_enc_irq_unregister_success.cfi_jt__traceiter_dpu_enc_irq_register_success.cfi_jtdpu_hw_clear_errors.cfi_jtdpu_hw_intr_clear_irqs.cfi_jtdpu_hw_intr_disable_irqs.cfi_jttrace_raw_output_msm_gem_purge_vmaps.cfi_jttrace_event_raw_event_msm_gem_purge_vmaps.cfi_jt__traceiter_msm_gem_purge_vmaps.cfi_jtperf_trace_msm_gem_purge_vmaps.cfi_jt__bpf_trace_msm_gem_purge_vmaps.cfi_jttrace_raw_output_dpu_rm_reserve_lms.cfi_jttrace_event_raw_event_dpu_rm_reserve_lms.cfi_jt__traceiter_dpu_rm_reserve_lms.cfi_jtperf_trace_dpu_rm_reserve_lms.cfi_jt__bpf_trace_dpu_rm_reserve_lms.cfi_jtdp_audio_hw_params.cfi_jtmsm_hdmi_audio_hw_params.cfi_jt__traceiter_dpu_rm_reserve_ctls.cfi_jttrace_raw_output_dpu_enc_atomic_check_flags.cfi_jttrace_event_raw_event_dpu_enc_atomic_check_flags.cfi_jt__traceiter_dpu_enc_atomic_check_flags.cfi_jtperf_trace_dpu_enc_atomic_check_flags.cfi_jt__bpf_trace_dpu_enc_atomic_check_flags.cfi_jtdpu_hw_ctl_clear_all_blendstages.cfi_jtmdp4_lvds_connector_get_modes.cfi_jtdsi_mgr_connector_get_modes.cfi_jtedp_connector_get_modes.cfi_jtdrm_helper_probe_single_connector_modes.cfi_jtdpu_encoder_phys_cmd_get_hw_resources.cfi_jtdpu_encoder_phys_vid_get_hw_resources.cfi_jttrace_raw_output_dpu_crtc_setup_lm_bounds.cfi_jttrace_event_raw_event_dpu_crtc_setup_lm_bounds.cfi_jt__traceiter_dpu_crtc_setup_lm_bounds.cfi_jtperf_trace_dpu_crtc_setup_lm_bounds.cfi_jt__bpf_trace_dpu_crtc_setup_lm_bounds.cfi_jta6xx_get_rptr.cfi_jta5xx_get_rptr.cfi_jta4xx_get_rptr.cfi_jta3xx_get_rptr.cfi_jta2xx_get_rptr.cfi_jtdpu_hw_pp_poll_timeout_wr_ptr.cfi_jtdpu_hw_lm_setup_border_color.cfi_jttrace_raw_output_dpu_crtc_setup_mixer.cfi_jttrace_event_raw_event_dpu_crtc_setup_mixer.cfi_jt__traceiter_dpu_crtc_setup_mixer.cfi_jtperf_trace_dpu_crtc_setup_mixer.cfi_jt__bpf_trace_dpu_crtc_setup_mixer.cfi_jtdpu_hw_ctl_get_bitmask_mixer.cfi_jta6xx_recover.cfi_jta5xx_recover.cfi_jta4xx_recover.cfi_jta3xx_recover.cfi_jta2xx_recover.cfi_jt_dpu_hw_sspp_get_scaler3_ver.cfi_jtdpu_encoder_early_unregister.cfi_jtdpu_plane_early_unregister.cfi_jtdpu_crtc_early_unregister.cfi_jtdpu_hw_ctl_get_flush_register.cfi_jtdpu_encoder_late_register.cfi_jtdpu_plane_late_register.cfi_jtdpu_crtc_late_register.cfi_jtdpu_encoder_phys_cmd_is_master.cfi_jtdpu_encoder_phys_vid_is_master.cfi_jtdpu_crtc_get_vblank_counter.cfi_jtmdp5_crtc_get_vblank_counter.cfi_jttrace_raw_output_dpu_trace_counter.cfi_jttrace_event_raw_event_dpu_trace_counter.cfi_jt__traceiter_dpu_trace_counter.cfi_jtperf_trace_dpu_trace_counter.cfi_jt__bpf_trace_dpu_trace_counter.cfi_jtdpu_encoder_phys_cmd_enable_helper.cfi_jt__traceiter_dpu_enc_rc_helper.cfi_jta5xx_preempt_timer.cfi_jtmsm_atomic_pending_timer.cfi_jtdpu_encoder_vsync_event_handler.cfi_jta6xx_fault_handler.cfi_jta5xx_fault_handler.cfi_jtmsm_fault_handler.cfi_jtmdp5_irq_error_handler.cfi_jtmdp4_irq_error_handler.cfi_jtdp_display_irq_handler.cfi_jtdpu_encoder_vsync_event_work_handler.cfi_jthangcheck_handler.cfi_jtdpu_core_irq_callback_handler.cfi_jtfault_worker.cfi_jtdsi_err_worker.cfi_jtunref_cursor_worker.cfi_jtrecover_worker.cfi_jtedp_ctrl_on_worker.cfi_jtvblank_ctrl_worker.cfi_jtedp_ctrl_off_worker.cfi_jtretire_worker.cfi_jtdsi_hpd_worker.cfi_jtdpu_hw_pp_setup_dither.cfi_jtmsm_hdmi_i2c_xfer.cfi_jtedp_aux_transfer.cfi_jtdsi_host_transfer.cfi_jtdsi_mgr_connector_best_encoder.cfi_jta6xx_irq.cfi_jta5xx_irq.cfi_jta4xx_irq.cfi_jta3xx_irq.cfi_jta2xx_irq.cfi_jtdpu_irq.cfi_jta6xx_gmu_irq.cfi_jtdsi_host_irq.cfi_jtdpu_encoder_phys_cmd_ctl_start_irq.cfi_jtwait_irq.cfi_jtdpu_mdss_irq.cfi_jtdpu_encoder_phys_cmd_pp_rd_ptr_irq.cfi_jtmdp5_crtc_err_irq.cfi_jtmdp4_crtc_err_irq.cfi_jtedp_irq.cfi_jtdpu_encoder_phys_cmd_underrun_irq.cfi_jtdpu_encoder_phys_vid_underrun_irq.cfi_jtmsm_irq.cfi_jthandle_level_irq.cfi_jtmdss_hw_unmask_irq.cfi_jtmdss_hw_mask_irq.cfi_jtdpu_encoder_phys_cmd_control_vblank_irq.cfi_jtdpu_encoder_phys_vid_control_vblank_irq.cfi_jtdpu_encoder_phys_vid_vblank_irq.cfi_jtmdp5_crtc_vblank_irq.cfi_jtmdp4_crtc_vblank_irq.cfi_jtmsm_hdmi_irq.cfi_jta6xx_hfi_irq.cfi_jtdpu_hw_intr_dispatch_irq.cfi_jtdpu_encoder_phys_cmd_pp_tx_done_irq.cfi_jtmdp5_crtc_pp_done_irq.cfi_jtmdp5_irq.cfi_jtmdp4_irq.cfi_jta6xx_gpu_set_freq.cfi_jta6xx_gmu_get_freq.cfi_jtmsm_devfreq_get_cur_freq.cfi_jtdpu_encoder_phys_cmd_mode_fixup.cfi_jtdpu_encoder_phys_vid_mode_fixup.cfi_jthdmi_phy_8x74_powerup.cfi_jthdmi_phy_8x60_powerup.cfi_jthdmi_phy_8960_powerup.cfi_jtdrm_connector_cleanup.cfi_jtdpu_hw_ctl_get_bitmask_sspp.cfi_jtdpu_hw_ctl_get_bitmask_dspp.cfi_jt__drm_puts_coredump.cfi_jt__drm_printfn_coredump.cfi_jtpstate_cmp.cfi_jta6xx_get_timestamp.cfi_jta5xx_get_timestamp.cfi_jta4xx_get_timestamp.cfi_jtdrm_crtc_vblank_helper_get_vblank_timestamp.cfi_jt__traceiter_dpu_crtc_complete_flip.cfi_jtdrm_atomic_helper_page_flip.cfi_jtmsm_ioctl_gem_cpu_prep.cfi_jtcompare_name_mdp.cfi_jtdpu_hw_sspp_setup_cdp.cfi_jtmsm_gem_shrinker_vmap.cfi_jtmsm_gem_prime_vmap.cfi_jtmsm_gem_prime_vunmap.cfi_jtmsm_gpummu_unmap.cfi_jtmsm_iommu_unmap.cfi_jtmsm_iommu_pagetable_unmap.cfi_jtmsm_gem_object_mmap.cfi_jtdrm_gem_mmap.cfi_jtmsm_gem_prime_mmap.cfi_jtdpu_hw_set_qos_remap.cfi_jtmsm_gpummu_map.cfi_jtmsm_iommu_map.cfi_jtmdss_hw_irqdomain_map.cfi_jtdpu_mdss_irqdomain_map.cfi_jtmsm_iommu_pagetable_map.cfi_jt__drm_printfn_info.cfi_jtmsm_ioctl_gem_info.cfi_jtdp_debug_read_info.cfi_jtdpu_hw_pp_get_vsync_info.cfi_jtmsm_pdev_shutdown.cfi_jtadreno_shutdown.cfi_jtdp_audio_shutdown.cfi_jtmsm_hdmi_audio_shutdown.cfi_jthdmi_phy_8x74_powerdown.cfi_jthdmi_phy_8x60_powerdown.cfi_jthdmi_phy_8960_powerdown.cfi_jtmsm_job_run.cfi_jtdpu_crtc_get_scanout_position.cfi_jtmdp5_crtc_get_scanout_position.cfi_jtmsm_gpummu_resume_translation.cfi_jtmsm_iommu_resume_translation.cfi_jtmsm_gem_prime_unpin.cfi_jtmsm_gem_prime_pin.cfi_jtdpu_crtc_atomic_begin.cfi_jtmdp5_crtc_atomic_begin.cfi_jtmdp4_crtc_atomic_begin.cfi_jtdelayed_work_timer_fn.cfi_jtmsm_gpu_open.cfi_jt_dpu_debugfs_status_open.cfi_jt_dpu_encoder_status_open.cfi_jtdpu_debugfs_danger_stats_open.cfi_jtdpu_debugfs_safe_stats_open.cfi_jtreset_fops_open.cfi_jtshrink_fops_open.cfi_jtdpu_debugfs_core_irq_open.cfi_jtdrm_gem_vm_open.cfi_jtmsm_open.cfi_jtdrm_open.cfi_jtperf_open.cfi_jtdp_test_active_open.cfi_jtdpu_crtc_debugfs_state_open.cfi_jtdp_test_type_open.cfi_jtsimple_open.cfi_jtrd_open.cfi_jtdp_test_data_open.cfi_jtdpu_hw_set_write_gather_en.cfi_jtmsm_gem_shrinker_scan.cfi_jtadreno_get_param.cfi_jtmsm_ioctl_get_param.cfi_jtdrm_compat_ioctl.cfi_jtdrm_ioctl.cfi_jtdpu_hw_set_halt_ctrl.cfi_jtdpu_hw_get_halt_ctrl.cfi_jtdpu_hw_sspp_setup_qos_ctrl.cfi_jttrace_raw_output_dpu_enc_phys_cmd_irq_ctrl.cfi_jttrace_event_raw_event_dpu_enc_phys_cmd_irq_ctrl.cfi_jt__traceiter_dpu_enc_phys_cmd_irq_ctrl.cfi_jtperf_trace_dpu_enc_phys_cmd_irq_ctrl.cfi_jt__bpf_trace_dpu_enc_phys_cmd_irq_ctrl.cfi_jttrace_raw_output_dpu_enc_phys_vid_irq_ctrl.cfi_jttrace_event_raw_event_dpu_enc_phys_vid_irq_ctrl.cfi_jt__traceiter_dpu_enc_phys_vid_irq_ctrl.cfi_jtperf_trace_dpu_enc_phys_vid_irq_ctrl.cfi_jt__bpf_trace_dpu_enc_phys_vid_irq_ctrl.cfi_jtdpu_hw_setup_clk_force_ctrl.cfi_jtdpu_hw_ctl_reset_control.cfi_jtdpu_encoder_phys_cmd_irq_control.cfi_jtdpu_encoder_phys_vid_irq_control.cfi_jtdrm_poll.cfi_jtdpu_hw_sspp_setup_solidfill.cfi_jtirq_domain_xlate_onecell.cfi_jtdpu_irq_postinstall.cfi_jtmdp5_irq_postinstall.cfi_jtmdp4_irq_postinstall.cfi_jtdpu_irq_uninstall.cfi_jtmdp5_irq_uninstall.cfi_jtmdp4_irq_uninstall.cfi_jtdpu_irq_preinstall.cfi_jtmdp5_irq_preinstall.cfi_jtmdp4_irq_preinstall.cfi_jtmsm_iommu_tlb_flush_all.cfi_jtmsm_atomic_commit_tail.cfi_jttrace_raw_output_dpu_vbif_wait_xin_halt_fail.cfi_jttrace_event_raw_event_dpu_vbif_wait_xin_halt_fail.cfi_jt__traceiter_dpu_vbif_wait_xin_halt_fail.cfi_jtperf_trace_dpu_vbif_wait_xin_halt_fail.cfi_jt__bpf_trace_dpu_vbif_wait_xin_halt_fail.cfi_jtmdp5_set_irqmask.cfi_jtmdp4_set_irqmask.cfi_jtdpu_mdss_irq_unmask.cfi_jtdpu_mdss_irq_mask.cfi_jt_msm_disp_snapshot_work.cfi_jtdpu_crtc_frame_event_work.cfi_jt__traceiter_dpu_enc_vsync_event_work.cfi_jtmsm_hdmi_hdcp_reauth_work.cfi_jtmsm_hdmi_hdcp_auth_work.cfi_jtmsm_hdmi_hotplug_work.cfi_jtmsm_atomic_pending_work.cfi_jtdpu_encoder_off_work.cfi_jtvmap_shrink.cfi_jtdpu_encoder_phys_cmd_wait_for_vblank.cfi_jtdpu_encoder_phys_vid_wait_for_vblank.cfi_jtdpu_kms_disable_vblank.cfi_jtmsm_crtc_disable_vblank.cfi_jtmdp5_disable_vblank.cfi_jtmdp4_disable_vblank.cfi_jtdpu_kms_enable_vblank.cfi_jtmsm_crtc_enable_vblank.cfi_jtmdp5_enable_vblank.cfi_jtmdp4_enable_vblank.cfi_jt__traceiter_dpu_crtc_vblank.cfi_jtdpu_kms_round_pixclk.cfi_jtmdp5_round_pixclk.cfi_jtmdp4_round_pixclk.cfi_jttrace_raw_output_dpu_core_perf_update_clk.cfi_jttrace_event_raw_event_dpu_core_perf_update_clk.cfi_jt__traceiter_dpu_core_perf_update_clk.cfi_jtperf_trace_dpu_core_perf_update_clk.cfi_jt__bpf_trace_dpu_core_perf_update_clk.cfi_jtdpu_hw_intf_bind_pingpong_blk.cfi_jtmsm_iommu_tlb_flush_walk.cfi_jtnoop_llseek.cfi_jtno_llseek.cfi_jtgeneric_file_llseek.cfi_jtseq_lseek.cfi_jtdpu_hw_intr_unlock.cfi_jtdsi_7nm_set_continuous_clock.cfi_jtdpu_hw_intr_lock.cfi_jtdrm_atomic_helper_check.cfi_jtmdp5_plane_atomic_async_check.cfi_jtdpu_encoder_virt_atomic_check.cfi_jtmdp5_encoder_atomic_check.cfi_jtdpu_plane_atomic_check.cfi_jtmdp5_plane_atomic_check.cfi_jtmdp4_plane_atomic_check.cfi_jtdpu_crtc_atomic_check.cfi_jtmdp5_crtc_atomic_check.cfi_jtmdp4_crtc_atomic_check.cfi_jt__traceiter_dpu_enc_atomic_check.cfi_jt__traceiter_dpu_core_irq_unregister_callback.cfi_jt__traceiter_dpu_core_irq_register_callback.cfi_jtdpu_encoder_underrun_callback.cfi_jtdpu_encoder_vblank_callback.cfi_jtdpu_encoder_frame_done_callback.cfi_jtmsm_ioctl_gem_cpu_fini.cfi_jttrace_raw_output_msm_gpu_submit_flush.cfi_jttrace_event_raw_event_msm_gpu_submit_flush.cfi_jt__traceiter_msm_gpu_submit_flush.cfi_jtperf_trace_msm_gpu_submit_flush.cfi_jt__bpf_trace_msm_gpu_submit_flush.cfi_jtdpu_kms_wait_flush.cfi_jtmdp5_wait_flush.cfi_jtmdp4_wait_flush.cfi_jtdpu_hw_ctl_trigger_flush.cfi_jttrace_raw_output_dpu_enc_trigger_flush.cfi_jttrace_event_raw_event_dpu_enc_trigger_flush.cfi_jt__traceiter_dpu_enc_trigger_flush.cfi_jtperf_trace_dpu_enc_trigger_flush.cfi_jt__bpf_trace_dpu_enc_trigger_flush.cfi_jtdpu_hw_ctl_get_pending_flush.cfi_jt__traceiter_dpu_hw_ctl_trigger_pending_flush.cfi_jt__traceiter_dpu_hw_ctl_clear_pending_flush.cfi_jttrace_raw_output_dpu_hw_ctl_update_pending_flush.cfi_jttrace_event_raw_event_dpu_hw_ctl_update_pending_flush.cfi_jt__traceiter_dpu_hw_ctl_update_pending_flush.cfi_jtperf_trace_dpu_hw_ctl_update_pending_flush.cfi_jt__bpf_trace_dpu_hw_ctl_update_pending_flush.cfi_jtdpu_encoder_phys_cmd_needs_single_flush.cfi_jtdpu_encoder_phys_vid_needs_single_flush.cfi_jtdpu_crtc_atomic_flush.cfi_jtmdp5_crtc_atomic_flush.cfi_jtmdp4_crtc_atomic_flush.cfi_jttrace_raw_output_msm_atomic_async_commit_finish.cfi_jttrace_event_raw_event_msm_atomic_async_commit_finish.cfi_jt__traceiter_msm_atomic_async_commit_finish.cfi_jtperf_trace_msm_atomic_async_commit_finish.cfi_jt__bpf_trace_msm_atomic_async_commit_finish.cfi_jttrace_raw_output_msm_atomic_commit_tail_finish.cfi_jttrace_event_raw_event_msm_atomic_commit_tail_finish.cfi_jt__traceiter_msm_atomic_commit_tail_finish.cfi_jtperf_trace_msm_atomic_commit_tail_finish.cfi_jt__bpf_trace_msm_atomic_commit_tail_finish.cfi_jttrace_raw_output_msm_atomic_wait_flush_finish.cfi_jttrace_event_raw_event_msm_atomic_wait_flush_finish.cfi_jt__traceiter_msm_atomic_wait_flush_finish.cfi_jtperf_trace_msm_atomic_wait_flush_finish.cfi_jt__bpf_trace_msm_atomic_wait_flush_finish.cfi_jtdpu_hw_intf_setup_prg_fetch.cfi_jtdsi_host_attach.cfi_jtmsm_gpummu_detach.cfi_jtmsm_iommu_detach.cfi_jtdsi_host_detach.cfi_jta6xx_active_ring.cfi_jta5xx_active_ring.cfi_jtadreno_active_ring.cfi_jtdpu_hw_ctl_trigger_pending.cfi_jt__traceiter_dpu_crtc_frame_event_more_pending.cfi_jttrace_raw_output_dpu_crtc_disable_frame_pending.cfi_jttrace_event_raw_event_dpu_crtc_disable_frame_pending.cfi_jt__traceiter_dpu_crtc_disable_frame_pending.cfi_jtperf_trace_dpu_crtc_disable_frame_pending.cfi_jt__bpf_trace_dpu_crtc_disable_frame_pending.cfi_jtdrm_atomic_helper_set_config.cfi_jtdpu_hw_pp_get_autorefresh_config.cfi_jtdpu_hw_pp_setup_autorefresh_config.cfi_jtdpu_hw_pp_setup_te_config.cfi_jtdpu_hw_sspp_setup_pe_config.cfi_jtdpu_hw_lm_setup_blend_config.cfi_jtdpu_hw_ctl_intf_cfg.cfi_jttrace_event_reg.cfi_jtdsi_tx_buf_put_6g.cfi_jtdsi_tx_buf_get_6g.cfi_jtdsi_dma_base_get_6g.cfi_jtdsi_link_clk_set_rate_6g.cfi_jtdsi_calc_clk_rate_6g.cfi_jtdsi_link_clk_disable_6g.cfi_jtdsi_link_clk_enable_6g.cfi_jtdsi_tx_buf_alloc_6g.cfi_jtdpu_hw_ctl_update_pending_flush_intf.cfi_jt__traceiter_dpu_rm_reserve_intf.cfi_jtcompare_of.cfi_jtdpu_hw_set_limit_conf.cfi_jtdpu_hw_get_limit_conf.cfi_jt__traceiter_dpu_enc_early_kickoff.cfi_jtdpu_encoder_phys_cmd_handle_post_kickoff.cfi_jtdpu_encoder_phys_vid_handle_post_kickoff.cfi_jttrace_raw_output_dpu_enc_phys_vid_post_kickoff.cfi_jttrace_event_raw_event_dpu_enc_phys_vid_post_kickoff.cfi_jt__traceiter_dpu_enc_phys_vid_post_kickoff.cfi_jtperf_trace_dpu_enc_phys_vid_post_kickoff.cfi_jt__bpf_trace_dpu_enc_phys_vid_post_kickoff.cfi_jtdpu_encoder_phys_cmd_prepare_for_kickoff.cfi_jtdpu_encoder_phys_vid_prepare_for_kickoff.cfi_jt__traceiter_dpu_enc_prepare_kickoff.cfi_jt__traceiter_dpu_enc_kickoff.cfi_jtmsm_hdmi_phy_remove.cfi_jtdp_display_remove.cfi_jtmsm_pdev_remove.cfi_jtdpu_dev_remove.cfi_jtedp_dev_remove.cfi_jtdsi_dev_remove.cfi_jtmsm_hdmi_dev_remove.cfi_jtmdp5_dev_remove.cfi_jtadreno_remove.cfi_jtmdp5_crtc_cursor_move.cfi_jtmdp4_crtc_cursor_move.cfi_jtdpu_hw_ctl_set_fetch_pipe_active.cfi_jtsimple_attr_write.cfi_jt_dpu_plane_danger_write.cfi_jttrace_raw_output_tracing_mark_write.cfi_jttrace_event_raw_event_tracing_mark_write.cfi_jt__traceiter_tracing_mark_write.cfi_jtperf_trace_tracing_mark_write.cfi_jt__bpf_trace_tracing_mark_write.cfi_jtdp_test_active_write.cfi_jt_dpu_core_perf_mode_write.cfi_jtdpu_encoder_phys_cmd_wait_for_tx_complete.cfi_jtdp_pm_complete.cfi_jtmsm_pm_complete.cfi_jtdrm_atomic_helper_connector_destroy_state.cfi_jtdpu_kms_global_destroy_state.cfi_jtmdp5_global_destroy_state.cfi_jtdpu_plane_destroy_state.cfi_jtdrm_atomic_helper_plane_destroy_state.cfi_jtmdp5_plane_destroy_state.cfi_jtdpu_crtc_destroy_state.cfi_jtdrm_atomic_helper_crtc_destroy_state.cfi_jtmdp5_crtc_destroy_state.cfi_jtmdp5_plane_atomic_print_state.cfi_jtmdp5_crtc_atomic_print_state.cfi_jtdsi_7nm_pll_save_state.cfi_jtdsi_14nm_pll_save_state.cfi_jtdsi_10nm_pll_save_state.cfi_jtdrm_atomic_helper_connector_duplicate_state.cfi_jtdpu_kms_global_duplicate_state.cfi_jtmdp5_global_duplicate_state.cfi_jtdpu_plane_duplicate_state.cfi_jtdrm_atomic_helper_plane_duplicate_state.cfi_jtmdp5_plane_duplicate_state.cfi_jtdpu_crtc_duplicate_state.cfi_jtdrm_atomic_helper_crtc_duplicate_state.cfi_jtmdp5_crtc_duplicate_state.cfi_jtdsi_7nm_pll_restore_state.cfi_jtdsi_14nm_pll_restore_state.cfi_jtdsi_10nm_pll_restore_state.cfi_jtdsi_pll_14nm_postdiv_set_rate.cfi_jtdsi_pll_7nm_vco_set_rate.cfi_jtdsi_pll_14nm_vco_set_rate.cfi_jtdsi_pll_10nm_vco_set_rate.cfi_jtmpd4_lvds_pll_set_rate.cfi_jthdmi_pll_set_rate.cfi_jthdmi_8996_pll_set_clk_rate.cfi_jtdsi_pll_14nm_postdiv_round_rate.cfi_jtmpd4_lvds_pll_round_rate.cfi_jthdmi_pll_round_rate.cfi_jthdmi_8996_pll_round_rate.cfi_jtdsi_pll_7nm_clk_round_rate.cfi_jtdsi_pll_14nm_clk_round_rate.cfi_jtdsi_pll_10nm_clk_round_rate.cfi_jtdsi_pll_14nm_postdiv_recalc_rate.cfi_jtdsi_pll_7nm_vco_recalc_rate.cfi_jtdsi_pll_14nm_vco_recalc_rate.cfi_jtdsi_pll_10nm_vco_recalc_rate.cfi_jtmpd4_lvds_pll_recalc_rate.cfi_jthdmi_pll_recalc_rate.cfi_jthdmi_8996_pll_recalc_rate.cfi_jttrace_raw_output_dpu_id_event_template.cfi_jttrace_event_raw_event_dpu_id_event_template.cfi_jtperf_trace_dpu_id_event_template.cfi_jt__bpf_trace_dpu_id_event_template.cfi_jttrace_raw_output_dpu_rm_iter_template.cfi_jttrace_event_raw_event_dpu_rm_iter_template.cfi_jtperf_trace_dpu_rm_iter_template.cfi_jt__bpf_trace_dpu_rm_iter_template.cfi_jttrace_raw_output_dpu_enc_irq_template.cfi_jttrace_event_raw_event_dpu_enc_irq_template.cfi_jtperf_trace_dpu_enc_irq_template.cfi_jt__bpf_trace_dpu_enc_irq_template.cfi_jttrace_raw_output_dpu_enc_keyval_template.cfi_jttrace_event_raw_event_dpu_enc_keyval_template.cfi_jtperf_trace_dpu_enc_keyval_template.cfi_jt__bpf_trace_dpu_enc_keyval_template.cfi_jttrace_raw_output_dpu_core_irq_callback_template.cfi_jttrace_event_raw_event_dpu_core_irq_callback_template.cfi_jtperf_trace_dpu_core_irq_callback_template.cfi_jt__bpf_trace_dpu_core_irq_callback_template.cfi_jttrace_raw_output_dpu_drm_obj_template.cfi_jttrace_event_raw_event_dpu_drm_obj_template.cfi_jtperf_trace_dpu_drm_obj_template.cfi_jt__bpf_trace_dpu_drm_obj_template.cfi_jttrace_raw_output_dpu_hw_ctl_pending_flush_template.cfi_jttrace_event_raw_event_dpu_hw_ctl_pending_flush_template.cfi_jtperf_trace_dpu_hw_ctl_pending_flush_template.cfi_jt__bpf_trace_dpu_hw_ctl_pending_flush_template.cfi_jttrace_raw_output_dpu_enc_ktime_template.cfi_jttrace_event_raw_event_dpu_enc_ktime_template.cfi_jtperf_trace_dpu_enc_ktime_template.cfi_jt__bpf_trace_dpu_enc_ktime_template.cfi_jttrace_raw_output_dpu_enc_id_enable_template.cfi_jttrace_event_raw_event_dpu_enc_id_enable_template.cfi_jtperf_trace_dpu_enc_id_enable_template.cfi_jt__bpf_trace_dpu_enc_id_enable_template.cfi_jttrace_raw_output_dpu_crtc_enable_template.cfi_jttrace_event_raw_event_dpu_crtc_enable_template.cfi_jtperf_trace_dpu_crtc_enable_template.cfi_jt__bpf_trace_dpu_crtc_enable_template.cfi_jtmsm_framebuffer_create.cfi_jtmsm_gem_dumb_create.cfi_jttrace_raw_output_dpu_perf_crtc_update.cfi_jttrace_event_raw_event_dpu_perf_crtc_update.cfi_jt__traceiter_dpu_perf_crtc_update.cfi_jtperf_trace_dpu_perf_crtc_update.cfi_jt__bpf_trace_dpu_perf_crtc_update.cfi_jtmdp5_plane_atomic_async_update.cfi_jtdpu_plane_atomic_update.cfi_jtmdp5_plane_atomic_update.cfi_jtmdp4_plane_atomic_update.cfi_jttrace_raw_output_dpu_pp_connect_ext_te.cfi_jttrace_event_raw_event_dpu_pp_connect_ext_te.cfi_jt__traceiter_dpu_pp_connect_ext_te.cfi_jtperf_trace_dpu_pp_connect_ext_te.cfi_jt__bpf_trace_dpu_pp_connect_ext_te.cfi_jt__traceiter_dpu_enc_phys_cmd_connect_te.cfi_jtdpu_hw_pp_connect_external_te.cfi_jtdpu_hw_pp_enable_te.cfi_jtdp_parser_parse.cfi_jtmsm_postclose.cfi_jtdrm_fb_helper_lastclose.cfi_jtdrm_gem_vm_close.cfi_jtmsm_ioctl_submitqueue_close.cfi_jtmsm_ioctl_gem_madvise.cfi_jtmsm_gpu_release.cfi_jtsimple_attr_release.cfi_jtdrm_release.cfi_jtperf_release.cfi_jtsingle_release.cfi_jtdma_fence_release.cfi_jtrd_release.cfi_jtdsi_pll_7nm_vco_unprepare.cfi_jtdsi_pll_14nm_vco_unprepare.cfi_jtdsi_pll_10nm_vco_unprepare.cfi_jthdmi_8996_pll_unprepare.cfi_jt__traceiter_dpu_hw_ctl_trigger_prepare.cfi_jtdsi_pll_7nm_vco_prepare.cfi_jtdsi_pll_14nm_vco_prepare.cfi_jtdsi_pll_10nm_vco_prepare.cfi_jtdp_pm_prepare.cfi_jtmsm_pm_prepare.cfi_jthdmi_8996_pll_prepare.cfi_jtdpu_hw_set_mem_type.cfi_jtdpu_hw_setup_split_pipe.cfi_jttrace_raw_output_dpu_enc_phys_cmd_pp_tx_done.cfi_jttrace_event_raw_event_dpu_enc_phys_cmd_pp_tx_done.cfi_jt__traceiter_dpu_enc_phys_cmd_pp_tx_done.cfi_jtperf_trace_dpu_enc_phys_cmd_pp_tx_done.cfi_jt__bpf_trace_dpu_enc_phys_cmd_pp_tx_done.cfi_jt__traceiter_dpu_crtc_frame_event_done.cfi_jt__traceiter_dpu_kms_wait_for_commit_done.cfi_jtdpu_encoder_phys_cmd_wait_for_commit_done.cfi_jtdpu_encoder_phys_vid_wait_for_commit_done.cfi_jtdpu_hw_intf_setup_timing_engine.cfi_jtdpu_hw_intf_enable_timing_engine.cfi_jtdrm_atomic_helper_update_plane.cfi_jtdrm_atomic_helper_disable_plane.cfi_jttrace_raw_output_msm_gpu_resume.cfi_jttrace_event_raw_event_msm_gpu_resume.cfi_jt__traceiter_msm_gpu_resume.cfi_jtperf_trace_msm_gpu_resume.cfi_jt__bpf_trace_msm_gpu_resume.cfi_jtadreno_resume.cfi_jta6xx_pm_resume.cfi_jta5xx_pm_resume.cfi_jta4xx_pm_resume.cfi_jtmsm_gpu_pm_resume.cfi_jtdp_pm_resume.cfi_jtmsm_pm_resume.cfi_jtdpu_runtime_resume.cfi_jtmsm_runtime_resume.cfi_jtmsm_dsi_runtime_resume.cfi_jt__traceiter_dpu_crtc_runtime_resume.cfi_jtmdp5_runtime_resume.cfi_jtpm_runtime_force_resume.cfi_jtdpu_kms_vsync_time.cfi_jtmsm_fence_get_driver_name.cfi_jtmsm_fence_get_timeline_name.cfi_jtinit_module.cfi_jtcleanup_module.cfi_jt__drm_puts_seq_file.cfi_jt__drm_printfn_seq_file.cfi_jtdrm_gem_prime_fd_to_handle.cfi_jtdrm_gem_fb_create_handle.cfi_jtmsm_gem_prime_import_sg_table.cfi_jtmsm_gem_prime_get_sg_table.cfi_jtdsi_7nm_phy_disable.cfi_jtdsi_14nm_phy_disable.cfi_jtdsi_10nm_phy_disable.cfi_jtdsi_mgr_bridge_post_disable.cfi_jtedp_bridge_post_disable.cfi_jtmsm_hdmi_bridge_post_disable.cfi_jtdpu_encoder_virt_disable.cfi_jtdpu_mdss_disable.cfi_jtmdp5_mdss_disable.cfi_jtmdp4_dtv_encoder_disable.cfi_jtmdp4_dsi_encoder_disable.cfi_jtmdp4_lcdc_encoder_disable.cfi_jtmdp5_encoder_disable.cfi_jtmpd4_lvds_pll_disable.cfi_jthdmi_pll_disable.cfi_jttrace_raw_output_dpu_plane_disable.cfi_jttrace_event_raw_event_dpu_plane_disable.cfi_jt__traceiter_dpu_plane_disable.cfi_jtperf_trace_dpu_plane_disable.cfi_jt__bpf_trace_dpu_plane_disable.cfi_jtdsi_mgr_bridge_disable.cfi_jtedp_bridge_disable.cfi_jtmsm_hdmi_bridge_disable.cfi_jtdpu_encoder_phys_cmd_disable.cfi_jtdpu_encoder_phys_vid_disable.cfi_jt__traceiter_dpu_crtc_disable.cfi_jt__traceiter_dpu_enc_disable.cfi_jtmdp5_crtc_atomic_disable.cfi_jtmdp4_crtc_atomic_disable.cfi_jtdsi_7nm_phy_enable.cfi_jtdsi_14nm_phy_enable.cfi_jtdsi_10nm_phy_enable.cfi_jtdpu_encoder_virt_enable.cfi_jtdpu_mdss_enable.cfi_jtmdp5_mdss_enable.cfi_jtmdp4_dtv_encoder_enable.cfi_jtdpu_kms_encoder_enable.cfi_jtmdp4_dsi_encoder_enable.cfi_jtmdp4_lcdc_encoder_enable.cfi_jtmdp5_encoder_enable.cfi_jtmpd4_lvds_pll_enable.cfi_jthdmi_pll_enable.cfi_jttrace_raw_output_dpu_crtc_vblank_enable.cfi_jttrace_event_raw_event_dpu_crtc_vblank_enable.cfi_jt__traceiter_dpu_crtc_vblank_enable.cfi_jtperf_trace_dpu_crtc_vblank_enable.cfi_jt__bpf_trace_dpu_crtc_vblank_enable.cfi_jtdsi_mgr_bridge_pre_enable.cfi_jtedp_bridge_pre_enable.cfi_jtmsm_hdmi_bridge_pre_enable.cfi_jtdsi_mgr_bridge_enable.cfi_jtedp_bridge_enable.cfi_jtmsm_hdmi_bridge_enable.cfi_jtdpu_encoder_phys_cmd_enable.cfi_jtdpu_encoder_phys_vid_enable.cfi_jt__traceiter_dpu_crtc_enable.cfi_jttrace_raw_output_dpu_enc_enable.cfi_jttrace_event_raw_event_dpu_enc_enable.cfi_jt__traceiter_dpu_enc_enable.cfi_jtperf_trace_dpu_enc_enable.cfi_jt__bpf_trace_dpu_enc_enable.cfi_jt__traceiter_dpu_kms_enc_enable.cfi_jtmdp5_crtc_atomic_enable.cfi_jtmdp4_crtc_atomic_enable.cfi_jttrace_raw_output_msm_gem_purge.cfi_jttrace_event_raw_event_msm_gem_purge.cfi_jt__traceiter_msm_gem_purge.cfi_jtperf_trace_msm_gem_purge.cfi_jt__bpf_trace_msm_gem_purge.cfi_jttrace_raw_output_msm_gpu_freq_change.cfi_jttrace_event_raw_event_msm_gpu_freq_change.cfi_jt__traceiter_msm_gpu_freq_change.cfi_jtperf_trace_msm_gpu_freq_change.cfi_jt__bpf_trace_msm_gpu_freq_change.cfi_jttrace_raw_output_msm_gmu_freq_change.cfi_jttrace_event_raw_event_msm_gmu_freq_change.cfi_jt__traceiter_msm_gmu_freq_change.cfi_jtperf_trace_msm_gmu_freq_change.cfi_jt__bpf_trace_msm_gmu_freq_change.cfi_jtdpu_hw_ctl_setup_blendstage.cfi_jtmsm_iommu_tlb_add_page.cfi_jtdrm_gem_object_free.cfi_jtmsm_gpu_devcoredump_free.cfi_jtdrm_syncobj_free.cfi_jtmsm_disp_state_free.cfi_jt__drm_atomic_state_free.cfi_jtmsm_job_free.cfi_jtdpu_hw_merge_3d_setup_3d_mode.cfi_jtdpu_hw_setup_vsync_source.cfi_jtmsm_ioctl_wait_fence.cfi_jta6xx_create_private_address_space.cfi_jta6xx_create_address_space.cfi_jta2xx_create_address_space.cfi_jtadreno_iommu_create_address_space.cfi_jtmsm_hdmi_phy_probe.cfi_jtdp_display_probe.cfi_jtmsm_pdev_probe.cfi_jtdpu_dev_probe.cfi_jtedp_dev_probe.cfi_jtdsi_dev_probe.cfi_jtmsm_hdmi_dev_probe.cfi_jtmdp5_dev_probe.cfi_jtdsi_phy_driver_probe.cfi_jtadreno_probe.cfi_jtdp_display_unbind.cfi_jtdpu_unbind.cfi_jtedp_unbind.cfi_jtadreno_unbind.cfi_jtmsm_drm_unbind.cfi_jtdsi_unbind.cfi_jtmsm_hdmi_unbind.cfi_jtmdp5_unbind.cfi_jtdp_display_bind.cfi_jtdpu_bind.cfi_jtedp_bind.cfi_jtadreno_bind.cfi_jtmsm_drm_bind.cfi_jtdsi_bind.cfi_jtmsm_hdmi_bind.cfi_jtmdp5_bind.cfi_jttrace_raw_output_msm_gpu_suspend.cfi_jttrace_event_raw_event_msm_gpu_suspend.cfi_jt__traceiter_msm_gpu_suspend.cfi_jtperf_trace_msm_gpu_suspend.cfi_jt__bpf_trace_msm_gpu_suspend.cfi_jtadreno_suspend.cfi_jta6xx_pm_suspend.cfi_jta5xx_pm_suspend.cfi_jta4xx_pm_suspend.cfi_jtmsm_gpu_pm_suspend.cfi_jtdp_pm_suspend.cfi_jtmsm_pm_suspend.cfi_jtdpu_runtime_suspend.cfi_jtmsm_runtime_suspend.cfi_jtmsm_dsi_runtime_suspend.cfi_jtmdp5_runtime_suspend.cfi_jtpm_runtime_force_suspend.cfi_jtdp_audio_get_eld.cfi_jtmdp4_lvds_connector_mode_valid.cfi_jtdsi_mgr_connector_mode_valid.cfi_jtedp_connector_mode_valid.cfi_jtmsm_hdmi_bridge_mode_valid.cfi_jtmsm_hdmi_bridge_get_edid.cfi_jtdrm_gem_prime_handle_to_fd.cfi_jtdpu_plane_format_mod_supported.cfi_jttrace_raw_output_msm_gpu_submit_retired.cfi_jttrace_event_raw_event_msm_gpu_submit_retired.cfi_jt__traceiter_msm_gpu_submit_retired.cfi_jtperf_trace_msm_gpu_submit_retired.cfi_jt__bpf_trace_msm_gpu_submit_retired.cfi_jthdmi_8996_pll_is_enabled.cfi_jtmsm_fence_signaled.cfi_jtshow_locked.cfi_jtdpu_hw_intr_disable_irq_locked.cfi_jtdpu_hw_intr_enable_irq_locked.cfi_jtdrm_fb_helper_output_poll_changed.cfi_jthpd_event_thread.cfi_jtsimple_attr_read.cfi_jt_dpu_plane_danger_read.cfi_jtseq_read.cfi_jtmsm_gpu_devcoredump_read.cfi_jtdisp_devcoredump_read.cfi_jtdrm_read.cfi_jtperf_read.cfi_jt_dpu_core_perf_mode_read.cfi_jtrd_read.cfi_jtdpu_hw_sspp_setup_csc.cfi_jttrace_raw_output_dpu_enc_rc.cfi_jttrace_event_raw_event_dpu_enc_rc.cfi_jt__traceiter_dpu_enc_rc.cfi_jtperf_trace_dpu_enc_rc.cfi_jt__bpf_trace_dpu_enc_rc.cfi_jtdpu_encoder_phys_cmd_prepare_idle_pc.cfi_jtmsm_hdmi_i2c_func.cfi_jtdpu_setup_dspp_pcc.cfi_jtmsm_framebuffer_dirtyfb.cfi_jtmdp5_crtc_mode_set_nofb.cfi_jtmdp4_crtc_mode_set_nofb.cfi_jtdpu_plane_cleanup_fb.cfi_jtmdp5_plane_cleanup_fb.cfi_jtmdp4_plane_cleanup_fb.cfi_jtdpu_plane_prepare_fb.cfi_jtmdp5_plane_prepare_fb.cfi_jtmdp4_plane_prepare_fb.cfi_jt__traceiter_dpu_crtc_frame_event_cb.cfi_jt__traceiter_dpu_enc_frame_event_cb.cfi_jtdp_display_usbpd_disconnect_cb.cfi_jt__traceiter_dpu_enc_underrun_cb.cfi_jtdp_display_usbpd_attention_cb.cfi_jt__traceiter_dpu_crtc_vblank_cb.cfi_jt__traceiter_dpu_enc_vblank_cb.cfi_jtdp_display_usbpd_configure_cb.cfi_jttrace_raw_output_dpu_enc_frame_done_cb.cfi_jttrace_event_raw_event_dpu_enc_frame_done_cb.cfi_jt__traceiter_dpu_enc_frame_done_cb.cfi_jtperf_trace_dpu_enc_frame_done_cb.cfi_jt__bpf_trace_dpu_enc_frame_done_cb.cfi_jtdp_audio_hook_plugged_cb.cfi_jtdpu_hw_lm_setup_blend_config_sdm845.cfi_jtdpu_hw_lm_setup_color3.cfi_jt_dpu_hw_sspp_setup_scaler3.cfi_jtdsi_clk_init_v2.cfi_jtdsi_tx_buf_get_v2.cfi_jtdsi_dma_base_get_v2.cfi_jtdsi_clk_init_6g_v2.cfi_jtdsi_link_clk_set_rate_v2.cfi_jtdsi_calc_clk_rate_v2.cfi_jtdsi_link_clk_disable_v2.cfi_jtdsi_link_clk_enable_v2.cfi_jtdsi_tx_buf_alloc_v2.cfi_jt_dpu_debugfs_show_regset32.cfi_jtdpu_debugfs_open_regset32.cfi_jtdpu_hw_ctl_trigger_flush_v1.cfi_jtdpu_hw_ctl_intf_cfg_v1.cfi_jtdpu_hw_ctl_update_pending_flush_intf_v1.cfi_jtdpu_hw_ctl_update_pending_flush_merge_3d_v1.cfi_jtunref_cursor_worker.871.cfi_jtdp_ctrl_phy_exitdp_catalog_ctrl_update_transfer_unitmsm_drm_uninitdp_aux_deinitdp_power_client_deinitdp_power_deinitdpu_hw_catalog_deinitdrm_sched_entity_initmsm_edp_phy_initdp_ctrl_phy_initmsm_edp_aux_init__mutex_inita6xx_hw_inita5xx_hw_inita4xx_hw_inita3xx_hw_inita2xx_hw_initmsm_gpu_hw_inita5xx_preempt_hw_initdpu_kms_hw_initadreno_hw_initmdp5_hw_initmdp4_hw_inittrace_event_raw_inita6xx_gpu_inita5xx_gpu_inita4xx_gpu_inita3xx_gpu_inita2xx_gpu_initadreno_gpu_initmsm_gpu_inita6xx_gmu_initmsm_dsi_host_inita5xx_preempt_initmsm_disp_snapshot_initdp_power_client_initmsm_dsi_host_modeset_initmsm_edp_modeset_initmsm_dp_modeset_initmsm_dsi_modeset_initmsm_hdmi_modeset_initdrm_gem_object_initdrm_gem_private_object_initdpu_mdss_initmdp5_mdss_initdpu_kms_initmdp5_kms_initmdp4_kms_inita5xx_debugfs_initdpu_kms_debugfs_initmdp5_kms_debugfs_initmsm_dp_debugfs_initmsm_debugfs_initmsm_perf_debugfs_initdpu_core_perf_debugfs_initmsm_rd_debugfs_inita6xx_gmu_rpmh_arc_votes_initdpu_hw_intr_initmdp4_lvds_connector_initmsm_dsi_manager_connector_initmsm_edp_connector_initdp_drm_connector_initdrm_bridge_connector_initdsi_phy_regulator_initmdp5_mixer_inita5xx_power_initdp_power_inithrtimer_initmsm_gem_shrinker_initmsm_framebuffer_initdrm_framebuffer_initmdp4_dtv_encoder_initdpu_encoder_initdrm_encoder_initmdp4_dsi_encoder_initmdp4_lcdc_encoder_initmdp5_encoder_initdpu_debugfs_core_irq_initmsm_devfreq_initdpu_hw_sspp_initdpu_hw_dspp_initdpu_hw_mdptop_initmdp5_smp_initmsm_hdmi_hdcp_initdp_catalog_audio_initmdss_irq_domain_initdpu_rm_initdsi_pll_7nm_initdsi_pll_14nm_initdsi_pll_10nm_initdrm_mm_initmdp5_ctlm_initdpu_hw_lm_initadreno_gpu_ocmem_initdpu_hw_ctl_initmsm_edp_ctrl_initmpd4_lvds_pll_initdrm_kms_helper_poll_initdrm_flip_work_initdrm_vblank_initdrm_modeset_lock_initdrm_atomic_private_obj_inita6xx_hfi_inita6xx_gmu_fw_start.rpmh_initdpu_hw_catalog_initdpu_hw_pingpong_initdrmm_mode_config_initmdp5_cfg_initsdm845_cfg_initsc7280_cfg_initsc7180_cfg_initsm8250_cfg_initsm8150_cfg_initdpu_hw_intf_initdpu_core_perf_initdpu_hw_vbif_initdpu_debugfs_vbif_initmsm_submitqueue_initmsm_debugfs_late_initww_acquire_initdrm_modeset_acquire_initmdp5_pipe_initmsm_edp_phy_vm_pe_initdpu_plane_initdrm_universal_plane_initmdp5_plane_initmdp4_plane_inithdmi_audio_infoframe_initmsm_dsi_manager_ext_bridge_initmsm_dsi_manager_bridge_initmsm_edp_bridge_initmsm_hdmi_bridge_inita5xx_gpmu_ucode_initdma_fence_initdpu_encoder_phys_cmd_initdpu_encoder_phys_vid_initdrm_sched_initdpu_hw_merge_3d_initdpu_crtc_initmdp5_crtc_initmdp4_crtc_initmsm_hdmi_i2c_initdrm_sched_job_initmsm_hdmi_pll_8996_initmsm_hdmi_pll_8960_init__tracepoint_dpu_kms_commit__event_dpu_kms_commit__traceiter_dpu_kms_commit__bpf_trace_tp_map_dpu_kms_commit__SCK__tp_func_dpu_kms_commit__tpstrtab_dpu_kms_commitdrm_atomic_helper_commitmsm_dsi_h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_iovamsm_framebuffer_iovamsm_gem_unpin_iovamsm_gem_get_and_pin_iovamsm_gem_iovacmd_db_read_aux_dataa6xx_show_cluster_datairq_set_chip_dataof_device_get_match_datasdm845_perf_datasc7280_perf_datasc7180_perf_datasm8250_perf_datasm8150_perf_datadp_catalog_aux_write_datairq_set_chained_handler_and_datadp_catalog_aux_read_datacodec_datadp_catalog_ctrl_config_msamsm_gem_init_vmamsm_gem_unmap_vmamsm_gem_map_vmamsm_gem_close_vmamsm_gem_purge_vmaadd_vmasdm845_regdmasm8250_regdmasm8150_regdma_dpu_plane_setup_csc.dpu_csc_YUV2RGB_601L_dpu_plane_setup_csc.dpu_csc10_YUV2RGB_601L_note_9$d.8999$d.7999$d.6999$d.5999$d.4999$x.3999$x.2999$d.1999$x.999$d.8899$x.7899$d.6899$d.5899$d.4899$x.3899$d.2899$d.1899$x.899$d.8799$x.7799$x.6799$d.5799$d.4799$x.3799$x.2799$d.1799$x.799$d.8699$x.7699$d.6699$d.5699$x.4699$x.3699$x.2699$x.1699$x.699$d.8599$d.7599$d.6599$d.5599$x.4599$x.3599$d.2599.Ltmp1599$x.1599$x.599$d.8499$d.7499$x.6499$d.5499$d.4499$d.3499.Ltmp2499$x.2499$d.1499$x.499$d.9399$d.8399.Ltmp7399$x.7399$x.6399$d.5399$d.4399$d.3399$x.2399$d.1399$x.399$d.9299.Ltmp8299$d.8299$x.7299$x.6299$d.5299$d.4299$x.3299$d.2299$d.1299$d.299$d.9199$d.8199$x.7199$x.6199$x.5199$d.4199$x.3199$d.2199.Ltmp1199$x.1199$d.199$d.9099$d.8099$d.7099$x.6099$x.5099$x.4099$x.3099$d.2099$d.1099$d.99$d.8989$x.7989$d.6989$d.5989$d.4989$x.3989$x.2989$x.1989$x.989$d.8889$x.7889$x.6889$d.5889$d.4889$x.3889$d.2889$d.1889$d.889$d.8789$x.7789$d.6789$d.5789$x.4789$x.3789$x.2789$d.1789$d.789.Ltmp9689$d.8689$x.7689$d.6689$x.5689$d.4689$d.3689$x.2689$x.1689$d.689$d.8589$x.7589$d.6589$d.5589$x.4589$d.3589$x.2589$x.1589$x.589$d.8489.Ltmp7489$d.7489$x.6489$d.5489$d.4489$x.3489$x.2489.Ltmp1489$d.1489$d.489$d.9389$d.8389$x.7389$d.6389$x.5389$d.4389$x.3389$x.2389$d.1389$d.389$d.9289$d.8289$x.7289$x.6289$d.5289$d.4289$x.3289$x.2289$x.1289$d.289$d.9189$d.8189$x.7189$d.6189$x.5189$d.4189$d.3189$x.2189$x.1189$d.189$d.9089$d.8089$d.7089$x.6089$x.5089$x.4089$d.3089.Ltmp2089$d.2089$x.1089$d.89$d.8979$x.7979$d.6979$x.5979$d.4979$x.3979$d.2979$x.1979$x.979$d.8879$x.7879$d.6879$d.5879$d.4879$x.3879$x.2879.Ltmp1879$d.1879$d.879$d.8779$x.7779$x.6779$x.5779$x.4779$d.3779$x.2779.Ltmp1779$d.1779$x.779$d.8679$x.7679$x.6679$d.5679$x.4679$x.3679$x.2679$d.1679$x.679$d.8579$d.7579$d.6579$x.5579$d.4579$d.3579$x.2579$x.1579$x.579$d.8479$d.7479$d.6479$x.5479$d.4479$x.3479$x.2479$d.1479$d.479$d.9379$d.8379$x.7379$d.6379$x.5379$d.4379$d.3379.Ltmp2379$x.2379$d.1379$x.379$d.9279$d.8279$x.7279$x.6279$d.5279$d.4279$d.3279.Ltmp2279$d.2279$x.1279$d.279$d.9179$d.8179.Ltmp7179$d.7179$d.6179$x.5179$d.4179$x.3179$x.2179$x.1179$d.179$d.9079.Ltmp8079$d.8079$d.7079$x.6079$x.5079$x.4079$d.3079$x.2079$d.1079$d.79$d.8969$x.7969$d.6969$d.5969$d.4969$x.3969$d.2969.Ltmp1969$d.1969$x.969$d.8869$x.7869$x.6869$d.5869$x.4869$x.3869$x.2869$d.1869init_completion.__key.869$x.869$d.8769$x.7769$d.6769$x.5769$d.4769$x.3769$d.2769$x.1769$x.769.Ltmp8669$d.8669$x.7669$x.6669$x.5669$d.4669$x.3669$x.2669.Ltmp1669$d.1669$x.669$d.8569$x.7569$d.6569$x.5569$x.4569$d.3569$d.2569$x.1569$x.569$d.8469$d.7469$x.6469$x.5469$d.4469$d.3469.Ltmp2469$x.2469$d.1469$x.469$d.9369$d.8369.Ltmp7369$x.7369$d.6369$x.5369$d.4369$x.3369$x.2369$d.1369$d.369$d.9269$d.8269$x.7269$x.6269$d.5269$d.4269$d.3269$d.2269$x.1269$d.269$d.9169$d.8169$x.7169$d.6169$x.5169$x.4169$x.3169$x.2169$x.1169$d.169$d.9069$d.8069$x.7069$d.6069$x.5069$x.4069$d.3069$d.2069$x.1069$x.69$d.8959$x.7959$x.6959$x.5959$d.4959$x.3959$d.2959$d.1959$x.959$d.8859$x.7859$x.6859$d.5859$x.4859$x.3859$d.2859$d.1859$x.859$d.8759$x.7759$x.6759$x.5759$d.4759$x.3759$x.2759$x.1759$x.759.Ltmp9659$d.8659$x.7659$x.6659$x.5659$d.4659$x.3659$x.2659$x.1659$x.659$d.8559$d.7559$d.6559$x.5559$x.4559$x.3559$d.2559$x.1559$d.559$d.8459.Ltmp7459$d.7459$x.6459$d.5459$d.4459$d.3459$x.2459$d.1459$x.459$d.9359$d.8359$x.7359$x.6359$x.5359$d.4359$d.3359$x.2359$d.1359$x.359$d.9259$d.8259$d.7259$x.6259$d.5259$d.4259$d.3259$d.2259$d.1259$d.259$d.9159$d.8159$x.7159$x.6159$d.5159$x.4159$x.3159$d.2159$d.1159$x.159funcs.159$d.9059$d.8059$d.7059$x.6059$d.5059$x.4059.Ltmp3059$x.3059.Ltmp2059$x.2059$x.1059$x.59update_inactive._rs.59$d.8949$x.7949$x.6949$x.5949$x.4949$x.3949$d.2949$x.1949$x.949$d.8849$x.7849$x.6849$x.5849$d.4849$x.3849$d.2849$d.1849$x.849$d.8749$x.7749$x.6749$x.5749$d.4749$d.3749$x.2749$x.1749$d.749$d.8649$x.7649$x.6649$x.5649$d.4649$x.3649$x.2649$x.1649$x.649$d.8549$d.7549$d.6549$x.5549$x.4549$x.3549$x.2549$d.1549$d.549$d.9449$d.8449$d.7449$x.6449$x.5449$d.4449$d.3449$x.2449$d.1449$d.449$d.9349$d.8349$x.7349$d.6349$x.5349$d.4349$d.3349.Ltmp2349$x.2349$x.1349$x.349$d.9249$d.8249$d.7249$x.6249$d.5249$d.4249$d.3249.Ltmp2249$d.2249$d.1249$x.249$d.9149$d.8149$x.7149$d.6149$d.5149$x.4149$x.3149.Ltmp2149$d.2149$x.1149$x.149$d.9049$d.8049$x.7049$d.6049.Ltmp5049$d.5049$x.4049$x.3049$d.2049$d.1049$x.49$d.8939$x.7939$x.6939$d.5939$d.4939$x.3939$d.2939.Ltmp1939$d.1939$x.939$d.8839$x.7839$x.6839$x.5839$d.4839$x.3839$x.2839.Ltmp1839$d.1839$x.839$d.8739$x.7739$d.6739$d.5739.Ltmp4739$d.4739$x.3739$x.2739$d.1739$d.739$d.8639$d.7639$d.6639$x.5639$x.4639$d.3639$d.2639.Ltmp1639$x.1639$x.639$d.8539$x.7539$d.6539$d.5539$x.4539$d.3539$x.2539.Ltmp1539$d.1539$d.539$d.9439$d.8439$d.7439$x.6439$d.5439$d.4439$d.3439.Ltmp2439$x.2439$d.1439$x.439$d.9339$d.8339$x.7339$d.6339$x.5339$d.4339pll_init.3339$d.3339$x.2339$x.1339$d.339$d.9239$d.8239$x.7239$x.6239$x.5239$d.4239$d.3239.Ltmp2239$d.2239$d.1239$x.239$d.9139$d.8139$x.7139$x.6139$d.5139$x.4139$d.3139$d.2139$x.1139$d.139$d.9039$d.8039$d.7039$x.6039$d.5039$x.4039$d.3039$x.2039$d.1039$x.39a6xx_cp_hw_err_irq._rs.39$d.8929$x.7929$x.6929$x.5929$d.4929$x.3929$x.2929$d.1929$x.929$d.8829$x.7829$d.6829$x.5829$d.4829$x.3829$x.2829$d.1829$d.829$d.8729$x.7729$d.6729$d.5729.Ltmp4729$d.4729$x.3729$x.2729$x.1729$x.729.Ltmp629$d.8629$x.7629$d.6629$x.5629$d.4629$x.3629$d.2629$x.1629$x.629__UNIQUE_ID_description529__UNIQUE_ID_firmware529$d.8529$x.7529$d.6529$x.5529$x.4529$x.3529.Ltmp2529$x.2529.Ltmp1529$d.1529$d.529$d.9429$d.8429.Ltmp7429$x.7429$x.6429$x.5429$d.4429$d.3429$d.2429$d.1429$x.429__UNIQUE_ID_alias329$d.8329$x.7329$d.6329$d.5329$d.4329$x.3329$d.2329$x.1329$d.329$d.9229$d.8229$d.7229$x.6229$x.5229$d.4229$x.3229.Ltmp2229$d.2229$x.1229$x.229$d.9129$d.8129$d.7129$x.6129$d.5129$x.4129$d.3129$x.2129$x.1129$d.129$d.9029$d.8029$x.7029$d.6029$d.5029$x.4029$x.3029.Ltmp2029$x.2029$d.1029$x.29$d.8919$x.7919$x.6919$x.5919$d.4919$x.3919$x.2919$d.1919$x.919$d.8819$x.7819$d.6819$x.5819$x.4819$x.3819$x.2819$d.1819$x.819.Ltmp9719$d.8719$x.7719$d.6719$d.5719$x.4719$x.3719$x.2719$x.1719$x.719$d.8619$x.7619$x.6619$x.5619$d.4619$x.3619$d.2619$x.1619$d.619__UNIQUE_ID_firmware519__UNIQUE_ID_vramtype519$d.8519.Ltmp7519$x.7519$d.6519$x.5519$d.4519$x.3519$x.2519$d.1519$d.519$d.9419$d.8419$x.7419$x.6419$d.5419$d.4419$d.3419$d.2419$d.1419$d.419__UNIQUE_ID_alias319$d.9319$d.8319$d.7319$x.6319$x.5319$d.4319$x.3319.Ltmp2319$d.2319$x.1319$d.319$d.9219$d.8219$x.7219$x.6219$d.5219$d.4219$x.3219$d.2219$x.1219$x.219$d.9119$d.8119$d.7119$d.6119$x.5119$x.4119$x.3119.Ltmp2119$x.2119$x.1119$x.119$d.9019$d.8019$d.7019$d.6019$d.5019$x.4019$x.3019$d.2019$x.1019$x.19a5xx_rbbm_err_irq._rs.19$d.8909$x.7909$x.6909$d.5909$d.4909$x.3909$x.2909$d.1909$x.909$d.8809$x.7809$x.6809$d.5809$d.4809$x.3809$x.2809.Ltmp1809$d.1809$x.809$d.8709$x.7709$d.6709$x.5709$x.4709$x.3709$x.2709.Ltmp1709$d.1709$x.709$d.8609$d.7609$d.6609$x.5609$x.4609$x.3609$d.2609.Ltmp1609$x.1609$d.609$d.8509$d.7509$x.6509$x.5509$d.4509$x.3509$d.2509$x.1509$x.509$d.9409$d.8409$x.7409$x.6409$d.5409$d.4409$d.3409.Ltmp2409$x.2409$d.1409$x.409__UNIQUE_ID_alias309$d.9309$d.8309$x.7309$x.6309$d.5309$d.4309$x.3309$d.2309$x.1309$d.309$d.9209.Ltmp8209$d.8209$d.7209$x.6209$x.5209$d.4209$x.3209$d.2209$x.1209$x.209$d.9109$d.8109$d.7109$x.6109$x.5109$x.4109$x.3109$x.2109$d.1109$x.109$d.9009$d.8009$x.7009$x.6009$d.5009$x.4009$x.3009$d.2009$x.1009$d.9bpf_trace_run8_note_8$d.8998.Ltmp7998$d.7998$x.6998$x.5998$x.4998$d.3998$d.2998$x.1998$d.998$d.8898$x.7898$x.6898$x.5898$x.4898$x.3898$x.2898.Ltmp1898$x.1898$x.898$d.8798$x.7798$x.6798$x.5798$x.4798$d.3798$d.2798$x.1798$d.798.Ltmp9698$d.8698$x.7698$x.6698$x.5698$d.4698$d.3698$d.2698$d.1698$d.698$d.8598$x.7598$x.6598$x.5598$d.4598$x.3598$x.2598$d.1598$d.598$d.8498.Ltmp7498$x.7498$d.6498$x.5498$x.4498$x.3498$d.2498$x.1498$d.498$d.9398$d.8398$d.7398$x.6398$x.5398$x.4398$x.3398$d.2398$x.1398$d.398$d.9298$d.8298$x.7298$d.6298$x.5298$x.4298$d.3298$x.2298$x.1298$x.298$d.9198$d.8198$x.7198$d.6198$x.5198$x.4198$x.3198$x.2198$d.1198$x.198$d.9098$d.8098$x.7098$d.6098$d.5098$x.4098$d.3098.Ltmp2098$x.2098$x.1098$x.98$d.8988$x.7988$x.6988$x.5988$x.4988$d.3988$d.2988$d.1988$d.988$d.8888$x.7888$x.6888$x.5888$x.4888$d.3888$x.2888.Ltmp1888$x.1888$x.888$d.8788$x.7788$x.6788$x.5788$x.4788$d.3788$d.2788.Ltmp1788$x.1788$x.788$d.8688$x.7688$x.6688$d.5688$x.4688$x.3688$d.2688$x.1688$x.688$d.8588$d.7588$x.6588$x.5588$x.4588$x.3588$x.2588$d.1588$d.588$d.8488$x.7488$x.6488$x.5488$x.4488$x.3488$d.2488$x.1488$x.488$d.9388$d.8388$d.7388$x.6388$x.5388$x.4388$d.3388.Ltmp2388$d.2388$x.1388$x.388$d.9288$d.8288$x.7288$d.6288$x.5288$x.4288$d.3288.Ltmp2288$d.2288$d.1288$x.288$d.9188$d.8188.Ltmp7188$x.7188$x.6188$x.5188$x.4188$x.3188$d.2188$x.1188$x.188$d.9088$d.8088$x.7088$d.6088$x.5088$d.4088$x.3088$x.2088$d.1088$x.88$d.8978$x.7978$x.6978$d.5978$x.4978$x.3978$x.2978.Ltmp1978$d.1978$x.978$d.8878$x.7878$x.6878$x.5878$x.4878$d.3878init_completion.__key.2878$d.2878$x.1878$x.878$d.8778$x.7778$d.6778$d.5778$x.4778$x.3778$x.2778$x.1778$d.778.Ltmp8678$d.8678$x.7678$x.6678$x.5678$x.4678$d.3678$d.2678.Ltmp1678$x.1678$d.678$d.8578.Ltmp7578$x.7578$x.6578$d.5578$x.4578$x.3578$d.2578.Ltmp1578$d.1578$d.578$d.8478$x.7478$x.6478$x.5478$x.4478$x.3478.Ltmp2478$d.2478$x.1478$x.478$d.9378$d.8378.Ltmp7378$d.7378$x.6378$x.5378$x.4378$x.3378$d.2378$x.1378$x.378$d.9278$d.8278$x.7278$d.6278$x.5278$x.4278$x.3278$x.2278$d.1278$x.278$d.9178$d.8178$x.7178$x.6178$x.5178$x.4178$x.3178$d.2178$x.1178$x.178$d.9078$d.8078$x.7078$d.6078$d.5078$d.4078$x.3078$x.2078$x.1078$x.78$d.8968$x.7968$x.6968$x.5968$x.4968$d.3968$x.2968msm_kms_init.__key.1968$x.1968$d.968$d.8868$x.7868$x.6868$x.5868$d.4868$d.3868$d.2868$x.1868$x.868$d.8768$x.7768$x.6768$d.5768$x.4768$x.3768$x.2768$x.1768$x.768.Ltmp9668$d.8668$x.7668$x.6668$x.5668$x.4668$d.3668$d.2668$x.1668$d.668$d.8568$d.7568$x.6568$d.5568$d.4568$x.3568.Ltmp2568$x.2568$d.1568$d.568$d.8468.Ltmp7468$x.7468$x.6468$d.5468$x.4468$x.3468$d.2468$x.1468$d.468$d.9368$d.8368$d.7368$x.6368$d.5368$x.4368$d.3368$d.2368$x.1368$x.368$d.9268$d.8268$d.7268$d.6268$x.5268$x.4268$x.3268$x.2268$x.1268$x.268$d.9168$d.8168.Ltmp7168$d.7168$x.6168$x.5168$d.4168$d.3168$d.2168$x.1168$x.168$d.9068$d.8068$d.7068$x.6068$x.5068$d.4068$x.3068.Ltmp2068$x.2068$d.1068mark_unpurgeable._rs.68$d.68$d.8958$x.7958$x.6958$d.5958$x.4958$d.3958$x.2958$x.1958$x.958$d.8858$x.7858$x.6858$x.5858$x.4858$x.3858$x.2858.Ltmp1858$x.1858$x.858$d.8758$x.7758$d.6758$d.5758$x.4758$x.3758$d.2758$x.1758$d.758$d.8658$x.7658$x.6658$d.5658$x.4658$x.3658$d.2658$x.1658$d.658$d.8558$x.7558$x.6558$d.5558$x.4558$d.3558$x.2558$d.1558$x.558$d.8458$x.7458$x.6458$x.5458$x.4458$x.3458$d.2458$x.1458$d.458$d.9358$d.8358$d.7358$x.6358$d.5358$x.4358$x.3358.Ltmp2358$d.2358$x.1358$d.358$d.9258$d.8258$x.7258$d.6258$x.5258$x.4258$x.3258.Ltmp2258$x.2258$x.1258$x.258.Ltmp9158$d.9158$d.8158$x.7158$x.6158$x.5158$d.4158$d.3158.Ltmp2158$x.2158$x.1158$x.158$d.9058$d.8058$x.7058$d.6058$x.5058$x.4058$d.3058$x.2058$x.1058$x.58$d.8948$x.7948$x.6948$d.5948$x.4948$d.3948$x.2948.Ltmp1948$x.1948$x.948$d.8848$x.7848$x.6848$d.5848$x.4848$x.3848$x.2848$x.1848$x.848$d.8748$x.7748$d.6748$x.5748$x.4748$x.3748$d.2748.Ltmp1748$x.1748$x.748$d.8648$d.7648$d.6648$d.5648$x.4648$x.3648$d.2648.Ltmp1648$d.1648$d.648$d.8548$x.7548$x.6548$d.5548$x.4548$x.3548$d.2548$x.1548$x.548$d.9448$d.8448$x.7448$d.6448$x.5448$x.4448$x.3448.Ltmp2448$d.2448$x.1448$x.448$d.9348$d.8348.Ltmp7348$x.7348$x.6348$x.5348$x.4348$x.3348$d.2348$d.1348$x.348$d.9248$d.8248$x.7248$d.6248$x.5248$x.4248$x.3248$x.2248$x.1248$x.248$d.9148$d.8148$d.7148$x.6148$x.5148$d.4148$x.3148$x.2148$d.1148$d.148$d.9048$d.8048$d.7048$x.6048$x.5048$d.4048$x.3048$x.2048$x.1048$d.48$d.8938$x.7938$x.6938$x.5938$x.4938$x.3938$x.2938$x.1938$x.938$d.8838$x.7838$x.6838$d.5838$x.4838$x.3838$d.2838$x.1838$x.838$d.8738$x.7738$x.6738$x.5738$x.4738$x.3738$d.2738$x.1738$x.738.Ltmp9638$d.8638$x.7638$x.6638$d.5638$d.4638$x.3638$x.2638$d.1638$x.638$d.8538$d.7538$x.6538$x.5538$x.4538$x.3538.Ltmp2538$d.2538$x.1538$x.538$d.9438$d.8438$x.7438$d.6438$x.5438$x.4438$x.3438$x.2438$x.1438$d.438$d.9338$d.8338$x.7338$x.6338$x.5338$x.4338$x.3338$d.2338$d.1338$x.338$d.9238$d.8238$x.7238$x.6238$x.5238$x.4238$x.3238$x.2238$x.1238$d.238$d.9138$d.8138$x.7138$d.6138$x.5138$x.4138$x.3138$x.2138$x.1138$x.138$d.9038$d.8038$x.7038$x.6038$x.5038$d.4038$x.3038.Ltmp2038$d.2038$x.1038$x.38a6xx_gmu_irq._rs.38$d.8928$x.7928$x.6928$x.5928$x.4928$d.3928$d.2928$x.1928$x.928kms_funcs.928.Ltmp828$d.8828$x.7828$x.6828$d.5828$x.4828$x.3828$d.2828$x.1828$x.828$d.8728$x.7728$x.6728$x.5728$x.4728$x.3728$d.2728.Ltmp1728$x.1728$d.728$d.8628$d.7628$x.6628$d.5628$x.4628$d.3628$x.2628$d.1628$d.628__UNIQUE_ID_author528__UNIQUE_ID_firmware528$d.8528.Ltmp7528$d.7528$x.6528$x.5528$x.4528$d.3528$d.2528$x.1528$x.528$d.9428$d.8428$x.7428$d.6428$d.5428$x.4428$x.3428$x.2428.Ltmp1428$x.1428$d.428__UNIQUE_ID_alias328$d.8328$x.7328$x.6328$x.5328$x.4328$d.3328.Ltmp2328$x.2328$d.1328$x.328$d.9228$d.8228$x.7228$d.6228$x.5228$x.4228$d.3228$x.2228$d.1228$d.228$d.9128$d.8128$x.7128$x.6128$x.5128$d.4128$x.3128.Ltmp2128$d.2128$x.1128$x.128$d.9028$d.8028$d.7028$x.6028$x.5028$d.4028$d.3028$d.2028$x.1028$x.28$d.8918$x.7918$x.6918$d.5918$x.4918$d.3918$d.2918$x.1918$d.918$d.8818$x.7818$x.6818$x.5818$x.4818$x.3818$d.2818.Ltmp1818$x.1818$d.818$d.8718$x.7718$x.6718$x.5718$x.4718$x.3718$d.2718.Ltmp1718$d.1718$d.718$d.8618$d.7618$x.6618$d.5618$x.4618$d.3618$x.2618.Ltmp1618$d.1618$x.618__UNIQUE_ID_vram518__UNIQUE_ID_firmware518$d.8518$x.7518$x.6518$d.5518$x.4518$d.3518$d.2518$x.1518$x.518$d.9418$d.8418$d.7418$d.6418$x.5418$x.4418$x.3418.Ltmp2418$x.2418$x.1418$x.418__UNIQUE_ID_alias318$d.9318$d.8318$x.7318$x.6318$d.5318$x.4318$d.3318$x.2318$d.1318$x.318$d.9218$d.8218$d.7218$d.6218$x.5218$x.4218$d.3218$x.2218$d.1218$d.218$d.9118$d.8118$x.7118$x.6118$d.5118$d.4118$d.3118$d.2118$x.1118$d.118$d.9018$d.8018$x.7018$x.6018$x.5018$x.4018$x.3018$x.2018$d.1018$x.18msm_gem_vunmap._rs.18$d.8908$x.7908$x.6908$x.5908$x.4908$d.3908$d.2908$x.1908$x.908$d.8808$x.7808$x.6808$x.5808$x.4808$x.3808$d.2808$x.1808$x.808$d.8708$x.7708$x.6708$d.5708$x.4708$x.3708$d.2708$x.1708$d.708$d.8608$x.7608$x.6608$x.5608$x.4608$d.3608$x.2608$d.1608$x.608$d.8508$x.7508$x.6508$x.5508$x.4508$d.3508.Ltmp2508$x.2508$d.1508$d.508$d.9408$d.8408.Ltmp7408$d.7408$d.6408$x.5408$x.4408.Ltmp3408$x.3408$d.2408$x.1408$x.408__UNIQUE_ID_alias308$d.9308$d.8308$x.7308$d.6308$x.5308$x.4308$d.3308$x.2308$d.1308$x.308$d.9208$d.8208$x.7208$d.6208$x.5208$x.4208$d.3208$x.2208$d.1208$d.208$d.9108.Ltmp8108$d.8108$x.7108$x.6108$d.5108$d.4108$d.3108$x.2108$x.1108$x.108$d.9008$d.8008$x.7008$d.6008$x.5008$d.4008$d.3008$x.2008$d.1008$x.8msm_gem_put_vaddr_locked._rs.8$d.8$d.8997$d.7997$d.6997$d.5997$d.4997$x.3997$x.2997$d.1997$x.997$d.8897$x.7897$d.6897$d.5897$d.4897$x.3897$d.2897$d.1897$x.897$d.8797$x.7797$x.6797$d.5797$d.4797$x.3797$x.2797.Ltmp1797$d.1797$x.797$d.8697$x.7697$x.6697$d.5697$x.4697$x.3697$x.2697.Ltmp1697$x.1697$x.697$d.8597$d.7597$d.6597$d.5597$x.4597$x.3597$d.2597$x.1597$x.597$d.8497$d.7497$x.6497$x.5497$x.4497$d.3497$x.2497.Ltmp1497$d.1497$x.497$d.9397$d.8397$x.7397$d.6397$d.5397$x.4397$x.3397.Ltmp2397$x.2397$d.1397$x.397$d.9297$d.8297$x.7297$x.6297$d.5297$x.4297$x.3297.Ltmp2297$d.2297$x.1297$d.297$d.9197$d.8197.Ltmp7197$x.7197$x.6197$x.5197$x.4197$x.3197$d.2197$x.1197$x.197$d.9097$d.8097$d.7097$x.6097$x.5097$x.4097$x.3097$d.2097$d.1097$d.97$d.8987.Ltmp7987$x.7987$d.6987$x.5987$d.4987$x.3987$x.2987$x.1987$x.987$d.8887$x.7887$d.6887$d.5887$d.4887$x.3887$d.2887$d.1887$d.887$d.8787$x.7787$d.6787$d.5787$x.4787$x.3787$x.2787$d.1787$d.787$d.8687$x.7687$x.6687$x.5687$x.4687$d.3687$x.2687funcs.2687.Ltmp1687$x.1687$d.687$d.8587$x.7587$d.6587$d.5587$x.4587$d.3587$x.2587.Ltmp1587$x.1587$x.587$d.8487$d.7487$d.6487$x.5487$x.4487$x.3487.Ltmp2487$x.2487$d.1487$d.487$d.9387$d.8387.Ltmp7387$x.7387$d.6387$d.5387$x.4387$x.3387$x.2387$x.1387$x.387$d.9287$d.8287$d.7287$x.6287$d.5287$x.4287$x.3287$x.2287$x.1287$d.287$d.9187$d.8187$x.7187$d.6187$x.5187$x.4187$d.3187.Ltmp2187$x.2187$x.1187$d.187$d.9087$d.8087$d.7087$x.6087$x.5087$x.4087$d.3087$d.2087$x.1087$d.87$d.8977$x.7977$d.6977$x.5977$d.4977$x.3977$d.2977$x.1977$x.977$d.8877$x.7877$x.6877$d.5877$x.4877$x.3877$x.2877$d.1877$d.877$d.8777$x.7777$x.6777$x.5777$x.4777$x.3777$d.2777$x.1777$x.777.Ltmp9677$d.8677$x.7677$x.6677$d.5677$x.4677$x.3677$x.2677$x.1677$x.677$d.8577$d.7577$d.6577$x.5577$d.4577$d.3577$x.2577$x.1577$x.577$d.8477.Ltmp7477$d.7477$d.6477$d.5477$x.4477$x.3477$x.2477.Ltmp1477$d.1477$d.477$d.9377$d.8377$x.7377$d.6377$d.5377$x.4377$d.3377$x.2377$d.1377$d.377$d.9277$d.8277$x.7277$x.6277$d.5277$x.4277$d.3277$d.2277$x.1277$x.277$d.9177$d.8177$x.7177$d.6177$x.5177$x.4177$x.3177$x.2177$x.1177$d.177$d.9077$d.8077$d.7077$x.6077$x.5077$x.4077$d.3077.Ltmp2077$d.2077$d.1077$x.77$d.8967$x.7967$d.6967$x.5967$d.4967$x.3967$d.2967kms_funcs.1967$d.1967$x.967$d.8867$x.7867$d.6867$d.5867$x.4867$x.3867$x.2867.Ltmp1867$d.1867$d.867$d.8767$x.7767$d.6767$x.5767$d.4767$x.3767$d.2767$x.1767$x.767$d.8667$x.7667$d.6667$d.5667$d.4667$x.3667$x.2667$d.1667$x.667$d.8567$x.7567$d.6567$x.5567$x.4567$d.3567$d.2567$x.1567$x.567.Ltmp9467$d.8467$d.7467$x.6467$x.5467$x.4467$d.3467$x.2467$d.1467$x.467$d.9367$d.8367$x.7367$x.6367$x.5367$x.4367$x.3367.Ltmp2367$x.2367$d.1367$d.367$d.9267$d.8267$x.7267$x.6267$d.5267$x.4267$d.3267.Ltmp2267$d.2267$d.1267$d.267$d.9167$d.8167$x.7167$d.6167$x.5167$x.4167$x.3167.Ltmp2167$x.2167$x.1167$x.167$d.9067$d.8067$x.7067$d.6067$x.5067$x.4067$d.3067$d.2067$x.1067$x.67$d.8957$x.7957$x.6957$x.5957$d.4957$x.3957$d.2957.Ltmp1957$d.1957$d.957$d.8857$x.7857.Ltmp6857$x.6857$d.5857$x.4857$x.3857$d.2857$d.1857$x.857$d.8757$x.7757$x.6757$x.5757$d.4757$d.3757$x.2757$x.1757$x.757$d.8657.Ltmp7657$x.7657$d.6657$x.5657$d.4657$d.3657$x.2657.Ltmp1657$x.1657$x.657$d.8557$d.7557$d.6557$x.5557$x.4557$x.3557$x.2557$x.1557$d.557$d.8457$d.7457$x.6457$d.5457$x.4457$d.3457.Ltmp2457$x.2457$x.1457$x.457$d.9357$d.8357.Ltmp7357$x.7357$d.6357$x.5357$x.4357$d.3357$x.2357$d.1357$x.357$d.9257$d.8257$d.7257$x.6257$d.5257$x.4257$d.3257$d.2257$d.1257$d.257$d.9157$d.8157$d.7157$x.6157$x.5157$x.4157$x.3157$d.2157$x.1157$x.157$d.9057$d.8057$d.7057$x.6057$d.5057$x.4057$x.3057$d.2057$d.1057$x.57$d.8947$x.7947$x.6947$x.5947$d.4947$x.3947$d.2947$x.1947$x.947$d.8847$x.7847$d.6847$x.5847$d.4847$x.3847$d.2847$d.1847$d.847$d.8747$x.7747$x.6747$d.5747$d.4747$x.3747$x.2747$x.1747$d.747.Ltmp9647$d.8647$x.7647$x.6647$x.5647$d.4647$x.3647$x.2647$x.1647init_completion.__key.647$x.647$d.8547$x.7547$d.6547$x.5547$x.4547$d.3547.Ltmp2547$x.2547$d.1547$d.547$d.9447$d.8447.Ltmp7447$d.7447$x.6447$x.5447$x.4447$d.3447$x.2447$d.1447$d.447$d.9347$d.8347$x.7347$d.6347$x.5347$x.4347$d.3347$x.2347$x.1347$d.347$d.9247$d.8247$x.7247$x.6247$d.5247$x.4247$d.3247$d.2247$d.1247$d.247$d.9147$d.8147$x.7147$d.6147$x.5147$x.4147$x.3147$d.2147$x.1147$x.147$d.9047$d.8047$x.7047$x.6047$d.5047$x.4047$d.3047.Ltmp2047$x.2047$d.1047$x.47$d.8937$x.7937$x.6937$x.5937$d.4937$x.3937$d.2937$d.1937$x.937$d.8837$x.7837$x.6837$x.5837$d.4837$x.3837$x.2837$d.1837$x.837$d.8737$x.7737$x.6737$d.5737$d.4737$x.3737$x.2737$d.1737$d.737$d.8637$d.7637$d.6637$x.5637$x.4637$d.3637$d.2637$x.1637$d.637$d.8537.Ltmp7537$x.7537$d.6537$d.5537$x.4537$d.3537$x.2537$d.1537$d.537$d.9437$d.8437$x.7437$x.6437$x.5437$x.4437$d.3437$x.2437$d.1437$x.437$d.9337$d.8337$x.7337$d.6337$d.5337$x.4337$d.3337.Ltmp2337$x.2337$x.1337$d.337$d.9237$d.8237$x.7237$x.6237$d.5237$x.4237$d.3237$d.2237$d.1237$x.237$d.9137$d.8137$d.7137$x.6137$x.5137$x.4137$d.3137.Ltmp2137$d.2137$x.1137$d.137$d.9037$d.8037$d.7037$x.6037$d.5037$x.4037$d.3037$x.2037$d.1037msm_dsi_host_init.__key.37$d.37$d.8927$x.7927$x.6927$d.5927$d.4927$x.3927$x.2927$d.1927$x.927$d.8827$x.7827$d.6827$x.5827$d.4827$x.3827$x.2827.Ltmp1827$d.1827$d.827$d.8727$x.7727$d.6727$d.5727$d.4727$x.3727$x.2727$x.1727$x.727$d.8627$x.7627$d.6627$x.5627$d.4627$x.3627$d.2627.Ltmp1627$x.1627$x.627__UNIQUE_ID_firmware527$d.8527$x.7527$d.6527$x.5527$x.4527$x.3527$x.2527$d.1527$d.527$d.9427$d.8427$x.7427$x.6427$x.5427$x.4427$d.3427.Ltmp2427$d.2427$d.1427$x.427__UNIQUE_ID_alias327$d.8327$x.7327$x.6327$d.5327$x.4327$x.3327$d.2327$x.1327$d.327$d.9227$d.8227$x.7227$x.6227$x.5227$x.4227$x.3227$d.2227$x.1227$x.227$d.9127$d.8127$d.7127$x.6127$x.5127$x.4127$x.3127$x.2127$d.1127$d.127$d.9027$d.8027$x.7027$d.6027$d.5027$x.4027$x.3027$x.2027$x.1027$x.27a6xx_irq._rs.27a5xx_rbbm_err_irq._rs.27$d.8917$x.7917$d.6917$x.5917$d.4917$x.3917$x.2917$d.1917$x.917$d.8817$x.7817$x.6817$d.5817$d.4817$x.3817$x.2817$d.1817$x.817$d.8717$x.7717$d.6717$d.5717$x.4717$d.3717$x.2717$x.1717$x.717$d.8617$x.7617$d.6617$x.5617$d.4617$x.3617$d.2617$x.1617$d.617__UNIQUE_ID_firmware517$d.8517$x.7517$d.6517$x.5517$x.4517$x.3517.Ltmp2517$x.2517$d.1517$d.517$d.9417$d.8417.Ltmp7417$x.7417$x.6417$x.5417$x.4417$x.3417$x.2417$d.1417$d.417__UNIQUE_ID_alias317$d.9317$d.8317$d.7317$x.6317$x.5317$x.4317$x.3317$d.2317$x.1317$d.317$d.9217$d.8217$x.7217$x.6217$d.5217$x.4217$x.3217.Ltmp2217$d.2217.Ltmp1217$x.1217$x.217$d.9117$d.8117$d.7117$d.6117$x.5117$x.4117$x.3117$x.2117$x.1117$x.117$d.9017.Ltmp8017$d.8017$x.7017$x.6017$d.5017$x.4017$x.3017.Ltmp2017$d.2017$x.1017msm_drm_init.__key.17$x.17a5xx_rbbm_err_irq._rs.17$d.8907$x.7907$x.6907$d.5907$d.4907$x.3907$x.2907.Ltmp1907$d.1907$x.907$d.8807$x.7807$x.6807$d.5807$d.4807$x.3807$x.2807$d.1807$x.807.Ltmp9707$d.8707$x.7707$d.6707$x.5707$x.4707$d.3707$x.2707$d.1707$x.707$d.8607$x.7607$d.6607$x.5607$x.4607$x.3607$d.2607$x.1607$d.607$d.8507.Ltmp7507$x.7507$x.6507$x.5507$x.4507$x.3507$d.2507$x.1507$x.507$d.9407$d.8407$x.7407$x.6407$d.5407$x.4407$d.3407$x.2407.Ltmp1407$d.1407$x.407__UNIQUE_ID_alias307$d.9307$d.8307$x.7307$x.6307$d.5307$x.4307$x.3307$d.2307$x.1307$d.307$d.9207$d.8207$d.7207$x.6207$x.5207$x.4207$x.3207$d.2207$x.1207$x.207.Ltmp107$d.9107$d.8107$d.7107$d.6107.Ltmp5107$x.5107$x.4107$x.3107.Ltmp2107$d.2107$x.1107$d.107$d.9007$d.8007$x.7007$x.6007$d.5007$x.4007$x.3007.Ltmp2007$x.2007$x.1007dpu_encoder_phys_cmd_init.__key.7$d.7bpf_trace_run6$d.8996$d.7996$x.6996$x.5996$x.4996$d.3996$d.2996$x.1996$x.996$d.8896$x.7896$x.6896$x.5896$x.4896$d.3896$x.2896$x.1896$x.896$d.8796$x.7796$d.6796$x.5796$x.4796$d.3796$d.2796$x.1796$d.796$d.8696$x.7696$x.6696$x.5696$x.4696$d.3696$d.2696$x.1696$d.696$d.8596$x.7596$x.6596$x.5596$x.4596$x.3596$x.2596.Ltmp1596$d.1596$d.596$d.8496$x.7496$d.6496$d.5496$d.4496$x.3496.Ltmp2496$d.2496$x.1496$d.496$d.9396$d.8396.Ltmp7396$d.7396$x.6396$x.5396$d.4396$x.3396$d.2396$x.1396$d.396$d.9296$d.8296$x.7296$d.6296$x.5296$d.4296$d.3296$x.2296$x.1296$x.296$d.9196$d.8196$x.7196$x.6196$x.5196$d.4196$x.3196$x.2196.Ltmp1196$d.1196$d.196$d.9096$d.8096$x.7096$d.6096$x.5096$d.4096$d.3096$x.2096$x.1096$x.96$d.8986$x.7986$x.6986$x.5986$x.4986$x.3986$d.2986$d.1986$x.986$d.8886$x.7886$x.6886$x.5886$x.4886$d.3886$x.2886$x.1886$x.886$d.8786$x.7786$x.6786$x.5786$x.4786$x.3786$d.2786$x.1786$x.786.Ltmp9686$d.8686$x.7686$d.6686$x.5686$x.4686$x.3686$d.2686$x.1686$x.686$d.8586$d.7586$x.6586$x.5586$x.4586$x.3586$d.2586$d.1586$d.586$d.8486.Ltmp7486$x.7486$x.6486$x.5486$d.4486$x.3486$d.2486.Ltmp1486$x.1486$x.486$d.9386$d.8386$d.7386$x.6386$x.5386$d.4386$d.3386$d.2386$x.1386$x.386$d.9286$d.8286$x.7286$d.6286$x.5286$d.4286$d.3286$x.2286$d.1286$x.286$d.9186$d.8186$x.7186$x.6186$x.5186$d.4186$x.3186$d.2186$x.1186$x.186$d.9086$d.8086$x.7086$d.6086$d.5086$d.4086$x.3086.Ltmp2086$x.2086$x.1086$x.86$d.8976$x.7976$x.6976$x.5976$x.4976$d.3976$x.2976$d.1976$d.976$d.8876$x.7876$d.6876$x.5876$x.4876$d.3876$d.2876.Ltmp1876$x.1876$x.876$d.8776$x.7776$x.6776$d.5776$x.4776$d.3776$x.2776.Ltmp1776$d.1776$x.776$d.8676$x.7676$x.6676$x.5676$x.4676$d.3676$d.2676$d.1676$d.676$d.8576$x.7576$x.6576$d.5576$x.4576$x.3576$d.2576$d.1576$x.576$d.8476$x.7476$x.6476$x.5476$d.4476$d.3476$d.2476$x.1476$x.476$d.9376$d.8376$d.7376$x.6376$x.5376$d.4376$x.3376.Ltmp2376$d.2376$x.1376$x.376$d.9276$d.8276$x.7276$d.6276$x.5276$d.4276$x.3276.Ltmp2276$x.2276$d.1276$d.276$d.9176$d.8176$x.7176$x.6176$d.5176$d.4176$d.3176$d.2176$x.1176$x.176$d.9076$d.8076$x.7076$d.6076$d.5076$d.4076$x.3076$x.2076$x.1076$d.76$d.8966$x.7966$x.6966$d.5966$x.4966$d.3966$x.2966.Ltmp1966$x.1966$d.966$d.8866$x.7866$x.6866$x.5866$x.4866$x.3866$x.2866$x.1866$x.866$d.8766$x.7766$x.6766$d.5766$x.4766$d.3766$x.2766$d.1766$d.766$d.8666$x.7666$x.6666$x.5666$x.4666$x.3666$d.2666.Ltmp1666$x.1666$d.666$d.8566.Ltmp7566$d.7566$x.6566$d.5566$x.4566$x.3566$x.2566$d.1566$x.566$d.8466$x.7466$x.6466$x.5466$d.4466$x.3466.Ltmp2466$d.2466$x.1466$d.466$d.9366$d.8366.Ltmp7366$d.7366$x.6366$d.5366$d.4366$d.3366$d.2366$x.1366$x.366$d.9266$d.8266$d.7266$x.6266$x.5266$d.4266$x.3266$x.2266$x.1266$x.266$d.9166$d.8166$x.7166$x.6166$x.5166$d.4166$x.3166$d.2166$x.1166$d.166$d.9066$d.8066$x.7066$x.6066$x.5066$x.4066$x.3066$x.2066$d.1066$x.66mark_unpurgeable._rs.66$d.8956$x.7956$x.6956$x.5956$x.4956$d.3956$x.2956$x.1956$x.956$d.8856$x.7856$x.6856$x.5856$x.4856$d.3856$x.2856$x.1856$d.856$d.8756$x.7756$d.6756$d.5756$x.4756$x.3756$d.2756$x.1756$x.756.Ltmp9656$d.8656$x.7656$x.6656$d.5656$x.4656$x.3656$d.2656$x.1656$d.656$d.8556$x.7556$x.6556$d.5556$x.4556$d.3556funcs.2556$d.2556$x.1556$x.556$d.8456.Ltmp7456$x.7456$x.6456$x.5456$d.4456$x.3456$d.2456$d.1456$x.456$d.9356$d.8356$d.7356$x.6356$x.5356$d.4356$x.3356$d.2356$x.1356$d.356$d.9256$d.8256$x.7256$x.6256$x.5256$d.4256.Ltmp3256$x.3256$x.2256$x.1256$x.256$d.9156$d.8156$x.7156$x.6156$d.5156$d.4156$d.3156$x.2156$x.1156$d.156$d.9056$d.8056$x.7056$x.6056$x.5056$d.4056$d.3056.Ltmp2056$x.2056$x.1056$x.56$d.8946$x.7946$x.6946$d.5946$x.4946$x.3946$x.2946$x.1946$x.946$d.8846$x.7846$x.6846$d.5846$x.4846$x.3846$x.2846$x.1846$x.846$d.8746$x.7746$d.6746$x.5746$x.4746$x.3746$d.2746$x.1746$x.746$d.8646$d.7646$d.6646$d.5646$x.4646$d.3646$x.2646$x.1646$d.646$d.8546$x.7546$x.6546$x.5546$x.4546$x.3546$d.2546$x.1546$x.546$d.9446$d.8446$x.7446$x.6446$x.5446$d.4446$x.3446$x.2446$x.1446$x.446$d.9346$d.8346$x.7346$x.6346$x.5346$d.4346$x.3346.Ltmp2346$d.2346$d.1346$x.346$d.9246$d.8246$d.7246$d.6246$x.5246$d.4246$x.3246.Ltmp2246$x.2246$x.1246$x.246$d.9146$d.8146$d.7146$x.6146$d.5146$x.4146$x.3146.Ltmp2146$x.2146$d.1146$x.146$d.9046$d.8046$d.7046$d.6046$x.5046$d.4046$x.3046$x.2046$x.1046a5xx_cp_err_irq._rs.46$d.46$d.8936$x.7936$x.6936$x.5936$x.4936$d.3936$x.2936.Ltmp1936$x.1936$x.936$d.8836$x.7836$x.6836$d.5836$x.4836$x.3836$d.2836.Ltmp1836$x.1836$x.836$d.8736$x.7736$x.6736$x.5736$x.4736$d.3736$d.2736$x.1736$x.736$d.8636$x.7636$x.6636$d.5636$d.4636$x.3636$x.2636.Ltmp1636$d.1636$x.636$d.8536$d.7536$x.6536$x.5536$x.4536$x.3536$x.2536.Ltmp1536$x.1536$x.536$d.9436$d.8436$d.7436$x.6436$d.5436$d.4436$x.3436.Ltmp2436$x.2436$x.1436$d.436$d.9336$d.8336$x.7336$x.6336$x.5336$d.4336$x.3336$d.2336$d.1336$x.336$d.9236$d.8236$x.7236$x.6236$x.5236$d.4236$x.3236$x.2236$x.1236$d.236$d.9136$d.8136$x.7136$d.6136$d.5136$d.4136$x.3136$x.2136$x.1136$x.136$d.9036$d.8036$x.7036$x.6036$x.5036$d.4036$x.3036$d.2036$x.1036$x.36a6xx_gmu_irq._rs.36$d.8926$x.7926$x.6926$x.5926$x.4926$d.3926$d.2926$x.1926$x.926$d.8826$x.7826$x.6826$d.5826$x.4826$x.3826$d.2826$x.1826$x.826$d.8726$x.7726$x.6726$x.5726$x.4726$x.3726$d.2726$x.1726$d.726.Ltmp626$d.8626$d.7626$x.6626$d.5626$x.4626$x.3626$x.2626$d.1626$d.626__UNIQUE_ID_firmware526$d.8526$d.7526$x.6526$x.5526$x.4526$d.3526.Ltmp2526$d.2526.Ltmp1526$x.1526$x.526$d.9426$d.8426.Ltmp7426$d.7426$x.6426$d.5426$d.4426$x.3426$x.2426$x.1426$d.426__UNIQUE_ID_alias326$d.8326$x.7326$x.6326$x.5326$d.4326$d.3326$x.2326$d.1326$x.326$d.9226$d.8226$d.7226$d.6226$d.5226$d.4226$d.3226.Ltmp2226$x.2226$d.1226$d.226$d.9126$d.8126$x.7126$x.6126$d.5126$d.4126$x.3126$d.2126$x.1126$x.126$d.9026$d.8026$x.7026$x.6026$x.5026$x.4026$d.3026.Ltmp2026$d.2026$x.1026$x.26$d.8916$x.7916$x.6916$x.5916$x.4916$d.3916$d.2916$x.1916$x.916$d.8816$x.7816$x.6816$x.5816$x.4816$x.3816$d.2816$x.1816$d.816.Ltmp9716$d.8716$x.7716$x.6716$x.5716$x.4716$x.3716$d.2716$x.1716$d.716$d.8616$x.7616$x.6616$d.5616$x.4616$x.3616$x.2616$d.1616$x.616__UNIQUE_ID_allow_vram_carveouttype516$d.8516.Ltmp7516$x.7516$x.6516$d.5516$d.4516$d.3516$x.2516.Ltmp1516$x.1516$x.516$d.9416$d.8416$d.7416$x.6416$d.5416$d.4416$x.3416$d.2416$x.1416$x.416__UNIQUE_ID_alias316$d.9316$d.8316$x.7316$x.6316$d.5316$d.4316$d.3316.Ltmp2316$x.2316$x.1316$x.316$d.9216$d.8216$d.7216$d.6216$x.5216$d.4216$d.3216$x.2216$d.1216$d.216$d.9116$d.8116$x.7116$x.6116$d.5116$d.4116$d.3116.Ltmp2116$x.2116$x.1116$x.116$d.9016$d.8016$x.7016$d.6016$x.5016$d.4016$d.3016$x.2016$x.1016$x.16msm_gem_evict._rs.16$d.8906$x.7906$x.6906$x.5906$x.4906$x.3906$d.2906$x.1906$x.906$d.8806$x.7806$d.6806$x.5806$x.4806$x.3806$d.2806.Ltmp1806$x.1806$x.806$d.8706$x.7706$x.6706$x.5706$x.4706$x.3706$d.2706.Ltmp1706$x.1706$d.706$d.8606$d.7606$x.6606$x.5606$x.4606$d.3606$x.2606.Ltmp1606$d.1606$x.606$d.8506$x.7506$x.6506$d.5506$d.4506$x.3506$x.2506$x.1506$d.506$d.9406$d.8406$d.7406$x.6406$x.5406$d.4406$x.3406.Ltmp2406$d.2406$x.1406$d.406__UNIQUE_ID_alias306$d.9306$d.8306$x.7306$d.6306$x.5306$d.4306$d.3306.Ltmp2306$x.2306$d.1306$x.306$d.9206$d.8206$x.7206$d.6206$x.5206$d.4206$d.3206$x.2206$d.1206$x.206$d.9106$d.8106$x.7106$x.6106$d.5106$x.4106$d.3106$x.2106$d.1106$x.106$d.9006$d.8006$x.7006$d.6006$x.5006$d.4006$d.3006$x.2006$d.1006$x.6msm_gem_unpin_iova_locked._rs.6bpf_trace_run5$d.8995$x.7995$d.6995$d.5995$d.4995$x.3995$x.2995$d.1995$x.995.Ltmp895$d.8895$x.7895$d.6895$d.5895$d.4895$x.3895$d.2895.Ltmp1895$d.1895$d.895$d.8795$x.7795$x.6795$d.5795$d.4795$x.3795$x.2795$d.1795$x.795.Ltmp9695$d.8695.Ltmp7695$x.7695$d.6695$d.5695$d.4695$x.3695$x.2695$d.1695$x.695$d.8595$x.7595$d.6595$x.5595$x.4595$x.3595$d.2595$x.1595$x.595$d.8495.Ltmp7495$d.7495$x.6495$x.5495$x.4495$d.3495$x.2495$d.1495$x.495$d.9395$d.8395$x.7395$d.6395$d.5395$x.4395$x.3395$x.2395$d.1395$x.395$d.9295$d.8295$x.7295$x.6295$d.5295$x.4295$x.3295$d.2295$d.1295$d.295$d.9195$d.8195$x.7195$x.6195$d.5195$x.4195$d.3195$d.2195$x.1195$x.195$d.9095$d.8095$d.7095$x.6095$x.5095$x.4095$x.3095.Ltmp2095$d.2095$x.1095$d.95print_ascii85$d.8985$x.7985$d.6985$d.5985$d.4985$x.3985$x.2985$x.1985$d.985$d.8885$x.7885$d.6885$d.5885$d.4885$x.3885$x.2885.Ltmp1885$d.1885$d.885$d.8785$x.7785$d.6785$d.5785$x.4785$d.3785$x.2785.Ltmp1785$d.1785$x.785$d.8685$x.7685$x.6685$d.5685$x.4685$d.3685$x.2685$d.1685$d.685$d.8585$x.7585$d.6585$x.5585$d.4585$x.3585$x.2585$x.1585$x.585$d.8485$d.7485$x.6485$d.5485$x.4485$x.3485$x.2485$d.1485$d.485$d.9385$d.8385$x.7385$d.6385$x.5385$x.4385$x.3385.Ltmp2385$x.2385$d.1385$d.385$d.9285$d.8285$d.7285$x.6285$d.5285$x.4285$x.3285.Ltmp2285$d.2285$x.1285$d.285$d.9185$d.8185.Ltmp7185$x.7185$d.6185$x.5185$x.4185$d.3185$x.2185$x.1185$d.185$d.9085$d.8085$d.7085$x.6085$x.5085$x.4085$d.3085$d.2085$d.1085$d.85$d.8975.Ltmp7975$x.7975$d.6975$d.5975$d.4975$x.3975$d.2975.Ltmp1975$x.1975$x.975$d.8875$x.7875$x.6875$d.5875$x.4875$x.3875$x.2875$d.1875$d.875$d.8775$x.7775$d.6775$x.5775$d.4775$x.3775$d.2775$x.1775$x.775.Ltmp8675$d.8675$x.7675$x.6675$d.5675$x.4675$x.3675$x.2675.Ltmp1675$x.1675$x.675$d.8575$d.7575$d.6575$x.5575$d.4575$d.3575$x.2575$x.1575$d.575$d.8475$d.7475$x.6475$d.5475$x.4475$x.3475.Ltmp2475$x.2475$d.1475$d.475$d.9375$d.8375.Ltmp7375$x.7375$x.6375$d.5375$x.4375$d.3375$x.2375$d.1375$d.375$d.9275$d.8275$x.7275$x.6275$d.5275$x.4275$d.3275$d.2275$x.1275$x.275$d.9175$d.8175$x.7175$d.6175$x.5175$x.4175$x.3175$x.2175$x.1175$d.175$d.9075$d.8075$d.7075$x.6075$x.5075$x.4075$d.3075$d.2075$d.1075$x.75$d.8965$x.7965$d.6965$x.5965$d.4965$x.3965$d.2965$x.1965$x.965$d.8865$x.7865$x.6865$d.5865$d.4865$x.3865$d.2865$d.1865$x.865$d.8765$x.7765$x.6765$x.5765$d.4765$x.3765$d.2765$x.1765$x.765.Ltmp9665$d.8665$x.7665$d.6665$d.5665$d.4665$x.3665$x.2665$d.1665$x.665$d.8565$x.7565$d.6565$x.5565$x.4565$x.3565$d.2565$x.1565$d.565$d.8465.Ltmp7465$d.7465$x.6465$x.5465$x.4465$d.3465$x.2465$d.1465$x.465$d.9365$d.8365$x.7365$d.6365$x.5365$x.4365$x.3365$x.2365$d.1365$x.365$d.9265$d.8265$x.7265$d.6265$d.5265$x.4265$d.3265$d.2265$d.1265$x.265$d.9165$d.8165$x.7165$d.6165$x.5165$x.4165$x.3165$x.2165$d.1165$x.165$d.9065$d.8065$d.7065$x.6065$x.5065$x.4065$x.3065.Ltmp2065$d.2065$x.1065$x.65$d.8955$x.7955$x.6955$d.5955$d.4955$x.3955$d.2955$d.1955$x.955$d.8855$x.7855$x.6855$d.5855$x.4855$x.3855$d.2855.Ltmp1855$d.1855$x.855$d.8755$x.7755$x.6755$x.5755$d.4755$d.3755$x.2755$d.1755$d.755$d.8655$x.7655$x.6655$x.5655$d.4655$x.3655$x.2655$d.1655$x.655$d.8555$d.7555$d.6555$x.5555$x.4555$x.3555$x.2555$d.1555$d.555$d.8455$d.7455$d.6455$d.5455$x.4455$d.3455$x.2455.Ltmp1455$x.1455$d.455$d.9355$d.8355$x.7355$d.6355$d.5355$x.4355$d.3355.Ltmp2355$x.2355$d.1355$x.355$d.9255$d.8255$d.7255$d.6255$d.5255$x.4255$d.3255.Ltmp2255$d.2255$d.1255$d.255.Ltmp9155$d.9155$d.8155$x.7155$x.6155$x.5155$x.4155$x.3155.Ltmp2155$d.2155$x.1155$x.155$d.9055$d.8055$d.7055$d.6055$d.5055$x.4055$x.3055$d.2055$d.1055get_vaddr._rs.55$d.55$d.8945$x.7945$x.6945$x.5945$d.4945$x.3945$d.2945.Ltmp1945$d.1945$x.945dpu_hw_lm_setup_blend_config_sdm845$d.8845$x.7845$d.6845$x.5845$d.4845$x.3845$d.2845$d.1845$x.845$d.8745$x.7745$x.6745$d.5745$d.4745$x.3745$x.2745.Ltmp1745$d.1745$d.745$d.8645$x.7645$x.6645$x.5645$x.4645$x.3645$d.2645.Ltmp1645$x.1645$x.645$d.8545$d.7545$x.6545$d.5545$x.4545$x.3545$x.2545$d.1545$d.545$d.9445$d.8445$d.7445$d.6445$x.5445$x.4445$d.3445.Ltmp2445$x.2445.Ltmp1445$d.1445$d.445$d.9345$d.8345.Ltmp7345$x.7345$d.6345$x.5345$x.4345$d.3345$x.2345$x.1345$d.345$d.9245$d.8245$x.7245$x.6245$d.5245$x.4245$d.3245$d.2245$d.1245$d.245$d.9145$d.8145$x.7145$x.6145$x.5145$x.4145$x.3145$d.2145$x.1145$d.145$d.9045$d.8045$x.7045$x.6045$d.5045$x.4045$d.3045$d.2045$x.1045$x.45$d.8935$x.7935$x.6935$d.5935$d.4935$x.3935$d.2935$d.1935$x.935$d.8835$x.7835$d.6835$x.5835$d.4835$x.3835$x.2835$d.1835$d.835$d.8735$x.7735$x.6735$d.5735$d.4735$x.3735$x.2735$x.1735$d.735.Ltmp9635$d.8635$d.7635$x.6635$x.5635$x.4635$d.3635$d.2635$x.1635$x.635$d.8535$x.7535$d.6535$d.5535$x.4535$d.3535.Ltmp2535$x.2535$d.1535$d.535$d.9435$d.8435.Ltmp7435$x.7435$d.6435$x.5435$x.4435$x.3435$x.2435is_vunmapable._rs.2435.Ltmp1435$d.1435$x.435$d.9335$d.8335$x.7335$x.6335$d.5335$x.4335$x.3335$x.2335$x.1335$d.335$d.9235$d.8235$x.7235$d.6235$d.5235$x.4235$x.3235$d.2235$d.1235$x.235$d.9135$d.8135$d.7135$x.6135$x.5135$x.4135$d.3135$d.2135$x.1135$d.135$d.9035$d.8035$x.7035$x.6035$d.5035$x.4035$d.3035.Ltmp2035$x.2035$d.1035$x.35a6xx_cp_hw_err_irq._rs.35$d.8925$x.7925$x.6925$d.5925$d.4925$x.3925$x.2925$d.1925$x.925$d.8825$x.7825$x.6825$x.5825$d.4825$x.3825$x.2825$d.1825$x.825.Ltmp9725$d.8725$x.7725$d.6725$d.5725$d.4725$x.3725$x.2725.Ltmp1725$x.1725$x.725$d.8625$x.7625$d.6625$x.5625$d.4625$d.3625$d.2625$x.1625$x.625__UNIQUE_ID_firmware525$d.8525.Ltmp7525$x.7525$d.6525$d.5525$x.4525$x.3525$x.2525$d.1525$d.525$d.9425$d.8425$x.7425$d.6425$x.5425$x.4425$d.3425$d.2425$d.1425$x.425__UNIQUE_ID_alias325$d.8325$x.7325$x.6325$d.5325$x.4325$x.3325.Ltmp2325$d.2325$x.1325$x.325$d.9225$d.8225$x.7225$x.6225$x.5225$x.4225$x.3225$d.2225$x.1225$x.225$d.9125$d.8125$d.7125$x.6125$x.5125$x.4125$x.3125.Ltmp2125$x.2125$d.1125$d.125$d.9025.Ltmp8025$d.8025$d.7025$d.6025$d.5025$x.4025$x.3025$x.2025$d.1025$x.25a6xx_irq._rs.25a5xx_rbbm_err_irq._rs.25$d.8915$x.7915$d.6915$d.5915$d.4915$x.3915$x.2915$d.1915$x.915$d.8815$x.7815$x.6815$d.5815$d.4815$x.3815$x.2815.Ltmp1815$d.1815$x.815$d.8715$x.7715$d.6715$d.5715$x.4715$d.3715$x.2715.Ltmp1715$d.1715$x.715$d.8615$x.7615$x.6615$x.5615$x.4615$x.3615$d.2615.Ltmp1615$x.1615$d.615__UNIQUE_ID_allow_vram_carveout515$d.8515$d.7515$d.6515$x.5515$x.4515$x.3515$d.2515$d.1515$d.515$d.9415$d.8415$x.7415$d.6415$x.5415$x.4415$d.3415.Ltmp2415$x.2415$d.1415$d.415__UNIQUE_ID_alias315$d.9315$d.8315$d.7315$d.6315$x.5315$x.4315$x.3315$d.2315$x.1315$d.315$d.9215$d.8215$x.7215$x.6215$d.5215$x.4215$x.3215$d.2215$x.1215$x.215$d.9115$d.8115$d.7115$d.6115$x.5115$x.4115$x.3115$d.2115$x.1115$d.115$d.9015$d.8015$x.7015$x.6015$d.5015$x.4015$x.3015$d.2015.Ltmp1015$x.1015$x.15$d.8905$x.7905$d.6905$d.5905$d.4905$x.3905$x.2905$d.1905$x.905$d.8805$x.7805$x.6805$d.5805$d.4805$x.3805$x.2805$d.1805$x.805$d.8705$x.7705$d.6705$d.5705$x.4705$d.3705$x.2705$d.1705$x.705$d.8605$x.7605$d.6605$x.5605$x.4605$x.3605$d.2605$x.1605$x.605$d.8505$d.7505$x.6505$x.5505$x.4505dt_match.3505$d.3505.Ltmp2505$d.2505$x.1505$x.505$d.9405$d.8405.Ltmp7405$x.7405$d.6405$d.5405$x.4405$d.3405$x.2405$d.1405$x.405__UNIQUE_ID_alias305$d.9305$d.8305$x.7305$x.6305$d.5305$x.4305$x.3305$d.2305$x.1305$d.305$d.9205$d.8205$d.7205$x.6205$x.5205$x.4205$x.3205$d.2205$x.1205$x.205$d.9105$d.8105$d.7105$d.6105$x.5105$x.4105$x.3105$d.2105$x.1105$x.105$d.9005$d.8005$x.7005$x.6005$d.5005$x.4005$x.3005$x.2005$x.1005rd_init.__key.5$x.5msm_gem_unpin_iova_locked._rs.5msm_dsi_dphy_timing_calc_v4msm_dsi_cphy_timing_calc_v4bpf_trace_run4$d.8994$x.7994$x.6994$x.5994$x.4994$x.3994init_completion.__key.2994$d.2994.Ltmp1994$x.1994$x.994$d.8894$x.7894$x.6894$x.5894$x.4894$d.3894$x.2894$x.1894$x.894$d.8794$x.7794$x.6794$x.5794$x.4794$x.3794$d.2794.Ltmp1794$x.1794$d.794$d.8694$x.7694$x.6694$x.5694$x.4694$x.3694$d.2694.Ltmp1694$x.1694$x.694$d.8594$d.7594$x.6594$d.5594$x.4594$x.3594$x.2594$d.1594$d.594$d.8494$x.7494$x.6494$d.5494$d.4494$x.3494$d.2494$x.1494$d.494$d.9394$d.8394$d.7394$x.6394$x.5394$d.4394$d.3394.Ltmp2394$d.2394$x.1394$d.394$d.9294$d.8294$x.7294$d.6294$x.5294$d.4294$d.3294.Ltmp2294$x.2294$x.1294$x.294$d.9194$d.8194.Ltmp7194$x.7194$x.6194$x.5194$d.4194$x.3194.Ltmp2194$x.2194$d.1194$x.194$d.9094$d.8094$x.7094$d.6094$d.5094$d.4094$x.3094$x.2094$d.1094$x.94$d.8984.Ltmp7984$x.7984$x.6984$x.5984$x.4984$d.3984$x.2984.Ltmp1984$d.1984$x.984$d.8884$x.7884$x.6884$x.5884$x.4884$d.3884$x.2884$x.1884$x.884$d.8784$x.7784$x.6784$x.5784$x.4784$x.3784$d.2784$x.1784$d.784$d.8684$x.7684$x.6684$x.5684$x.4684$x.3684$d.2684.Ltmp1684$x.1684$x.684$d.8584$x.7584$x.6584$x.5584$x.4584$d.3584$d.2584.Ltmp1584$d.1584$x.584$d.8484$x.7484$x.6484$x.5484$d.4484$x.3484.Ltmp2484$d.2484$x.1484$x.484$d.9384$d.8384.Ltmp7384$d.7384$x.6384$x.5384$d.4384$d.3384$d.2384$x.1384$x.384$d.9284$d.8284$x.7284$d.6284$x.5284$d.4284$x.3284$x.2284$d.1284$x.284$d.9184$d.8184$x.7184$x.6184$x.5184$d.4184$x.3184.Ltmp2184$d.2184$x.1184$x.184$d.9084hpd_reg_names_8084$d.8084$x.7084$d.6084$d.5084$d.4084$x.3084$x.2084$x.1084$x.84pwr_clk_names_8x74hpd_clk_names_8x74pwr_reg_names_8x74hpd_reg_names_8x74hpd_clk_freq_8x74$d.8974$x.7974$x.6974$x.5974$x.4974$d.3974$x.2974mdss_funcs.1974$d.1974$d.974$d.8874$x.7874$d.6874$x.5874$d.4874$x.3874$d.2874$x.1874$x.874$d.8774$x.7774$x.6774$d.5774$x.4774$x.3774$x.2774$x.1774$d.774.Ltmp9674$d.8674$x.7674$d.6674$x.5674$x.4674$d.3674$d.2674$d.1674$d.674$d.8574$x.7574$x.6574$d.5574$x.4574$x.3574$d.2574$d.1574$x.574$d.8474.Ltmp7474$x.7474$x.6474$x.5474$d.4474$x.3474$d.2474$x.1474$x.474$d.9374$d.8374$d.7374$x.6374$x.5374$d.4374$x.3374$d.2374$x.1374$x.374$d.9274$d.8274$x.7274$d.6274$x.5274$d.4274$x.3274$x.2274$d.1274$x.274.Ltmp174$d.9174$d.8174$x.7174$x.6174$x.5174$d.4174$d.3174$d.2174$x.1174$x.174$d.9074$d.8074$x.7074$x.6074$d.5074$x.4074$x.3074.Ltmp2074$x.2074$x.1074$d.74debugfs_create_u64__sw_hweight64ktime_get_real_ts64$d.8964$x.7964$x.6964$d.5964$x.4964$d.3964$x.2964$d.1964$d.964$d.8864$x.7864$x.6864$x.5864$x.4864$d.3864$x.2864.Ltmp1864$x.1864$x.864$d.8764$x.7764$d.6764$d.5764$x.4764$x.3764$x.2764$x.1764$d.764$d.8664$x.7664$x.6664$x.5664$x.4664$x.3664$d.2664$x.1664$d.664$d.8564$d.7564$x.6564$x.5564$x.4564$d.3564$x.2564$d.1564$x.564.Ltmp9464$d.8464$x.7464$x.6464$x.5464$d.4464$x.3464$d.2464$x.1464$d.464$d.9364$d.8364$d.7364$x.6364$x.5364$d.4364$x.3364.Ltmp2364$d.2364$x.1364$d.364$d.9264$d.8264$d.7264$x.6264$x.5264$d.4264$x.3264.Ltmp2264$x.2264$x.1264$d.264$d.9164$d.8164$x.7164$x.6164$x.5164$d.4164$d.3164.Ltmp2164$d.2164$x.1164$d.164$d.9064$d.8064$x.7064$d.6064$x.5064$d.4064$d.3064$x.2064$x.1064$d.64$d.8954$x.7954$x.6954$x.5954$x.4954$x.3954$x.2954.Ltmp1954$x.1954$x.954$d.8854$x.7854$d.6854$x.5854$x.4854$d.3854$x.2854$x.1854$d.854$d.8754$x.7754$x.6754$d.5754$x.4754$x.3754$d.2754.Ltmp1754$x.1754$x.754$d.8654$x.7654$d.6654$d.5654$x.4654$d.3654$d.2654.Ltmp1654$x.1654$d.654$d.8554$x.7554$x.6554$d.5554$x.4554$d.3554$d.2554.Ltmp1554$x.1554$x.554$d.8454$x.7454$x.6454$x.5454$d.4454$x.3454.Ltmp2454$d.2454$d.1454$x.454$d.9354$d.8354.Ltmp7354$d.7354$x.6354$x.5354$d.4354$x.3354$d.2354$x.1354$x.354$d.9254.Ltmp8254$d.8254$x.7254$x.6254$x.5254$d.4254$x.3254$x.2254$x.1254$x.254$d.9154$d.8154$x.7154$d.6154$d.5154$x.4154$x.3154$x.2154$x.1154$d.154$d.9054$d.8054$x.7054$x.6054$x.5054$d.4054$d.3054$x.2054$x.1054$x.54a6xx_fault_handler._rs.54$d.8944$x.7944$x.6944$x.5944$x.4944$d.3944$x.2944$x.1944$d.944$d.8844$x.7844$x.6844$d.5844$x.4844$x.3844$x.2844$x.1844$x.844$d.8744$x.7744$x.6744$x.5744$x.4744$x.3744$d.2744$x.1744$x.744.Ltmp9644$d.8644$d.7644$x.6644$x.5644$d.4644$x.3644$x.2644$d.1644$x.644$d.8544$x.7544$x.6544$x.5544$x.4544$x.3544.Ltmp2544$d.2544$x.1544$x.544$d.9444$d.8444$x.7444$x.6444$d.5444$d.4444$x.3444$x.2444$x.1444$x.444$d.9344$d.8344$x.7344$x.6344$x.5344$d.4344$x.3344$d.2344$x.1344$x.344$d.9244$d.8244$d.7244$x.6244$x.5244$d.4244$x.3244$x.2244$x.1244$x.244$d.9144$d.8144$d.7144$x.6144$d.5144$d.4144$x.3144$x.2144$x.1144$x.144$d.9044$d.8044$x.7044$d.6044$x.5044$d.4044$x.3044.Ltmp2044$x.2044$x.1044$x.44msm_gem_free_object._rs.44$d.8934$x.7934$x.6934$x.5934$x.4934$d.3934$x.2934$x.1934$x.934$d.8834$x.7834$x.6834$d.5834$x.4834$x.3834$d.2834$x.1834$x.834$d.8734$x.7734$x.6734$x.5734$x.4734$x.3734$d.2734.Ltmp1734$x.1734$x.734$d.8634$x.7634$d.6634$d.5634$d.4634$x.3634$x.2634$d.1634$d.634$d.8534.Ltmp7534$x.7534$x.6534$x.5534$x.4534$x.3534$x.2534$x.1534$x.534$d.9434$d.8434$x.7434$x.6434$d.5434$d.4434$x.3434$x.2434$x.1434$d.434$d.9334$d.8334$x.7334$x.6334$x.5334$d.4334$d.3334.Ltmp2334$x.2334$d.1334$x.334$d.9234$d.8234$x.7234$x.6234$x.5234$d.4234$d.3234$x.2234$x.1234$d.234$d.9134$d.8134$x.7134$d.6134$d.5134$d.4134$x.3134.Ltmp2134$x.2134$x.1134$x.134$d.9034$d.8034$x.7034$x.6034$x.5034$x.4034$x.3034$d.2034$x.1034$x.34a5xx_cp_err_irq._rs.34$d.8924$x.7924$x.6924$x.5924$x.4924$d.3924$d.2924$x.1924$x.924$d.8824$x.7824$d.6824$d.5824$x.4824$x.3824$d.2824.Ltmp1824$x.1824$x.824$d.8724$x.7724$x.6724$x.5724$x.4724$x.3724$d.2724$x.1724$d.724$d.8624$d.7624$x.6624$d.5624$x.4624$x.3624$x.2624.Ltmp1624$d.1624$x.624__UNIQUE_ID_firmware524$d.8524$d.7524$x.6524$x.5524$x.4524$d.3524$d.2524$x.1524$x.524$d.9424$d.8424$x.7424$x.6424$x.5424$d.4424$x.3424.Ltmp2424$x.2424$x.1424$d.424__UNIQUE_ID_alias324$d.9324$d.8324$x.7324$x.6324$x.5324$d.4324$d.3324$x.2324.Ltmp1324$x.1324$x.324$d.9224$d.8224$d.7224$d.6224$x.5224$d.4224$d.3224$x.2224$d.1224$d.224$d.9124$d.8124$x.7124$x.6124$d.5124$d.4124$x.3124$d.2124$x.1124$x.124$d.9024$d.8024$x.7024$x.6024$x.5024$d.4024$d.3024$d.2024$x.1024$x.24$d.8914$x.7914$x.6914$x.5914$x.4914$x.3914$d.2914$x.1914$x.914$d.8814$x.7814$d.6814$x.5814$x.4814$x.3814$d.2814$x.1814$d.814$d.8714$x.7714$x.6714$x.5714$x.4714$x.3714$d.2714$x.1714$d.714$d.8614$d.7614$d.6614$d.5614$x.4614$x.3614$x.2614$d.1614$x.614__UNIQUE_ID_snapshot_debugbustype514$d.8514$x.7514$x.6514$x.5514$d.4514$d.3514$x.2514$x.1514$x.514$d.9414$d.8414.Ltmp7414$d.7414$x.6414$d.5414$d.4414$x.3414$d.2414.Ltmp1414$x.1414$x.414__UNIQUE_ID_alias314$d.9314$d.8314$x.7314$x.6314$x.5314$d.4314$d.3314$x.2314$d.1314$x.314$d.9214$d.8214$d.7214$d.6214$x.5214$d.4214$d.3214.Ltmp2214$x.2214$d.1214$d.214$d.9114$d.8114$x.7114$x.6114$d.5114$x.4114$d.3114$x.2114$x.1114$x.114$d.9014.Ltmp8014$d.8014$x.7014$d.6014$x.5014$d.4014$d.3014$x.2014$x.1014msm_gem_evict._rs.14$d.14$d.8904$x.7904$x.6904$x.5904$x.4904$d.3904$d.2904.Ltmp1904$x.1904$x.904$d.8804$x.7804$d.6804$x.5804$x.4804$x.3804$d.2804$x.1804$d.804.Ltmp9704$d.8704$x.7704$x.6704$x.5704$x.4704$x.3704$d.2704$x.1704$x.704$d.8604$d.7604$x.6604$x.5604$d.4604$x.3604$x.2604$d.1604$d.604$d.8504.Ltmp7504$x.7504$x.6504$d.5504$d.4504$x.3504$x.2504.Ltmp1504$x.1504$d.504$d.9404$d.8404$d.7404$x.6404$x.5404$d.4404$x.3404$d.2404$x.1404$d.404__UNIQUE_ID_depends304$d.9304$d.8304$x.7304$d.6304$x.5304$d.4304$d.3304codec_data.3304$x.2304$x.1304$x.304$d.9204$d.8204$x.7204$d.6204$x.5204$d.4204$d.3204$x.2204$d.1204$d.204$d.9104$d.8104$x.7104$x.6104.Ltmp5104$x.5104$d.4104$d.3104.Ltmp2104$x.2104$x.1104$x.104$d.9004$d.8004$x.7004$d.6004$x.5004$d.4004$d.3004$x.2004$x.1004$x.4$d.4cfg_handlers_v3msm_dsi_dphy_timing_calc_v3dpu_hw_lm_setup_color3dpu_hw_setup_scaler3_dpu_hw_sspp_setup_scaler3bpf_trace_run3sdm845_vig_sblk_3sm8250_vig_sblk_3sdm845_dma_sblk_3$d.8993$x.7993$d.6993$d.5993$d.4993$x.3993$x.2993$d.1993$x.993$d.8893$x.7893$x.6893$d.5893$d.4893$x.3893$d.2893$d.1893$d.893$d.8793$x.7793$x.6793$d.5793$d.4793$d.3793$x.2793$x.1793$x.793$d.8693$x.7693$x.6693$d.5693$d.4693$d.3693$x.2693$d.1693$d.693$d.8593$x.7593$d.6593$x.5593$d.4593$d.3593$d.2593.Ltmp1593$x.1593$x.593$d.8493$d.7493$d.6493$x.5493$x.4493$d.3493.Ltmp2493$x.2493$d.1493$x.493$d.9393$d.8393.Ltmp7393$x.7393$d.6393$d.5393$x.4393$x.3393$x.2393$d.1393$x.393$d.9293$d.8293$x.7293$x.6293$d.5293$x.4293$x.3293$d.2293$d.1293$d.293$d.9193$d.8193$x.7193$x.6193$x.5193$x.4193$d.3193$x.2193$x.1193$d.193$d.9093$d.8093$d.7093$x.6093$x.5093$x.4093$d.3093$d.2093$x.1093$d.93$d.8983$x.7983$d.6983$d.5983$d.4983$x.3983$d.2983$x.1983$x.983$d.8883$x.7883$d.6883$d.5883$d.4883$x.3883$x.2883$d.1883$d.883$d.8783$x.7783$d.6783$x.5783$x.4783$x.3783$x.2783$x.1783$x.783.Ltmp9683$d.8683$x.7683$x.6683$d.5683$x.4683$x.3683$x.2683$x.1683$d.683$d.8583$d.7583$d.6583$x.5583$d.4583$x.3583$x.2583$x.1583$x.583$d.8483.Ltmp7483$d.7483$d.6483$d.5483$x.4483$x.3483$x.2483$d.1483$d.483$d.9383$d.8383$x.7383$x.6383$x.5383$x.4383$x.3383$x.2383$d.1383$d.383$d.9283$d.8283$x.7283$x.6283$d.5283$x.4283$d.3283$d.2283$x.1283$d.283$d.9183$d.8183$x.7183$d.6183$x.5183$x.4183$d.3183$x.2183$x.1183$d.183$d.9083$d.8083$d.7083$x.6083$x.5083$x.4083$d.3083.Ltmp2083$d.2083$x.1083$d.83$d.8973$x.7973$d.6973$x.5973$d.4973$x.3973$d.2973$x.1973$x.973$d.8873$x.7873$x.6873$d.5873$x.4873$x.3873$x.2873.Ltmp1873$d.1873$x.873$d.8773$x.7773$x.6773$x.5773$d.4773$x.3773$d.2773.Ltmp1773$x.1773$x.773$d.8673$x.7673$x.6673$d.5673$d.4673$x.3673$x.2673$x.1673$x.673$d.8573$d.7573$d.6573$x.5573$d.4573$d.3573$x.2573$x.1573$x.573.Ltmp9473$d.8473$d.7473$x.6473$d.5473$x.4473$x.3473$x.2473.Ltmp1473$d.1473$d.473$d.9373$d.8373$x.7373$d.6373$x.5373$x.4373$d.3373.Ltmp2373$x.2373$d.1373$x.373$d.9273$d.8273$x.7273$x.6273$d.5273$x.4273$d.3273.Ltmp2273$d.2273$x.1273$d.273$d.9173$d.8173$x.7173$d.6173$x.5173$x.4173$x.3173$x.2173$x.1173$d.173$d.9073$d.8073$d.7073$x.6073$x.5073$x.4073$d.3073$d.2073$x.1073$x.73$d.8963$x.7963$d.6963$x.5963$d.4963$x.3963$d.2963.Ltmp1963$x.1963$x.963$d.8863$x.7863$x.6863$d.5863$d.4863$x.3863$x.2863$d.1863$d.863$d.8763$x.7763$x.6763$x.5763.Ltmp4763$d.4763$x.3763$x.2763$x.1763$x.763$d.8663.Ltmp7663$x.7663$d.6663$x.5663$d.4663$x.3663$x.2663.Ltmp1663$d.1663$x.663.Ltmp563$d.8563.Ltmp7563$x.7563$d.6563$x.5563$x.4563$x.3563$d.2563$x.1563$d.563$d.8463$d.7463$x.6463$d.5463$x.4463$d.3463.Ltmp2463$x.2463$d.1463$x.463$d.9363$d.8363.Ltmp7363$x.7363$d.6363$x.5363$x.4363$x.3363$x.2363$d.1363$x.363$d.9263$d.8263$x.7263$d.6263$d.5263$x.4263$d.3263$d.2263$d.1263$x.263$d.9163$d.8163$x.7163$d.6163$x.5163$x.4163$x.3163$x.2163$d.1163$x.163$d.9063$d.8063$d.7063$x.6063$d.5063$x.4063$x.3063$d.2063$d.1063$x.63$d.8953$x.7953$x.6953$d.5953$d.4953$x.3953$d.2953$d.1953$d.953$d.8853$x.7853$x.6853$x.5853$x.4853$x.3853$d.2853$d.1853$x.853$d.8753$x.7753$d.6753$x.5753$d.4753$x.3753$x.2753$d.1753$d.753.Ltmp9653$d.8653$x.7653$x.6653$x.5653$d.4653$x.3653$x.2653$d.1653$x.653$d.8553$d.7553$d.6553$x.5553$x.4553$x.3553.Ltmp2553$x.2553$d.1553$d.553$d.8453.Ltmp7453$d.7453$d.6453$x.5453$x.4453$d.3453$x.2453$x.1453$d.453$d.9353$d.8353$x.7353$d.6353$d.5353$x.4353$d.3353$x.2353$d.1353$d.353.Ltmp253$d.9253$d.8253$x.7253$d.6253$d.5253$x.4253$d.3253dt_match.2253$d.2253$d.1253$d.253$d.9153$d.8153$d.7153$x.6153$x.5153$x.4153$x.3153$d.2153init_completion.__key.1153$d.1153$x.153$d.9053$d.8053$x.7053$d.6053$d.5053$x.4053$x.3053.Ltmp2053$d.2053$d.1053$x.53msm_gem_pin_iova._rs.53$d.8943$x.7943$x.6943$x.5943$d.4943$x.3943$d.2943$x.1943$x.943$d.8843$x.7843$x.6843$x.5843$d.4843$x.3843$d.2843$d.1843$x.843$d.8743$x.7743$x.6743$d.5743$d.4743$x.3743$x.2743$d.1743$d.743$d.8643$x.7643$x.6643$x.5643$x.4643$d.3643$d.2643$x.1643$d.643$d.8543$d.7543$d.6543$d.5543$x.4543$d.3543$x.2543$d.1543$x.543$d.9443$d.8443.Ltmp7443$d.7443$d.6443$x.5443$x.4443$d.3443$x.2443$d.1443$d.443$d.9343$d.8343$x.7343$x.6343$x.5343$x.4343$d.3343.Ltmp2343$x.2343$x.1343$d.343$d.9243$d.8243$x.7243$d.6243$d.5243$x.4243$d.3243$d.2243$d.1243$d.243$d.9143$d.8143$x.7143$x.6143$x.5143$x.4143$d.3143.Ltmp2143$d.2143$d.1143$x.143$d.9043$d.8043$d.7043$x.6043$d.5043$x.4043$d.3043$d.2043$d.1043$x.43a6xx_cp_hw_err_irq._rs.43$d.8933$x.7933$x.6933$d.5933$d.4933$x.3933$x.2933.Ltmp1933$d.1933$x.933$d.8833$x.7833$d.6833$x.5833$d.4833$x.3833$x.2833.Ltmp1833$d.1833$d.833$d.8733$x.7733$x.6733$d.5733$d.4733$x.3733.Ltmp2733$x.2733$d.1733$d.733$d.8633$d.7633$x.6633$x.5633$x.4633$d.3633$d.2633.Ltmp1633$x.1633$x.633$d.8533$d.7533$d.6533$x.5533$x.4533$d.3533$x.2533$d.1533$d.533$d.9433$d.8433$x.7433$d.6433$x.5433$x.4433$x.3433.Ltmp2433$x.2433$d.1433$x.433__UNIQUE_ID_scmversion333$d.9333$d.8333$x.7333$d.6333$d.5333$x.4333$x.3333$d.2333$x.1333$d.333$d.9233$d.8233$x.7233$x.6233$x.5233$x.4233$x.3233$d.2233$d.1233$x.233$d.9133$d.8133$d.7133$x.6133$x.5133$x.4133$d.3133$d.2133$x.1133$d.133$d.9033$d.8033$x.7033$d.6033$d.5033$x.4033$x.3033$x.2033$x.1033$x.33a6xx_cp_hw_err_irq._rs.33$d.8923$x.7923$x.6923$d.5923$d.4923$x.3923$x.2923.Ltmp1923$d.1923$d.923$d.8823$x.7823$x.6823$x.5823$d.4823$x.3823$x.2823$d.1823$x.823$d.8723$x.7723$d.6723$d.5723$d.4723$x.3723$x.2723$x.1723$x.723$d.8623$x.7623$d.6623$x.5623$d.4623$x.3623$d.2623$x.1623$d.623__UNIQUE_ID_firmware523__UNIQUE_ID_modesettype523$d.8523$x.7523$d.6523$d.5523$x.4523$x.3523.Ltmp2523$x.2523.Ltmp1523$d.1523$d.523$d.9423$d.8423.Ltmp7423$x.7423$d.6423$x.5423$x.4423$d.3423$d.2423$d.1423$x.423__UNIQUE_ID_alias323$d.9323$d.8323$x.7323$x.6323$d.5323$x.4323$x.3323pll_init.3323$d.2323$d.1323$d.323$d.9223$d.8223$x.7223$x.6223$d.5223$x.4223$x.3223.Ltmp2223$x.2223$x.1223$x.223$d.9123$d.8123$d.7123$d.6123$x.5123$x.4123$x.3123$x.2123$d.1123$d.123$d.9023$d.8023$d.7023$d.6023$d.5023$x.4023$x.3023.Ltmp2023$x.2023$d.1023dpu_encoder_init.__key.23$x.23a6xx_irq._rs.23a5xx_rbbm_err_irq._rs.23.Ltmp13$d.8913$x.7913$d.6913$d.5913$d.4913$x.3913$x.2913.Ltmp1913$d.1913$x.913$d.8813$x.7813$x.6813$d.5813$d.4813$x.3813$x.2813$d.1813$x.813.Ltmp9713$d.8713$x.7713$d.6713$x.5713$x.4713$d.3713$x.2713$d.1713$x.713$d.8613$x.7613$x.6613$x.5613$x.4613$d.3613$d.2613$x.1613$d.613__UNIQUE_ID_snapshot_debugbus513__UNIQUE_ID_enable_evictiontype513$d.8513.Ltmp7513$d.7513$d.6513$x.5513$x.4513$x.3513$d.2513$x.1513$d.513$d.9413$d.8413$x.7413$d.6413$x.5413$x.4413$d.3413$x.2413$d.1413$d.413__UNIQUE_ID_alias313$d.9313$d.8313$x.7313$d.6313$d.5313$x.4313$x.3313.Ltmp2313$x.2313$x.1313$d.313$d.9213$d.8213$x.7213$x.6213$d.5213$x.4213$x.3213$d.2213$x.1213$x.213$d.9113$d.8113$d.7113$d.6113$x.5113$x.4113$x.3113.Ltmp2113$x.2113$d.1113$d.113$d.9013$d.8013$x.7013$x.6013$d.5013$x.4013$x.3013$d.2013$d.1013$d.13$d.8903$x.7903$d.6903$d.5903$d.4903$x.3903$x.2903$d.1903$x.903$d.8803$x.7803$x.6803$d.5803$d.4803$x.3803$x.2803.Ltmp1803$d.1803$x.803$d.8703$x.7703$d.6703$d.5703$d.4703$d.3703$x.2703.Ltmp1703$x.1703$d.703$d.8603$x.7603$d.6603$d.5603$x.4603$d.3603$d.2603$x.1603$x.603$d.8503$d.7503$x.6503$x.5503$x.4503$d.3503$d.2503$d.1503$x.503$d.9403$d.8403$x.7403$d.6403$d.5403$x.4403$d.3403.Ltmp2403$x.2403$d.1403$x.403__UNIQUE_ID_intree303$d.9303$d.8303$d.7303$x.6303$d.5303$x.4303$x.3303.Ltmp2303$d.2303$d.1303$d.303$d.9203$d.8203$x.7203$x.6203$x.5203$x.4203$x.3203$d.2203$x.1203$x.203$d.9103$d.8103$d.7103$x.6103$x.5103$x.4103$x.3103$d.2103$x.1103$d.103$d.9003$d.8003$d.7003$x.6003$d.5003$x.4003$x.3003$d.2003$d.1003msm_gpu_init.__key.3$d.3dsi_clk_init_v2dsi_tx_buf_get_v2dsi_dma_base_get_v2dpu_plane_validate_multirect_v2dsi_clk_init_6g_v2dsi_link_clk_set_rate_v2dsi_calc_clk_rate_v2dsi_link_clk_disable_v2dsi_link_clk_enable_v2dsi_tx_buf_alloc_v2msm_dsi_dphy_timing_calc_v2bpf_trace_run2sdm845_vig_sblk_2sm8250_vig_sblk_2sdm845_dma_sblk_2$d.8992$x.7992$x.6992$x.5992$x.4992$d.3992$d.2992$x.1992$x.992$d.8892$x.7892$x.6892$x.5892$x.4892$d.3892$x.2892$x.1892$x.892$d.8792$x.7792$x.6792$x.5792$x.4792$x.3792$d.2792$d.1792$x.792.Ltmp9692$d.8692$x.7692$d.6692$x.5692$x.4692$x.3692$d.2692$x.1692$x.692$d.8592$d.7592$x.6592$d.5592$x.4592$x.3592$x.2592$d.1592$d.592$d.8492.Ltmp7492$x.7492$x.6492$d.5492$x.4492$x.3492$d.2492.Ltmp1492$x.1492$x.492$d.9392$d.8392$d.7392$x.6392$x.5392$x.4392$d.3392$d.2392$x.1392$x.392$d.9292$d.8292.Ltmp7292$d.7292$d.6292$x.5292$x.4292$d.3292$x.2292$x.1292$x.292$d.9192$d.8192$x.7192$x.6192$d.5192$x.4192$x.3192$d.2192$d.1192$x.192$d.9092$d.8092$x.7092$d.6092$d.5092$d.4092$x.3092.Ltmp2092$x.2092$d.1092$x.92$d.8982$x.7982$x.6982$x.5982$x.4982$d.3982$x.2982$d.1982$x.982$d.8882$x.7882$x.6882$x.5882$x.4882$x.3882$d.2882.Ltmp1882$x.1882$x.882$d.8782$x.7782$x.6782$d.5782$x.4782$d.3782$d.2782.Ltmp1782$d.1782$d.782$d.8682$x.7682$x.6682$x.5682$x.4682$d.3682$d.2682$x.1682$x.682$d.8582$x.7582$x.6582$d.5582$x.4582$x.3582$d.2582$d.1582$d.582$d.8482$x.7482$x.6482$x.5482$x.4482$x.3482$d.2482$x.1482$x.482$d.9382$d.8382$d.7382$x.6382$x.5382$x.4382$x.3382.Ltmp2382$d.2382$x.1382$x.382$d.9282$d.8282$d.7282$d.6282$x.5282$x.4282$x.3282.Ltmp2282$x.2282$d.1282$x.282$d.9182$d.8182.Ltmp7182$x.7182$x.6182$x.5182$x.4182$x.3182$d.2182$x.1182$x.182$d.9082$d.8082$x.7082$d.6082$d.5082$x.4082$x.3082$x.2082$d.1082$x.82$d.8972$x.7972$x.6972$d.5972$x.4972$d.3972$x.2972.Ltmp1972$x.1972$d.972$d.8872$x.7872$x.6872$x.5872$d.4872$d.3872$d.2872$x.1872$x.872$d.8772$x.7772$d.6772$d.5772$x.4772$x.3772$x.2772$x.1772$d.772.Ltmp8672$d.8672$x.7672$d.6672$x.5672$x.4672$d.3672$d.2672.Ltmp1672$x.1672$d.672$d.8572$x.7572$x.6572$d.5572$x.4572$x.3572$x.2572$d.1572$x.572dt_match.572$d.8472$x.7472$x.6472$x.5472$x.4472$x.3472.Ltmp2472$d.2472$x.1472$x.472$d.9372$d.8372.Ltmp7372$d.7372$x.6372$d.5372$x.4372$x.3372$d.2372$x.1372$d.372$d.9272$d.8272$d.7272$x.6272$x.5272$x.4272$x.3272$x.2272$d.1272$x.272$d.9172.Ltmp8172$d.8172$d.7172$x.6172$x.5172$d.4172$x.3172$d.2172$x.1172$x.172$d.9072$d.8072$x.7072$x.6072$x.5072$d.4072$x.3072$x.2072$x.1072$d.72$d.8962$x.7962$x.6962$x.5962$x.4962$x.3962$x.2962$x.1962$d.962$d.8862$x.7862$x.6862$x.5862$x.4862$d.3862$x.2862$x.1862$x.862$d.8762$x.7762$x.6762$d.5762$x.4762$x.3762$d.2762$x.1762$d.762.Ltmp9662$d.8662$x.7662$x.6662$d.5662$x.4662$x.3662$d.2662$x.1662$d.662$d.8562$x.7562$x.6562$x.5562$x.4562$d.3562$x.2562$d.1562$x.562$d.8462.Ltmp7462$x.7462$x.6462$x.5462$x.4462$x.3462$d.2462$x.1462$d.462$d.9362$d.8362$d.7362$x.6362$x.5362$x.4362$x.3362$d.2362$x.1362$d.362$d.9262$d.8262$d.7262$x.6262$x.5262$x.4262$x.3262$x.2262$x.1262$x.262funcs.262$d.9162$d.8162$x.7162$x.6162$x.5162$x.4162$d.3162$d.2162$x.1162$x.162$d.9062$d.8062$x.7062$d.6062$x.5062$d.4062$d.3062.Ltmp2062$x.2062$x.1062pipe2name.names.1062$x.62mark_purgeable._rs.62$d.8952$x.7952$x.6952$x.5952$x.4952.Ltmp3952$d.3952$x.2952$x.1952$x.952$d.8852$x.7852$x.6852$d.5852$x.4852$d.3852$x.2852.Ltmp1852$x.1852$x.852$d.8752$x.7752$x.6752$d.5752$x.4752$d.3752$d.2752$x.1752$x.752$d.8652$x.7652$x.6652$d.5652$x.4652$x.3652$d.2652$x.1652$d.652$d.8552$x.7552$x.6552$d.5552$x.4552$d.3552$d.2552$x.1552$x.552$d.8452$x.7452$x.6452$d.5452$x.4452$x.3452$d.2452.Ltmp1452$x.1452$x.452$d.9352$d.8352$d.7352.Ltmp6352$x.6352$x.5352$x.4352$x.3352.Ltmp2352$d.2352$x.1352$x.352$d.9252$d.8252$x.7252$x.6252$x.5252$x.4252$x.3252.Ltmp2252$x.2252$x.1252$x.252$d.9152$d.8152$x.7152$x.6152$x.5152$d.4152$x.3152.Ltmp2152$x.2152$x.1152$d.152$d.9052$d.8052$x.7052$x.6052$x.5052$d.4052.Ltmp3052$d.3052$x.2052$x.1052$x.52msm_gem_pin_iova._rs.52$d.8942$x.7942$x.6942$x.5942$x.4942$d.3942$x.2942.Ltmp1942$x.1942$d.942$d.8842$x.7842$x.6842$d.5842$x.4842$x.3842$x.2842$x.1842$x.842$d.8742$x.7742$d.6742$x.5742$x.4742$x.3742$d.2742$x.1742$x.742$d.8642$d.7642$x.6642$d.5642$d.4642$x.3642$x.2642.Ltmp1642$d.1642$x.642$d.8542$x.7542$x.6542$x.5542$x.4542$x.3542$x.2542$x.1542$x.542$d.9442$d.8442$x.7442$x.6442$x.5442$x.4442$x.3442.Ltmp2442$d.2442.Ltmp1442$x.1442$x.442$d.9342$d.8342.Ltmp7342$x.7342$x.6342$d.5342$x.4342$x.3342hdmi_pll_parents.3342$d.2342$x.1342$x.342$d.9242$d.8242$d.7242$x.6242$x.5242$x.4242$x.3242$x.2242$x.1242$x.242$d.9142$d.8142$d.7142$x.6142$x.5142$d.4142$x.3142$x.2142$x.1142$x.142$d.9042$d.8042$x.7042$d.6042.Ltmp5042$x.5042$x.4042$x.3042$x.2042$x.1042$d.42debugfs_create_x32debugfs_create_u32nvmem_cell_read_variable_le_u32__sw_hweight32_dpu_debugfs_show_regset32dpu_fops_regset32dpu_debugfs_setup_regset32dpu_debugfs_open_regset32dpu_debugfs_create_regset32$d.8932$x.7932$x.6932$x.5932$x.4932$d.3932$d.2932$x.1932$d.932$d.8832$x.7832$x.6832$d.5832$x.4832$x.3832$d.2832$x.1832$x.832$d.8732$x.7732$d.6732$x.5732.Ltmp4732$x.4732$d.3732$d.2732$x.1732$x.732$d.8632$x.7632$d.6632$d.5632$d.4632$x.3632$x.2632$d.1632$d.632__UNIQUE_ID_firmware532$d.8532$x.7532$x.6532$d.5532$x.4532$x.3532.Ltmp2532$x.2532$x.1532$x.532$d.9432$d.8432.Ltmp7432$d.7432$x.6432$d.5432$x.4432$x.3432$x.2432$x.1432$d.432__UNIQUE_ID_alias332$d.9332$d.8332$x.7332$x.6332$x.5332$x.4332$d.3332$x.2332$d.1332$x.332$d.9232$d.8232$x.7232$x.6232$d.5232$x.4232$d.3232.Ltmp2232$x.2232$x.1232$d.232$d.9132$d.8132$x.7132$x.6132$x.5132$d.4132$x.3132$x.2132$x.1132$x.132$d.9032$d.8032$x.7032$x.6032$x.5032$d.4032$d.3032.Ltmp2032$d.2032$d.1032$x.32a5xx_cp_err_irq._rs.32.Ltmp922$d.8922$x.7922$x.6922$x.5922$x.4922$x.3922$d.2922$x.1922$x.922$d.8822$x.7822$d.6822$d.5822$x.4822$x.3822$d.2822$x.1822$x.822.Ltmp9722$d.8722$x.7722$x.6722$x.5722$x.4722$d.3722$d.2722$x.1722$d.722$d.8622$d.7622$x.6622$d.5622$x.4622$x.3622$x.2622$d.1622$x.622__UNIQUE_ID_modeset522__UNIQUE_ID_firmware522$d.8522.Ltmp7522$d.7522$x.6522$x.5522$x.4522$d.3522$d.2522$x.1522$x.522$d.9422$d.8422$d.7422$x.6422$d.5422$x.4422$x.3422$x.2422$x.1422$d.422__UNIQUE_ID_alias322$d.9322$d.8322$x.7322$x.6322$x.5322$x.4322$d.3322.Ltmp2322$x.2322$x.1322$x.322$d.9222$d.8222$d.7222$d.6222$x.5222$x.4222$d.3222$x.2222$d.1222$x.222$d.9122$d.8122$x.7122$x.6122$d.5122$x.4122$d.3122.Ltmp2122$d.2122$x.1122$x.122$d.9022$d.8022$x.7022$x.6022$x.5022$d.4022$d.3022$x.2022$x.1022$x.22$d.8912$x.7912$x.6912$x.5912$x.4912$d.3912$d.2912$x.1912$x.912$d.8812$x.7812$x.6812$x.5812$x.4812$x.3812$d.2812.Ltmp1812$x.1812$x.812$d.8712.Ltmp7712$x.7712$x.6712$d.5712$x.4712$x.3712$d.2712.Ltmp1712$x.1712$d.712$d.8612$x.7612$x.6612$x.5612$x.4612$x.3612$x.2612.Ltmp1612$d.1612$x.612__UNIQUE_ID_enable_eviction512__UNIQUE_ID_num_hw_submissionstype512__UNIQUE_ID_rd_fulltype512__UNIQUE_ID_hang_debugtype512$d.8512$x.7512$x.6512$d.5512$x.4512$x.3512$x.2512$d.1512$x.512$d.9412$d.8412$d.7412$x.6412$d.5412$x.4412$x.3412.Ltmp2412$d.2412$x.1412$x.412__UNIQUE_ID_alias312$d.9312$d.8312$x.7312$x.6312$x.5312$x.4312$d.3312$d.2312$d.1312$x.312$d.9212$d.8212$d.7212$d.6212$x.5212$x.4212$d.3212$x.2212$d.1212$d.212$d.9112$d.8112$x.7112$x.6112$x.5112$d.4112$d.3112$x.2112$x.1112$x.112$d.9012$d.8012$x.7012$d.6012$x.5012$d.4012$d.3012$x.2012.Ltmp1012$x.1012$x.12msm_gem_evict._rs.12$d.8902$x.7902$x.6902$x.5902$x.4902$d.3902$d.2902$x.1902$x.902$d.8802$x.7802$x.6802$x.5802$x.4802$x.3802$d.2802$x.1802$d.802$d.8702$x.7702$x.6702$x.5702$x.4702$x.3702$d.2702$x.1702$x.702$d.8602$d.7602$x.6602$x.5602$d.4602$x.3602$x.2602$d.1602$x.602$d.8502$x.7502$d.6502$d.5502$x.4502$x.3502.Ltmp2502$x.2502$x.1502$d.502$d.9402$d.8402.Ltmp7402$d.7402$x.6402$x.5402$x.4402$x.3402$d.2402$x.1402$x.402__UNIQUE_ID_name302$d.9302.Ltmp8302$d.8302$x.7302$d.6302$x.5302$x.4302$d.3302$x.2302$x.1302$x.302$d.9202.Ltmp8202$d.8202$x.7202$d.6202$x.5202$x.4202$d.3202$x.2202$d.1202$x.202$d.9102$d.8102$x.7102$d.6102$d.5102$d.4102$d.3102$x.2102$x.1102$x.102$d.9002$d.8002$x.7002$x.6002$x.5002$x.4002$d.3002$x.2002$x.1002$x.2$d.2cfg_handlers_v1dpu_hw_ctl_trigger_flush_v1dpu_hw_ctl_intf_cfg_v1dpu_hw_ctl_update_pending_flush_intf_v1dpu_hw_ctl_update_pending_flush_merge_3d_v1bpf_trace_run1sdm845_vig_sblk_1sm8250_vig_sblk_1sdm845_dma_sblk_1$d.8991$x.7991$d.6991$d.5991$d.4991$x.3991$x.2991.Ltmp1991$d.1991$x.991$d.8891$x.7891$d.6891$d.5891$d.4891$x.3891$d.2891.Ltmp1891$d.1891$d.891$d.8791$x.7791$x.6791$d.5791$d.4791$x.3791$x.2791.Ltmp1791$x.1791$x.791$d.8691$x.7691$x.6691$d.5691$x.4691$x.3691$x.2691$x.1691$d.691$d.8591$x.7591$d.6591$x.5591$x.4591$x.3591$d.2591$x.1591$x.591$d.8491$d.7491$x.6491$x.5491$d.4491$d.3491$x.2491$d.1491$d.491$d.9391$d.8391$x.7391$x.6391$x.5391$d.4391$x.3391.Ltmp2391$x.2391$d.1391$d.391$d.9291$d.8291$x.7291$x.6291$d.5291$d.4291$x.3291.Ltmp2291$x.2291$x.1291$d.291$d.9191$d.8191.Ltmp7191$x.7191$d.6191$x.5191$d.4191$d.3191$x.2191$x.1191$x.191$d.9091$d.8091$d.7091$x.6091$x.5091$x.4091$d.3091$d.2091$x.1091$d.91$d.8981.Ltmp7981$x.7981$d.6981$d.5981$d.4981$x.3981$d.2981.Ltmp1981$x.1981$x.981$d.8881$x.7881$d.6881$d.5881$d.4881$x.3881$x.2881$d.1881$d.881$d.8781$x.7781$x.6781$x.5781$x.4781$x.3781$x.2781$x.1781$x.781.Ltmp8681$d.8681$x.7681$d.6681$d.5681$x.4681$x.3681$x.2681.Ltmp1681$d.1681$d.681$d.8581.Ltmp7581$x.7581$d.6581$x.5581$d.4581$d.3581$x.2581.Ltmp1581$x.1581$x.581$d.8481$d.7481$d.6481$d.5481$d.4481$x.3481.Ltmp2481$x.2481$d.1481$d.481$d.9381$d.8381.Ltmp7381$x.7381$d.6381$x.5381$d.4381$x.3381$x.2381$d.1381$x.381$d.9281$d.8281$x.7281$x.6281$d.5281$d.4281$d.3281$d.2281$x.1281$d.281$d.9181$d.8181$d.7181$d.6181$x.5181$d.4181$d.3181.Ltmp2181$x.2181$d.1181funcs.181$d.181$d.9081$d.8081$x.7081$x.6081$x.5081$x.4081$d.3081$d.2081$x.1081$d.81$d.8971$x.7971$d.6971$x.5971$d.4971$x.3971$d.2971$d.1971$x.971$d.8871$x.7871$x.6871$d.5871$x.4871$x.3871$x.2871$d.1871$x.871unref_cursor_worker.871$d.8771$x.7771$x.6771$x.5771$d.4771$d.3771$d.2771$x.1771$x.771.Ltmp9671$d.8671$x.7671$x.6671$x.5671$d.4671$x.3671$x.2671$d.1671$x.671$d.8571$x.7571$d.6571$x.5571$x.4571$d.3571$d.2571.Ltmp1571$x.1571$x.571$d.8471.Ltmp7471$d.7471$x.6471$x.5471$d.4471$d.3471$x.2471$d.1471$x.471$d.9371$d.8371$x.7371$d.6371$x.5371$d.4371$d.3371$x.2371$d.1371$x.371$d.9271$d.8271$x.7271$x.6271$d.5271$d.4271$d.3271$d.2271$x.1271$d.271$d.9171$d.8171$x.7171$d.6171$x.5171$x.4171$x.3171$x.2171$x.1171$d.171$d.9071$d.8071$d.7071$x.6071$x.5071$x.4071$d.3071.Ltmp2071$d.2071$x.1071$x.71$d.8961$x.7961$x.6961$x.5961$d.4961$x.3961$d.2961$d.1961$x.961$d.8861$x.7861$x.6861$d.5861$x.4861$x.3861$d.2861.Ltmp1861$d.1861$d.861$d.8761$x.7761$x.6761$x.5761$d.4761$x.3761$x.2761$d.1761$x.761$d.8661$x.7661$d.6661$x.5661$d.4661$x.3661$x.2661$x.1661$x.661$d.8561$d.7561$d.6561$d.5561$x.4561$x.3561$d.2561.Ltmp1561$x.1561$d.561$d.8461$d.7461$x.6461$d.5461$d.4461$d.3461$x.2461$d.1461$x.461$d.9361$d.8361$x.7361$d.6361$x.5361$d.4361$x.3361.Ltmp2361$x.2361$d.1361$x.361$d.9261$d.8261$x.7261$x.6261$d.5261$d.4261$d.3261.Ltmp2261$d.2261$d.1261$d.261.Ltmp9161$d.9161$d.8161$x.7161$d.6161$d.5161$x.4161$x.3161.Ltmp2161$x.2161$x.1161$x.161$d.9061$d.8061$d.7061$x.6061$d.5061$x.4061$x.3061$d.2061$d.1061$x.61$d.8951$x.7951$x.6951$x.5951$d.4951$x.3951$d.2951.Ltmp1951$d.1951$d.951.Ltmp851$d.8851$x.7851$d.6851$x.5851$x.4851$x.3851$d.2851$d.1851$d.851$d.8751$x.7751$x.6751$x.5751$d.4751$x.3751$x.2751.Ltmp1751$x.1751$d.751$d.8651$x.7651$d.6651$x.5651$d.4651$d.3651$x.2651.Ltmp1651$x.1651$x.651$d.8551$d.7551$d.6551$x.5551$x.4551$x.3551$x.2551$d.1551$d.551$d.9451$d.8451$d.7451$x.6451$x.5451$d.4451$d.3451.Ltmp2451$x.2451$d.1451$d.451$d.9351$d.8351.Ltmp7351$x.7351$x.6351$x.5351$d.4351$d.3351$x.2351$d.1351$d.351$d.9251$d.8251$d.7251$x.6251$d.5251$d.4251$d.3251$d.2251$d.1251$d.251$d.9151$d.8151$d.7151$x.6151$d.5151$x.4151$x.3151$d.2151$d.1151$x.151$d.9051$d.8051$x.7051$d.6051$d.5051$x.4051$x.3051$x.2051$d.1051$x.51.Ltmp941$d.8941$x.7941$x.6941$d.5941$d.4941$x.3941$d.2941$d.1941$x.941$d.8841$x.7841$d.6841$x.5841$d.4841$x.3841$d.2841$d.1841$x.841$d.8741$x.7741$x.6741$d.5741$d.4741$x.3741$x.2741$x.1741$d.741.Ltmp9641$d.8641$x.7641$x.6641$x.5641$x.4641$x.3641.Ltmp2641$d.2641$x.1641$d.641$d.8541$x.7541$d.6541$d.5541$x.4541$d.3541.Ltmp2541$d.2541$d.1541$d.541$d.9441$d.8441$d.7441$x.6441$d.5441$d.4441$d.3441$x.2441$d.1441$x.441$d.9341$d.8341$x.7341$d.6341$x.5341$d.4341$d.3341$x.2341$d.1341$d.341$d.9241$d.8241$x.7241$d.6241$x.5241$d.4241$d.3241$d.2241$d.1241$d.241$d.9141$d.8141$x.7141$x.6141$d.5141$x.4141$d.3141$d.2141$d.1141funcs.141$d.141$d.9041$d.8041$x.7041$x.6041$d.5041$x.4041$d.3041.Ltmp2041$x.2041$d.1041$x.41a6xx_cp_hw_err_irq._rs.41$d.8931$x.7931$x.6931$x.5931$d.4931$x.3931$x.2931$d.1931$x.931$d.8831$x.7831$d.6831$x.5831$d.4831$x.3831$x.2831$d.1831$d.831$d.8731$x.7731$x.6731$d.5731$d.4731$x.3731$x.2731.Ltmp1731$x.1731$x.731$d.8631$x.7631$x.6631$x.5631$x.4631$d.3631$d.2631$x.1631$x.631__UNIQUE_ID_firmware531$d.8531.Ltmp7531$d.7531$d.6531$x.5531$x.4531$d.3531$x.2531$x.1531$d.531$d.9431$d.8431$x.7431$x.6431$x.5431$d.4431$d.3431$d.2431$d.1431$x.431__UNIQUE_ID_alias331$d.9331$d.8331$x.7331$d.6331$d.5331$d.4331$x.3331.Ltmp2331$d.2331$x.1331$d.331$d.9231$d.8231$d.7231$x.6231$x.5231$d.4231$x.3231$d.2231$x.1231$x.231$d.9131$d.8131$d.7131$x.6131$d.5131$x.4131$d.3131.Ltmp2131$x.2131$x.1131$d.131$d.9031$d.8031$x.7031$d.6031$d.5031$x.4031$x.3031$x.2031$x.1031a6xx_cp_hw_err_irq._rs.31$d.31$d.8921$x.7921$x.6921$x.5921$d.4921$x.3921$x.2921$d.1921$x.921$d.8821$x.7821$x.6821$x.5821$d.4821$x.3821$x.2821.Ltmp1821$d.1821$x.821$d.8721$x.7721$d.6721$d.5721$d.4721$x.3721$x.2721$x.1721$x.721$d.8621$x.7621$x.6621$x.5621$d.4621$x.3621$d.2621.Ltmp1621$x.1621$d.621__UNIQUE_ID_firmware521__UNIQUE_ID_dumpstatetype521$d.8521$x.7521$d.6521$x.5521$d.4521$x.3521$x.2521$d.1521$d.521$d.9421$d.8421$x.7421$x.6421$x.5421$d.4421$d.3421.Ltmp2421$d.2421.Ltmp1421$d.1421$x.421__UNIQUE_ID_alias321$d.9321$d.8321$d.7321$x.6321$d.5321$d.4321$x.3321$d.2321$x.1321$d.321$d.9221$d.8221$x.7221$x.6221$x.5221$d.4221$x.3221$d.2221$x.1221$x.221$d.9121.Ltmp8121$d.8121$d.7121$d.6121$x.5121$x.4121$x.3121$x.2121$x.1121$d.121$d.9021$d.8021$d.7021$x.6021$d.5021$x.4021$x.3021$d.2021$x.1021dp_display_probe.__key.21$x.21msm_gem_active_get._rs.21a5xx_rbbm_err_irq._rs.21$d.8911$x.7911$x.6911$d.5911$d.4911$x.3911$x.2911$d.1911$x.911$d.8811$x.7811$x.6811$d.5811$d.4811$x.3811$x.2811$d.1811$x.811$d.8711$x.7711$d.6711$x.5711$x.4711$x.3711$x.2711$d.1711$x.711$d.8611$d.7611$d.6611$x.5611$x.4611$d.3611$d.2611$x.1611$d.611__UNIQUE_ID_num_hw_submissions511__UNIQUE_ID_rd_full511__UNIQUE_ID_hang_debug511$d.8511$d.7511$x.6511$x.5511$d.4511$x.3511$d.2511$x.1511$x.511$d.9411$d.8411.Ltmp7411$x.7411$x.6411$x.5411$d.4411.Ltmp3411$d.3411$x.2411$d.1411$x.411__UNIQUE_ID_alias311$d.9311$d.8311$x.7311$x.6311$d.5311$d.4311$x.3311$x.2311$x.1311$d.311$d.9211$d.8211$x.7211$x.6211$d.5211$d.4211$x.3211$d.2211$x.1211$x.211$d.9111.Ltmp8111$d.8111$d.7111$d.6111$x.5111$x.4111$x.3111$x.2111$d.1111$d.111$d.9011.Ltmp8011$d.8011$d.7011$x.6011$d.5011$x.4011$x.3011$d.2011$d.1011$d.11$d.8901$x.7901$d.6901$d.5901$d.4901$x.3901$x.2901.Ltmp1901$d.1901$x.901$d.8801$x.7801$d.6801$d.5801$d.4801$d.3801$x.2801$d.1801$x.801.Ltmp9701$d.8701$x.7701$d.6701$d.5701$x.4701$x.3701$x.2701$x.1701$x.701$d.8601$x.7601$d.6601$x.5601$x.4601$d.3601$d.2601$x.1601$d.601$d.8501.Ltmp7501$d.7501$x.6501$x.5501$d.4501$d.3501$x.2501.Ltmp1501$d.1501$x.501$d.9401$d.8401$x.7401$d.6401$d.5401$d.4401$d.3401$x.2401$d.1401$x.401__UNIQUE_ID_vermagic301$d.9301$d.8301$d.7301$x.6301$d.5301$d.4301$x.3301$d.2301$d.1301$d.301$d.9201$d.8201$x.7201$x.6201$x.5201$d.4201$x.3201.Ltmp2201$d.2201$x.1201$d.201$d.9101$d.8101$d.7101$x.6101$x.5101$x.4101$x.3101.Ltmp2101$d.2101$x.1101$x.101$d.9001$d.8001$x.7001$d.6001$d.5001$x.4001$x.3001$d.2001$d.1001$d.1sdm845_vig_sblk_0sc7180_vig_sblk_0sm8250_vig_sblk_0sdm845_dma_sblk_0$d.8990$x.7990$x.6990$x.5990$x.4990$d.3990$d.2990$x.1990$x.990$d.8890$x.7890$x.6890$x.5890$x.4890$x.3890$x.2890$x.1890$x.890$d.8790$x.7790$x.6790$x.5790$x.4790$d.3790$d.2790$x.1790$x.790$d.8690$x.7690$x.6690$x.5690$x.4690$x.3690$d.2690$x.1690$x.690$d.8590$d.7590$x.6590$x.5590$x.4590$x.3590$x.2590.Ltmp1590$d.1590$d.590$d.8490$x.7490$d.6490$x.5490$x.4490$x.3490.Ltmp2490$d.2490$x.1490$x.490$d.9390$d.8390.Ltmp7390$d.7390$x.6390$d.5390$x.4390$d.3390$d.2390$x.1390$x.390$d.9290$d.8290$d.7290$d.6290$x.5290$x.4290$d.3290$d.2290$d.1290$x.290$d.9190$d.8190$x.7190$x.6190$x.5190$x.4190$x.3190$d.2190$x.1190$x.190$d.9090$d.8090$x.7090$d.6090$d.5090$x.4090$x.3090$x.2090$d.1090$x.90$d.8980$x.7980$x.6980$x.5980$x.4980$d.3980$x.2980$d.1980$x.980$d.8880$x.7880$x.6880$x.5880$x.4880$d.3880$d.2880$x.1880$x.880$d.8780$x.7780$x.6780$d.5780$x.4780$x.3780$d.2780$x.1780$x.780.Ltmp9680$d.8680$x.7680$x.6680$x.5680$x.4680$d.3680$d.2680$x.1680$x.680$d.8580$x.7580$x.6580$d.5580$x.4580$x.3580$d.2580$d.1580$d.580.Ltmp9480$d.8480$x.7480$x.6480$x.5480$x.4480$x.3480$d.2480.Ltmp1480$x.1480$x.480$d.9380$d.8380$d.7380$x.6380$x.5380$x.4380$x.3380$d.2380$x.1380$d.380$d.9280$d.8280$d.7280$d.6280$x.5280$x.4280$x.3280$x.2280$d.1280$x.280$d.9180$d.8180$x.7180$x.6180$x.5180$x.4180$x.3180$d.2180$x.1180$x.180$d.9080$d.8080$x.7080$x.6080$x.5080$d.4080$x.3080.Ltmp2080$x.2080$x.1080$x.80$d.8970$x.7970$x.6970$x.5970$x.4970$x.3970$x.2970$x.1970$d.970$d.8870$x.7870$x.6870$x.5870$d.4870$d.3870$d.2870.Ltmp1870$x.1870$d.870$d.8770$x.7770$x.6770$d.5770$x.4770$x.3770$x.2770$d.1770$x.770$d.8670$x.7670$d.6670$d.5670$x.4670$d.3670$d.2670$x.1670$d.670$d.8570$d.7570$x.6570$d.5570$x.4570$x.3570$x.2570$d.1570$d.570.Ltmp9470$d.8470$x.7470$x.6470$d.5470$x.4470$x.3470$d.2470$x.1470$d.470$d.9370$d.8370$d.7370$x.6370$x.5370$x.4370$x.3370.Ltmp2370$d.2370$x.1370$x.370$d.9270$d.8270$d.7270$d.6270$x.5270$x.4270$x.3270.Ltmp2270$x.2270$x.1270$x.270$d.9170$d.8170$d.7170$x.6170$x.5170$x.4170$d.3170.Ltmp2170$d.2170$x.1170$x.170$d.9070$d.8070$x.7070$x.6070$x.5070$d.4070$x.3070$x.2070$d.1070$d.70hpd_clk_names_8960hpd_reg_names_8960$d.8960$x.7960$x.6960$d.5960$x.4960$d.3960$x.2960.Ltmp1960$x.1960$d.960$d.8860$x.7860$x.6860$x.5860$x.4860$d.3860$x.2860$x.1860$x.860$d.8760$x.7760$d.6760$d.5760$x.4760$d.3760$d.2760$x.1760$d.760$d.8660.Ltmp7660$x.7660$x.6660$x.5660$x.4660$d.3660$d.2660.Ltmp1660$d.1660$d.660$d.8560$x.7560$x.6560$x.5560$x.4560$d.3560$x.2560$x.1560$x.560$d.8460$x.7460$x.6460$x.5460$x.4460$x.3460.Ltmp2460$d.2460$x.1460$d.460$d.9360$d.8360.Ltmp7360$d.7360$x.6360$d.5360$x.4360$x.3360$d.2360$x.1360$d.360$d.9260$d.8260$x.7260$d.6260$x.5260$x.4260$x.3260$x.2260$x.1260$x.260$d.9160$d.8160$x.7160$x.6160$x.5160$d.4160$d.3160$x.2160$x.1160$d.160$d.9060$d.8060$x.7060$x.6060$x.5060$d.4060$d.3060$x.2060$x.1060$x.60$d.8950$x.7950$x.6950$d.5950$x.4950$d.3950$x.2950$x.1950$x.950$d.8850$x.7850$x.6850$d.5850$x.4850$x.3850$x.2850$x.1850$x.850$d.8750$x.7750$d.6750$d.5750$x.4750$x.3750$d.2750$d.1750$x.750.Ltmp9650.Ltmp8650$d.8650$x.7650$x.6650$d.5650$x.4650$x.3650$d.2650$d.1650$d.650$d.8550$x.7550$x.6550$d.5550$x.4550$d.3550.Ltmp2550$d.2550$x.1550$x.550$d.9450$d.8450.Ltmp7450$x.7450$d.6450$d.5450$x.4450$x.3450$d.2450$x.1450$x.450$d.9350$d.8350$x.7350$x.6350$d.5350$x.4350$x.3350$d.2350$x.1350$x.350$d.9250$d.8250$x.7250$x.6250$x.5250$x.4250$x.3250$x.2250$x.1250$x.250$d.9150$d.8150$x.7150$x.6150$x.5150$d.4150$x.3150$x.2150$x.1150$x.150$d.9050$d.8050$d.7050$x.6050$x.5050$x.4050init_completion.__key.3050$d.3050.Ltmp2050$x.2050$x.1050$x.50$d.8940$x.7940$d.6940$x.5940$x.4940$d.3940$x.2940$x.1940$x.940$d.8840$x.7840$x.6840$d.5840$x.4840$x.3840$x.2840$x.1840$x.840$d.8740$x.7740$x.6740$x.5740$x.4740$x.3740$d.2740$x.1740$x.740$d.8640$x.7640$x.6640$d.5640$d.4640init_completion.__key.3640$x.3640$x.2640$d.1640$x.640$d.8540$d.7540$x.6540$x.5540$x.4540$x.3540$x.2540$x.1540$x.540$d.9440$d.8440$x.7440$d.6440$x.5440$x.4440$x.3440$x.2440$x.1440$d.440$d.9340$d.8340$x.7340$x.6340$d.5340$x.4340$x.3340.Ltmp2340$d.2340$x.1340$x.340$d.9240$d.8240$x.7240$x.6240$x.5240$x.4240$x.3240$x.2240$x.1240$x.240$d.9140.Ltmp8140$d.8140$d.7140$x.6140$x.5140$d.4140$x.3140.Ltmp2140$x.2140$x.1140$x.140perfcntrs.140$d.9040$d.8040$x.7040$d.6040$x.5040$d.4040$x.3040$x.2040$x.1040$x.40$d.8930$x.7930$x.6930$x.5930$x.4930$x.3930$d.2930.Ltmp1930$x.1930msm_kms_init.__key.930$x.930$d.8830$x.7830$x.6830$d.5830$x.4830$x.3830$d.2830.Ltmp1830$x.1830$x.830$d.8730$x.7730$x.6730$x.5730$x.4730$x.3730$d.2730$x.1730$d.730$d.8630$d.7630$x.6630$d.5630$x.4630$x.3630$x.2630.Ltmp1630$d.1630$d.630__UNIQUE_ID_license530__UNIQUE_ID_firmware530$d.8530$x.7530$x.6530$d.5530$x.4530$x.3530$d.2530$x.1530$x.530$d.9430$d.8430$x.7430$d.6430$d.5430$x.4430$x.3430.Ltmp2430$x.2430$x.1430$d.430__UNIQUE_ID_alias330$d.9330$d.8330$x.7330$x.6330$x.5330$x.4330$d.3330$x.2330$d.1330$x.330$d.9230$d.8230$x.7230$x.6230$d.5230$x.4230$d.3230$x.2230$d.1230$d.230$d.9130$d.8130$x.7130$x.6130$x.5130$x.4130$x.3130$d.2130$x.1130$x.130$d.9030$d.8030$d.7030$x.6030$x.5030$d.4030$d.3030$d.2030$x.1030$x.30a5xx_cp_err_irq._rs.30$d.8920$x.7920$x.6920$d.5920$x.4920$d.3920$d.2920.Ltmp1920$x.1920$d.920$d.8820$x.7820$x.6820$d.5820$x.4820$x.3820$d.2820$x.1820$x.820$d.8720$x.7720$x.6720$x.5720$x.4720$d.3720$d.2720$x.1720$d.720$d.8620$d.7620$d.6620$d.5620$x.4620$x.3620$x.2620$d.1620$x.620__UNIQUE_ID_dumpstate520__UNIQUE_ID_firmware520$d.8520$d.7520$x.6520$x.5520$x.4520$d.3520.Ltmp2520$d.2520$x.1520$x.520$d.9420$d.8420.Ltmp7420$x.7420$d.6420$x.5420$x.4420$x.3420$x.2420$x.1420$x.420__UNIQUE_ID_alias320$d.9320$d.8320$x.7320$x.6320$x.5320$x.4320$x.3320$x.2320$d.1320$x.320$d.9220$d.8220$d.7220$d.6220$x.5220$x.4220$d.3220.Ltmp2220$x.2220$d.1220$d.220$d.9120$d.8120$x.7120$x.6120$x.5120$d.4120$d.3120$d.2120$d.1120$x.120$d.9020.Ltmp8020$d.8020$x.7020$x.6020$x.5020$d.4020$d.3020.Ltmp2020$x.2020$d.1020$x.20msm_gem_active_get._rs.20.Ltmp10$d.8910$x.7910$x.6910$x.5910$x.4910$d.3910$d.2910.Ltmp1910$x.1910$x.910$d.8810$x.7810$d.6810$x.5810$x.4810$x.3810$d.2810$x.1810$x.810.Ltmp9710$d.8710$x.7710$x.6710$d.5710$x.4710$x.3710$d.2710$x.1710$d.710$d.8610$x.7610$x.6610$d.5610$x.4610$x.3610$x.2610$d.1610$x.610$d.8510.Ltmp7510$x.7510$x.6510$d.5510$x.4510$x.3510$x.2510$x.1510$d.510$d.9410$d.8410$d.7410$d.6410$x.5410$x.4410$x.3410$d.2410$x.1410$d.410__UNIQUE_ID_alias310$d.9310$d.8310$x.7310$d.6310$x.5310$x.4310$d.3310$x.2310$x.1310$x.310$d.9210$d.8210$x.7210$d.6210$x.5210$x.4210$d.3210$x.2210$d.1210$d.210$d.9110$d.8110$x.7110$x.6110$d.5110$d.4110$d.3110.Ltmp2110$x.2110.Ltmp1110$x.1110$x.110$d.9010$d.8010$x.7010$d.6010$x.5010$x.4010$d.3010.Ltmp2010$x.2010supported_format_modifiers.2010$x.1010$x.10msm_gem_purge._rs.10$d.8900$x.7900$x.6900$x.5900$x.4900$d.3900$x.2900$x.1900$x.900$d.8800$x.7800$x.6800$x.5800$x.4800$x.3800$d.2800.Ltmp1800$x.1800$d.800$d.8700$x.7700$x.6700$x.5700$d.4700$d.3700$d.2700.Ltmp1700$d.1700$d.700$d.8600$x.7600$x.6600$x.5600$d.4600$x.3600$x.2600$d.1600$x.600$d.8500$x.7500$d.6500$x.5500$x.4500$x.3500$d.2500$x.1500$d.500$d.9400$d.8400$d.7400$x.6400$x.5400$x.4400$x.3400.Ltmp2400$x.2400$x.1400$x.400$d.9300$d.8300$x.7300$d.6300$x.5300$x.4300$d.3300.Ltmp2300$x.2300$x.1300$x.300$d.9200$d.8200$x.7200$d.6200$x.5200$x.4200$x.3200$x.2200$d.1200$x.200$d.9100$d.8100$x.7100$d.6100$d.5100$d.4100$d.3100$x.2100$x.1100$x.100$d.9000$d.8000$x.7000$x.6000$x.5000$d.4000$d.3000$x.2000$x.1000mdp4_get_config.config.0cm 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