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((@3_Q"rrk@TE0?@_Q"rrk@TE0?ֈ@@_qrrk@TE0?֨@@_qrrk@TE0?*z94*' k`T!*K*)5Z@(@(_QrQrk@TE0?ֈ@@(_QrQrk@TE0?֨@an@#Rb@9@@af@CRb@9@`A8C_ !TONWM_LgK{J#_?#{ _WOh@*4@*R{_x @.@")@L(  ?3i)s K $) @kT(4@*R{_v@ @@qx)@"L(h2 )sK @kT5OD @WC_B{Ũ#_!눤?#{WOL( #RM^ @X@9@^_CR_@9@Y6@@( 6x9@ T)Rh6&h6@@y(6h@1@9H4h@h@)R(!Ți@*!qHR&h)R1h7`OBWA{è#_`~@`*!i1(}_ @* ȫ5;Ո6?#{  )R1H7{#_ 1(}_ @* ȫ5;ը6hHh߈ű6?#{{#_ g@?#{{#_drivers/spi/spi-pl022.c% %  ""#"`  author=Linus Walleij description=PL022 SSP Controller Driverlicense=GPLvermagic=6.6.30-android15-7-gbb616d66d8a9-ab11968886-4k SMP preempt mod_unload modversions aarch64name=spi_pl022intree=Yscmversion=gbb616d66d8a9depends=alias=amba:d???41022alias=amba:d01080022alias=amba:d00080023alias=amba:d???B6022  mapped registers from %pa to %p could not retrieve SSP/SPI bus clock pl022,ctrl-lenMicrowire duplex mode is configured incorrectly ssp-pl022cpsdvsr is configured incorrectly spi-pl022 CR0: %x pl022,tx-level-trigFailed to work in dma mode, work without dma! rxMax speed that can be programmed is %d Hz, you requested %d spi-pl022 exp_fifo_level/fifodepth: %u/%d pl022,autosuspend-delayWait State is configured incorrectly pl022pl022,interfaceunidirectional mode not supported in this hardware version TX FIFO Trigger Level is configured incorrectly spi-pl022 CR1: %x pl022,rtpl022: Matching cpsdvsr and scr not found for %d Hz rate read %u surplus bytes (did you request an odd number of bytes on a 16bit bus?) problem resuming txprobe: no platform data defined do_polling_transfercould not enable SSP/SPI bus clock setup for DMA on RX %s, TX %s no dt node defined controller data is incorrectCommunication mode is configured incorrectly pl022,wait-stateRX FIFO Trigger Level is configured incorrectly probe - cannot get IRQ (%d) will use autosuspend for runtime pm, delay %dms %s: timeout! pl022,duplexpl022,com-modeThis controller can only handle 4 <= n <= %d bit words bad message state in interrupt handlerRXFIFO is full Requested frequency: %d Hz is less than minimum possible %d Hz hierarchy is configured incorrectly spi-pl022 DMACR: %x ARM PL022 driver, device ID: 0x%08x problem registering spi host probe - cannot alloc SPI host message of %u bytes to transmit but the current chip bus has a data width of %u bytes! interface is configured incorrectly pl022,rx-level-trigFIFO overrun skipping this message spi-pl022 SR: %x Microwire half duplex mode requested, but this is only available in the ST version of PL022 illegal data size for this controller! CTRL LEN is configured incorrectly LinuxLinuxspi_pl022:ڙamba_driver_registeramba_driver_unregisterXi_dev_info$pEdevm_kmalloc?of_property_read_variable_u32_array7of_find_property B__spi_alloc_controller 7amba_request_regionsqVdevm_ioremapRvamba_release_regionsput_deviceؕ_dev_err/^devm_clk_getZd#tasklet_initnbtdevm_request_threaded_irqdevm_spi_register_controllerF_dev_err_probeVC__pm_runtime_idleclk_disable wclk_unpreparefm#pm_runtime_set_autosuspend_delay+!__pm_runtime_use_autosuspendm\alt_cb_patch_nopsl5tasklet_unlock_waitT=spi_controller_suspendpm_runtime_force_suspendN>Ispi_controller_resumeUQpinctrl_pm_select_sleep_state{Wpm_runtime_force_resumeE?pinctrl_pm_select_idle_statepinctrl_pm_select_default_stateqs|clk_prepareUclk_enable zkfree9Xkmalloc_caches.>kmalloc_traceCnUclk_get_rateGV__warn_printk<_dev_warn__stack_chk_failIloops_per_jiffyPjiffiestspi_delay_execA"Ugpiod_set_value+@log_write_mmio$$J$ S$!3"^$# g$u$$$$$$$$$I I'$0$C$T$a$s$$$$$$$$+$F$b$~$$$$$$$$ $ $ $ $ $$+$7$C$O$[$g$s$$$$$$$$$$$$$+$6$X$z$$$$$$ $%$?$Y$e$r$}$$$$$$$$$$$$$$)$>$T$f$y$$$$$$$$$ $$-$=$M$]$ n$ $ $ $ $$$$$$$)$:$K$\$m$~$$$$$$.$f/@$W$_f|mw@0$*!?ww $w@$2 $c53$@6:$_ $% A$@2$`>$P$+k_$+kn$p@u$p|$)@$c$ $d1$(ͣ Ly I1k@6FCF *c 30` $$L CL0 L@$IPy cX_ $`%$  c8 < ) $-$ 9$  $-$ <$ <$ $ 90$ 9@$ <Q$ i$ u$ $ $ $ $ $  mw-^ww$ K mw$ M E$ O$ < $-$a5$o"$ R4$ {fifodepthmax_bpwunidirextended_crpl023internal_cs_ctrlpl022_config_chipslave_tx_disableclk_freqcom_moderx_lev_trigtx_lev_trigctrl_lenwait_stateclkdelayssp_interfaceSSP_INTERFACE_MOTOROLA_SPISSP_INTERFACE_TI_SYNC_SERIALSSP_INTERFACE_NATIONAL_MICROWIRESSP_INTERFACE_UNIDIRECTIONALssp_hierarchySSP_MASTERSSP_SLAVEssp_clock_paramscpsdvsrssp_modeINTERRUPT_TRANSFERPOLLING_TRANSFERDMA_TRANSFERssp_rx_level_trigSSP_RX_1_OR_MORE_ELEMSSP_RX_4_OR_MORE_ELEMSSP_RX_8_OR_MORE_ELEMSSP_RX_16_OR_MORE_ELEMSSP_RX_32_OR_MORE_ELEMssp_tx_level_trigSSP_TX_1_OR_MORE_EMPTY_LOCSSP_TX_4_OR_MORE_EMPTY_LOCSSP_TX_8_OR_MORE_EMPTY_LOCSSP_TX_16_OR_MORE_EMPTY_LOCSSP_TX_32_OR_MORE_EMPTY_LOCssp_microwire_ctrl_lenSSP_BITS_4SSP_BITS_5SSP_BITS_6SSP_BITS_7SSP_BITS_8SSP_BITS_9SSP_BITS_10SSP_BITS_11SSP_BITS_12SSP_BITS_13SSP_BITS_14SSP_BITS_15SSP_BITS_16SSP_BITS_17SSP_BITS_18SSP_BITS_19SSP_BITS_20SSP_BITS_21SSP_BITS_22SSP_BITS_23SSP_BITS_24SSP_BITS_25SSP_BITS_26SSP_BITS_27SSP_BITS_28SSP_BITS_29SSP_BITS_30SSP_BITS_31SSP_BITS_32ssp_microwire_wait_stateSSP_MWIRE_WAIT_ZEROSSP_MWIRE_WAIT_ONEssp_duplexSSP_MICROWIRE_CHANNEL_FULL_DUPLEXSSP_MICROWIRE_CHANNEL_HALF_DUPLEXssp_clkdelaySSP_FEEDBACK_CLK_DELAY_NONESSP_FEEDBACK_CLK_DELAY_1TSSP_FEEDBACK_CLK_DELAY_2TSSP_FEEDBACK_CLK_DELAY_3TSSP_FEEDBACK_CLK_DELAY_4TSSP_FEEDBACK_CLK_DELAY_5TSSP_FEEDBACK_CLK_DELAY_6TSSP_FEEDBACK_CLK_DELAY_7Tssp_readingREADING_NULLREADING_U8READING_U16READING_U32ssp_writingWRITING_NULLWRITING_U8WRITING_U16WRITING_U32ssp_rx_endianSSP_RX_MSBSSP_RX_LSBssp_tx_endianSSP_TX_MSBSSP_TX_LSBssp_spi_clk_polSSP_CLK_POL_IDLE_LOWSSP_CLK_POL_IDLE_HIGHssp_spi_clk_phaseSSP_CLK_FIRST_EDGESSP_CLK_SECOND_EDGEssp_loopbackLOOPBACK_DISABLEDLOOPBACK_ENABLEDssp_chip_selectSSP_CHIP_SELECTSSP_CHIP_DESELECTssp_data_sizeSSP_DATA_BITS_4SSP_DATA_BITS_5SSP_DATA_BITS_6SSP_DATA_BITS_7SSP_DATA_BITS_8SSP_DATA_BITS_9SSP_DATA_BITS_10SSP_DATA_BITS_11SSP_DATA_BITS_12SSP_DATA_BITS_13SSP_DATA_BITS_14SSP_DATA_BITS_15SSP_DATA_BITS_16SSP_DATA_BITS_17SSP_DATA_BITS_18SSP_DATA_BITS_19SSP_DATA_BITS_20SSP_DATA_BITS_21SSP_DATA_BITS_22SSP_DATA_BITS_23SSP_DATA_BITS_24SSP_DATA_BITS_25SSP_DATA_BITS_26SSP_DATA_BITS_27SSP_DATA_BITS_28SSP_DATA_BITS_29SSP_DATA_BITS_30SSP_DATA_BITS_31SSP_DATA_BITS_32pl022phybasevirtbasepump_transferscur_transfercur_chipnext_msg_cs_activetx_endrx_endexp_fifo_leveldma_rx_channeldma_tx_channelsgt_rxsgt_txdummypagedma_runningcur_cscur_gpiodpl022_ssp_controllercr0cr1n_bytesxfer_typeconfigure_dmadma_callbackgivebackload_ssp_default_configpl022_cleanuppl022_dma_autoprobepl022_dma_probepl022_dma_removepl022_interrupt_handlerpl022_probepl022_removepl022_resumepl022_runtime_resumepl022_runtime_suspendpl022_setuppl022_suspendpl022_transfer_one_messagepl022_unprepare_transfer_hardwarereadwritersgtabsetup_dma_scattertasklet_schedulev@`.0c^8@hgOh(J@Y) 5h8(0@(wH)%8( @pwH)q@w))@8y)28x8|s@y )P:@{)X:@0{)`:Y; @H{x)2<?U0{@x|)Lo03 D0D@ @h0)#@J:@Y$hY _+MpW9 ŝx