1 /*
2  * Copyright (C) 2016 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef ART_COMPILER_DEBUG_ELF_DEBUG_FRAME_WRITER_H_
18 #define ART_COMPILER_DEBUG_ELF_DEBUG_FRAME_WRITER_H_
19 
20 #include <vector>
21 
22 #include "arch/instruction_set.h"
23 #include "base/macros.h"
24 #include "debug/method_debug_info.h"
25 #include "dwarf/debug_frame_opcode_writer.h"
26 #include "dwarf/dwarf_constants.h"
27 #include "dwarf/headers.h"
28 #include "elf/elf_builder.h"
29 
30 namespace art HIDDEN {
31 namespace debug {
32 
33 static constexpr bool kWriteDebugFrameHdr = false;
34 
35 // Binary search table is not useful if the number of entries is small.
36 // In particular, this avoids it for the in-memory JIT mini-debug-info.
37 static constexpr size_t kMinDebugFrameHdrEntries = 100;
38 
WriteCIE(InstructionSet isa,std::vector<uint8_t> * buffer)39 static void WriteCIE(InstructionSet isa, /*inout*/ std::vector<uint8_t>* buffer) {
40   using Reg = dwarf::Reg;
41   // Scratch registers should be marked as undefined.  This tells the
42   // debugger that its value in the previous frame is not recoverable.
43   bool is64bit = Is64BitInstructionSet(isa);
44   switch (isa) {
45     case InstructionSet::kArm:
46     case InstructionSet::kThumb2: {
47       dwarf::DebugFrameOpCodeWriter<> opcodes;
48       opcodes.DefCFA(Reg::ArmCore(13), 0);  // R13(SP).
49       // core registers.
50       for (int reg = 0; reg < 13; reg++) {
51         if (reg < 4 || reg == 12) {
52           opcodes.Undefined(Reg::ArmCore(reg));
53         } else {
54           opcodes.SameValue(Reg::ArmCore(reg));
55         }
56       }
57       // fp registers.
58       for (int reg = 0; reg < 32; reg++) {
59         if (reg < 16) {
60           opcodes.Undefined(Reg::ArmFp(reg));
61         } else {
62           opcodes.SameValue(Reg::ArmFp(reg));
63         }
64       }
65       auto return_reg = Reg::ArmCore(14);  // R14(LR).
66       WriteCIE(is64bit, return_reg, opcodes, buffer);
67       return;
68     }
69     case InstructionSet::kArm64: {
70       dwarf::DebugFrameOpCodeWriter<> opcodes;
71       opcodes.DefCFA(Reg::Arm64Core(31), 0);  // R31(SP).
72       // core registers.
73       for (int reg = 0; reg < 30; reg++) {
74         if (reg < 8 || reg == 16 || reg == 17) {
75           opcodes.Undefined(Reg::Arm64Core(reg));
76         } else {
77           opcodes.SameValue(Reg::Arm64Core(reg));
78         }
79       }
80       // fp registers.
81       for (int reg = 0; reg < 32; reg++) {
82         if (reg < 8 || reg >= 16) {
83           opcodes.Undefined(Reg::Arm64Fp(reg));
84         } else {
85           opcodes.SameValue(Reg::Arm64Fp(reg));
86         }
87       }
88       auto return_reg = Reg::Arm64Core(30);  // R30(LR).
89       WriteCIE(is64bit, return_reg, opcodes, buffer);
90       return;
91     }
92     case InstructionSet::kRiscv64: {
93       dwarf::DebugFrameOpCodeWriter<> opcodes;
94       opcodes.DefCFA(Reg::Riscv64Core(2), 0);  // X2(SP).
95       // core registers.
96       for (int reg = 3; reg < 32; reg++) {  // Skip X0 (Zero), X1 (RA) and X2 (SP).
97         if ((reg >= 5 && reg < 8) || (reg >= 10 && reg < 18) || reg >= 28) {
98           opcodes.Undefined(Reg::Riscv64Core(reg));
99         } else {
100           opcodes.SameValue(Reg::Riscv64Core(reg));
101         }
102       }
103       // fp registers.
104       for (int reg = 0; reg < 32; reg++) {
105         if (reg < 8 || (reg >=10 && reg < 18) || reg >= 28) {
106           opcodes.Undefined(Reg::Riscv64Fp(reg));
107         } else {
108           opcodes.SameValue(Reg::Riscv64Fp(reg));
109         }
110       }
111       auto return_reg = Reg::Riscv64Core(1);  // X1(RA).
112       WriteCIE(is64bit, return_reg, opcodes, buffer);
113       return;
114     }
115     case InstructionSet::kX86: {
116       // FIXME: Add fp registers once libunwind adds support for them. Bug: 20491296
117       constexpr bool generate_opcodes_for_x86_fp = false;
118       dwarf::DebugFrameOpCodeWriter<> opcodes;
119       opcodes.DefCFA(Reg::X86Core(4), 4);   // R4(ESP).
120       opcodes.Offset(Reg::X86Core(8), -4);  // R8(EIP).
121       // core registers.
122       for (int reg = 0; reg < 8; reg++) {
123         if (reg <= 3) {
124           opcodes.Undefined(Reg::X86Core(reg));
125         } else if (reg == 4) {
126           // Stack pointer.
127         } else {
128           opcodes.SameValue(Reg::X86Core(reg));
129         }
130       }
131       // fp registers.
132       if (generate_opcodes_for_x86_fp) {
133         for (int reg = 0; reg < 8; reg++) {
134           opcodes.Undefined(Reg::X86Fp(reg));
135         }
136       }
137       auto return_reg = Reg::X86Core(8);  // R8(EIP).
138       WriteCIE(is64bit, return_reg, opcodes, buffer);
139       return;
140     }
141     case InstructionSet::kX86_64: {
142       dwarf::DebugFrameOpCodeWriter<> opcodes;
143       opcodes.DefCFA(Reg::X86_64Core(4), 8);  // R4(RSP).
144       opcodes.Offset(Reg::X86_64Core(16), -8);  // R16(RIP).
145       // core registers.
146       for (int reg = 0; reg < 16; reg++) {
147         if (reg == 4) {
148           // Stack pointer.
149         } else if (reg < 12 && reg != 3 && reg != 5) {  // except EBX and EBP.
150           opcodes.Undefined(Reg::X86_64Core(reg));
151         } else {
152           opcodes.SameValue(Reg::X86_64Core(reg));
153         }
154       }
155       // fp registers.
156       for (int reg = 0; reg < 16; reg++) {
157         if (reg < 12) {
158           opcodes.Undefined(Reg::X86_64Fp(reg));
159         } else {
160           opcodes.SameValue(Reg::X86_64Fp(reg));
161         }
162       }
163       auto return_reg = Reg::X86_64Core(16);  // R16(RIP).
164       WriteCIE(is64bit, return_reg, opcodes, buffer);
165       return;
166     }
167     case InstructionSet::kNone:
168       break;
169   }
170   LOG(FATAL) << "Cannot write CIE frame for ISA " << isa;
171   UNREACHABLE();
172 }
173 
174 template<typename ElfTypes>
WriteCFISection(ElfBuilder<ElfTypes> * builder,const ArrayRef<const MethodDebugInfo> & method_infos)175 void WriteCFISection(ElfBuilder<ElfTypes>* builder,
176                      const ArrayRef<const MethodDebugInfo>& method_infos) {
177   // The methods can be written in any order.
178   // Let's therefore sort them in the lexicographical order of the opcodes.
179   // This has no effect on its own. However, if the final .debug_frame section is
180   // compressed it reduces the size since similar opcodes sequences are grouped.
181   std::vector<const MethodDebugInfo*> sorted_method_infos;
182   sorted_method_infos.reserve(method_infos.size());
183   for (size_t i = 0; i < method_infos.size(); i++) {
184     if (!method_infos[i].cfi.empty() && !method_infos[i].deduped) {
185       sorted_method_infos.push_back(&method_infos[i]);
186     }
187   }
188   if (sorted_method_infos.empty()) {
189     return;
190   }
191   std::stable_sort(
192       sorted_method_infos.begin(),
193       sorted_method_infos.end(),
194       [](const MethodDebugInfo* lhs, const MethodDebugInfo* rhs) {
195         ArrayRef<const uint8_t> l = lhs->cfi;
196         ArrayRef<const uint8_t> r = rhs->cfi;
197         return std::lexicographical_compare(l.begin(), l.end(), r.begin(), r.end());
198       });
199 
200   std::vector<uint32_t> binary_search_table;
201   bool binary_search_table_is_valid = kWriteDebugFrameHdr;
202   if (binary_search_table_is_valid) {
203     binary_search_table.reserve(2 * sorted_method_infos.size());
204   }
205 
206   // Write .debug_frame section.
207   auto* cfi_section = builder->GetDebugFrame();
208   {
209     cfi_section->Start();
210     const bool is64bit = Is64BitInstructionSet(builder->GetIsa());
211     std::vector<uint8_t> buffer;  // Small temporary buffer.
212     WriteCIE(builder->GetIsa(), &buffer);
213     cfi_section->WriteFully(buffer.data(), buffer.size());
214     buffer.clear();
215     for (const MethodDebugInfo* mi : sorted_method_infos) {
216       DCHECK(!mi->deduped);
217       DCHECK(!mi->cfi.empty());
218       uint64_t code_address = mi->code_address +
219           (mi->is_code_address_text_relative ? builder->GetText()->GetAddress() : 0);
220       if (kWriteDebugFrameHdr) {
221         // Defensively check that the code address really fits.
222         DCHECK_LE(code_address, std::numeric_limits<uint32_t>::max());
223         binary_search_table_is_valid &= code_address <= std::numeric_limits<uint32_t>::max();
224         binary_search_table.push_back(static_cast<uint32_t>(code_address));
225         binary_search_table.push_back(cfi_section->GetPosition());
226       }
227       dwarf::WriteFDE(is64bit,
228                       /* cie_pointer= */ 0,
229                       code_address,
230                       mi->code_size,
231                       mi->cfi,
232                       &buffer);
233       cfi_section->WriteFully(buffer.data(), buffer.size());
234       buffer.clear();
235     }
236     cfi_section->End();
237   }
238 
239   if (binary_search_table_is_valid && method_infos.size() >= kMinDebugFrameHdrEntries) {
240     std::sort(binary_search_table.begin(), binary_search_table.end());
241 
242     // Custom Android section. It is very similar to the official .eh_frame_hdr format.
243     std::vector<uint8_t> header_buffer;
244     dwarf::Writer<> header(&header_buffer);
245     header.PushUint8(1);  // Version.
246     header.PushUint8(dwarf::DW_EH_PE_omit);    // Encoding of .eh_frame pointer - none.
247     header.PushUint8(dwarf::DW_EH_PE_udata4);  // Encoding of binary search table size.
248     header.PushUint8(dwarf::DW_EH_PE_udata4);  // Encoding of binary search table data.
249     header.PushUint32(dchecked_integral_cast<uint32_t>(binary_search_table.size()/2));
250 
251     auto* header_section = builder->GetDebugFrameHdr();
252     header_section->Start();
253     header_section->WriteFully(header_buffer.data(), header_buffer.size());
254     header_section->WriteFully(binary_search_table.data(),
255                                binary_search_table.size() * sizeof(binary_search_table[0]));
256     header_section->End();
257   }
258 }
259 
260 }  // namespace debug
261 }  // namespace art
262 
263 #endif  // ART_COMPILER_DEBUG_ELF_DEBUG_FRAME_WRITER_H_
264 
265