1 /*
2 * Copyright (C) 2015 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #ifndef ART_COMPILER_OPTIMIZING_INSTRUCTION_SIMPLIFIER_SHARED_H_
18 #define ART_COMPILER_OPTIMIZING_INSTRUCTION_SIMPLIFIER_SHARED_H_
19
20 #include "base/macros.h"
21 #include "nodes.h"
22
23 namespace art HIDDEN {
24
25 class CodeGenerator;
26
27 namespace helpers {
28
CanFitInShifterOperand(HInstruction * instruction)29 inline bool CanFitInShifterOperand(HInstruction* instruction) {
30 if (instruction->IsTypeConversion()) {
31 HTypeConversion* conversion = instruction->AsTypeConversion();
32 DataType::Type result_type = conversion->GetResultType();
33 DataType::Type input_type = conversion->GetInputType();
34 // We don't expect to see the same type as input and result.
35 return DataType::IsIntegralType(result_type) && DataType::IsIntegralType(input_type) &&
36 (result_type != input_type);
37 } else {
38 return (instruction->IsShl() && instruction->AsShl()->InputAt(1)->IsIntConstant()) ||
39 (instruction->IsShr() && instruction->AsShr()->InputAt(1)->IsIntConstant()) ||
40 (instruction->IsUShr() && instruction->AsUShr()->InputAt(1)->IsIntConstant());
41 }
42 }
43
HasShifterOperand(HInstruction * instr,InstructionSet isa)44 inline bool HasShifterOperand(HInstruction* instr, InstructionSet isa) {
45 // On ARM64 `neg` instructions are an alias of `sub` using the zero register
46 // as the first register input.
47 bool res = instr->IsAdd() || instr->IsAnd() ||
48 (isa == InstructionSet::kArm64 && instr->IsNeg()) ||
49 instr->IsOr() || instr->IsSub() || instr->IsXor();
50 return res;
51 }
52
53 // Check the specified sub is the last operation of the sequence:
54 // t1 = Shl
55 // t2 = Sub(t1, *)
56 // t3 = Sub(*, t2)
IsSubRightSubLeftShl(HSub * sub)57 inline bool IsSubRightSubLeftShl(HSub *sub) {
58 HInstruction* right = sub->GetRight();
59 return right->IsSub() && right->AsSub()->GetLeft()->IsShl();
60 }
61
62 } // namespace helpers
63
64 bool TryCombineMultiplyAccumulate(HMul* mul, InstructionSet isa);
65
66 bool TryExtractArrayAccessAddress(CodeGenerator* codegen,
67 HInstruction* access,
68 HInstruction* array,
69 HInstruction* index,
70 size_t data_offset);
71
72 bool TryExtractVecArrayAccessAddress(HVecMemoryOperation* access, HInstruction* index);
73
74 // Try to replace
75 // Sub(c, Sub(a, b))
76 // with
77 // Add(c, Sub(b, a))
78 bool TryReplaceSubSubWithSubAdd(HSub* last_sub);
79
80 } // namespace art
81
82 #endif // ART_COMPILER_OPTIMIZING_INSTRUCTION_SIMPLIFIER_SHARED_H_
83