| /art/compiler/utils/riscv64/ |
| D | jni_macro_assembler_riscv64_test.cc | 93 ManagedRegister method_reg = AsManaged(A0); in TEST_F()
203 __ Store(FrameOffset(0), AsManaged(A0), kWordSize); in TEST_F()
243 __ Load(AsManaged(A0), FrameOffset(0), kWordSize); in TEST_F()
269 __ LoadGcRootWithoutReadBarrier(AsManaged(T0), AsManaged(A0), MemberOffset(0)); in TEST_F()
287 __ CreateJObject(AsManaged(A0), FrameOffset(8), AsManaged(A0), /*null_allowed=*/ true); in TEST_F()
330 ArgumentLocation(Riscv64ManagedRegister::FromXRegister(A0), kNativePointerSize), // `jclass` in TEST_F()
473 ArgumentLocation(Riscv64ManagedRegister::FromXRegister(A0), kNativePointerSize), // `jclass` in TEST_F()
540 ArgumentLocation(Riscv64ManagedRegister::FromXRegister(A0), kXlenInBytes), in TEST_F()
605 ArgumentLocation(Riscv64ManagedRegister::FromXRegister(A0), kXlenInBytes), in TEST_F()
662 __ Move(AsManaged(A0), AsManaged(A1), kWordSize); in TEST_F()
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| D | managed_register_riscv64_test.cc | 73 reg = Riscv64ManagedRegister::FromXRegister(A0); in TEST()
77 EXPECT_EQ(A0, reg.AsXRegister()); in TEST()
169 EXPECT_FALSE(reg_A1.Equals(Riscv64ManagedRegister::FromXRegister(A0))); in TEST()
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| D | jni_macro_assembler_riscv64.cc | 93 DCHECK_EQ(A0, method_reg.AsRiscv64().AsXRegister()); in BuildFrame()
94 __ Stored(A0, SP, 0); in BuildFrame()
549 __ Loadd(A0, TR, Thread::ExceptionOffset<kRiscv64PointerSize>().Int32Value()); in DeliverPendingException()
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| D | assembler_riscv64_test.cc | 174 secondary_register_names_.emplace(A0, "a0"); in SetUpHelpers()
220 A0, in GetRegisters()
250 A0, in GetRegistersShort()
358 emit_load_const(A0, value); in TestLoadConst64()
407 emit_load_const(A0, value); in TestLoadConst64()
457 emit_load_const(A0, value); in TestLoadConst64()
460 ReplaceReg(REG1_TOKEN, GetRegisterName(A0), &base); in TestLoadConst64()
531 XRegister rs = A0; in EmitBcondForAllConditions()
628 (GetAssembler()->*f)(A0, reg, &label, is_bare); in TestBcondA0RegForward()
651 (GetAssembler()->*f)(A0, reg, &label, is_bare); in TestBcondA0RegBackward()
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| /art/compiler/jni/quick/riscv64/ |
| D | calling_convention_riscv64.cc | 29 Riscv64ManagedRegister::FromXRegister(A0),
145 return Riscv64ManagedRegister::FromXRegister(A0); in ReturnRegisterForShorty()
156 return Riscv64ManagedRegister::FromXRegister(A0); in MethodRegister()
215 return Riscv64ManagedRegister::FromXRegister(A0); in IntReturnRegister()
299 static_assert(kXArgumentRegisters[0].Equals(Riscv64ManagedRegister::FromXRegister(A0))); in ArgumentScratchRegisters()
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| /art/runtime/arch/riscv64/ |
| D | context_riscv64.cc | 38 gprs_[A0] = &arg0_; in Reset()
91 gprs_[A0] = const_cast<uint64_t*>(&gZero); // must be 0 because we want a null/zero return value in SmashCallerSaves()
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| D | registers_riscv64.h | 41 A0 = 10, // X10, argument 0 / return value 0 enumerator
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| D | context_riscv64.h | 47 void SetArg0(uintptr_t new_arg0_value) override { SetGPR(A0, new_arg0_value); } in SetArg0()
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| D | callee_save_frame_riscv64.h | 53 (1 << art::riscv64::T6) | (1 << art::riscv64::A0) | (1 << art::riscv64::A1) |
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| /art/compiler/optimizing/ |
| D | code_generator_riscv64.h | 41 static constexpr XRegister kRuntimeParameterCoreRegisters[] = {A0, A1, A2, A3, A4, A5, A6, A7};
98 static const XRegister kArtMethodRegister = A0;
217 return Location::RegisterLocation(A0); in GetFieldIndexLocation()
220 return Location::RegisterLocation(A0); in GetReturnLocation()
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| D | code_generator_riscv64.cc | 116 return Location::RegisterLocation(A0); in Riscv64ReturnLocation()
4984 FMvX(A0, FA0, type); in VisitReturn()
5042 codegen_->CreateStringBuilderAppendLocations(instruction, Location::RegisterLocation(A0)); in VisitStringBuilderAppend()
5046 __ LoadConst32(A0, instruction->GetFormat()->GetValue()); in VisitStringBuilderAppend()
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| /art/compiler/trampolines/ |
| D | trampoline_compiler.cc | 137 __ Loadd(tmp, A0, JNIEnvExt::SelfOffset(kRiscv64PointerSize).Int32Value()); in CreateTrampoline()
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