| /art/compiler/utils/riscv64/ |
| D | jni_macro_assembler_riscv64.cc | 474 __ LrW(scratch, TR, AqRl::kNone); in TryToTransitionFromRunnableToNative()
482 __ ScW(scratch, scratch2, TR, AqRl::kRelease); in TryToTransitionFromRunnableToNative()
511 __ LrW(scratch, TR, AqRl::kAcquire); in TryToTransitionFromNativeToRunnable()
521 __ ScW(scratch, Zero, TR, AqRl::kNone); in TryToTransitionFromNativeToRunnable()
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| D | assembler_riscv64.h | 97 enum class AqRl : uint32_t { enum
353 void LrW(XRegister rd, XRegister rs1, AqRl aqrl);
354 void LrD(XRegister rd, XRegister rs1, AqRl aqrl);
355 void ScW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl);
356 void ScD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl);
357 void AmoSwapW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl);
358 void AmoSwapD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl);
359 void AmoAddW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl);
360 void AmoAddD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl);
361 void AmoXorW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl);
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| D | assembler_riscv64_test.cc | 1336 std::string RepeatRRAqRl(void (Riscv64Assembler::*f)(XRegister, XRegister, AqRl), in RepeatRRAqRl() argument
1343 for (AqRl aqrl : kAqRls) { in RepeatRRAqRl()
1362 std::string RepeatRRRAqRl(void (Riscv64Assembler::*f)(XRegister, XRegister, XRegister, AqRl), in RepeatRRRAqRl() argument
1377 for (AqRl aqrl : kAqRls) { in RepeatRRRAqRl()
1394 std::string RepeatRRRAqRl(void (Riscv64Assembler::*f)(XRegister, XRegister, XRegister, AqRl), in RepeatRRRAqRl() argument
1396 return RepeatRRRAqRl(f, fmt, [](AqRl) { return false; }); in RepeatRRRAqRl() argument
2076 static constexpr AqRl kAqRls[] = { AqRl::kNone, AqRl::kRelease, AqRl::kAcquire, AqRl::kAqRl };
2142 void ReplaceAqRl(AqRl aqrl, /*inout*/ std::string* str) { in ReplaceAqRl()
2145 case AqRl::kNone: in ReplaceAqRl()
2148 case AqRl::kRelease: in ReplaceAqRl()
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| D | assembler_riscv64.cc | 732 void Riscv64Assembler::LrW(XRegister rd, XRegister rs1, AqRl aqrl) { in LrW()
734 CHECK(aqrl != AqRl::kRelease); in LrW()
738 void Riscv64Assembler::LrD(XRegister rd, XRegister rs1, AqRl aqrl) { in LrD()
740 CHECK(aqrl != AqRl::kRelease); in LrD()
744 void Riscv64Assembler::ScW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in ScW()
746 CHECK(aqrl != AqRl::kAcquire); in ScW()
750 void Riscv64Assembler::ScD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in ScD()
752 CHECK(aqrl != AqRl::kAcquire); in ScD()
756 void Riscv64Assembler::AmoSwapW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoSwapW()
761 void Riscv64Assembler::AmoSwapD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoSwapD()
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| /art/compiler/optimizing/ |
| D | intrinsics_riscv64.cc | 1043 std::pair<AqRl, AqRl> GetLrScAqRl(std::memory_order order) { in GetLrScAqRl()
1044 AqRl load_aqrl = AqRl::kNone; in GetLrScAqRl()
1045 AqRl store_aqrl = AqRl::kNone; in GetLrScAqRl()
1047 load_aqrl = AqRl::kAcquire; in GetLrScAqRl()
1049 store_aqrl = AqRl::kRelease; in GetLrScAqRl()
1051 load_aqrl = AqRl::kAqRl; in GetLrScAqRl()
1052 store_aqrl = AqRl::kRelease; in GetLrScAqRl()
1059 AqRl GetAmoAqRl(std::memory_order order) { in GetAmoAqRl()
1060 AqRl amo_aqrl = AqRl::kNone; in GetAmoAqRl()
1062 amo_aqrl = AqRl::kAcquire; in GetAmoAqRl()
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| D | code_generator_riscv64.cc | 1003 __ AmoSwapD(Zero, swap_src, addr, AqRl::kRelease); in StoreSeqCst()
1005 __ AmoSwapW(Zero, swap_src, addr, AqRl::kRelease); in StoreSeqCst()
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