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Searched refs:AsArm (Results 1 – 6 of 6) sorted by relevance

/art/compiler/utils/arm/
Djni_macro_assembler_arm_vixl.cc97 if (reg.AsArm().IsCoreRegister()) { in BuildFrame()
98 core_spill_mask |= 1 << reg.AsArm().AsCoreRegister(); in BuildFrame()
100 fp_spill_mask |= 1 << reg.AsArm().AsSRegister(); in BuildFrame()
137 CHECK(r0.Is(AsVIXLRegister(method_reg.AsArm()))); in BuildFrame()
151 if (reg.AsArm().IsCoreRegister()) { in RemoveFrame()
152 core_spill_mask |= 1u << reg.AsArm().AsCoreRegister(); in RemoveFrame()
154 fp_spill_mask |= 1u << reg.AsArm().AsSRegister(); in RemoveFrame()
264 DCHECK(src.AsArm().IsCoreRegister()); in CoreRegisterWithSize()
277 ArmManagedRegister base = m_base.AsArm(); in Store()
278 ArmManagedRegister src = m_src.AsArm(); in Store()
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Djni_macro_assembler_arm_vixl.h178 vixl32::Label* AsArm() { in AsArm() function
Dmanaged_register_arm.h268 constexpr arm::ArmManagedRegister ManagedRegister::AsArm() const { in AsArm() function
Dmanaged_register_arm_test.cc26 ArmManagedRegister reg = ManagedRegister::NoRegister().AsArm(); in TEST()
/art/compiler/jni/quick/arm/
Dcalling_convention_arm.cc107 if (r.AsArm().IsCoreRegister()) { in CalculateCoreCalleeSpillMask()
108 result |= (1u << r.AsArm().AsCoreRegister()); in CalculateCoreCalleeSpillMask()
118 if (r.AsArm().IsSRegister()) { in CalculateFpCalleeSpillMask()
119 result |= (1u << r.AsArm().AsSRegister()); in CalculateFpCalleeSpillMask()
420 [return_reg = ReturnRegister().AsArm()](ManagedRegister reg) { in ArgumentScratchRegisters()
421 return return_reg.Overlaps(reg.AsArm()); in ArgumentScratchRegisters()
/art/compiler/utils/
Dmanaged_register.h56 constexpr arm::ArmManagedRegister AsArm() const;