Searched refs:FA6 (Results 1 – 7 of 7) sorted by relevance
| /art/runtime/arch/riscv64/ |
| D | registers_riscv64.h | 96 FA6 = 16, // F16, argument 6 enumerator
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| D | callee_save_frame_riscv64.h | 63 (1 << art::riscv64::FA6) | (1 << art::riscv64::FA7);
82 (1 << art::riscv64::FA6) | (1 << art::riscv64::FA7);
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| D | context_riscv64.cc | 119 fprs_[FA6] = nullptr; in SmashCallerSaves()
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| /art/compiler/utils/riscv64/ |
| D | jni_macro_assembler_riscv64_test.cc | 460 ArgumentLocation(Riscv64ManagedRegister::FromFRegister(FA6), kFloatSize), in TEST_F()
480 ArgumentLocation(Riscv64ManagedRegister::FromFRegister(FA6), kVRegSize), in TEST_F()
538 ArgumentLocation(Riscv64ManagedRegister::FromFRegister(FA6), kXlenInBytes), in TEST_F()
558 ArgumentLocation(Riscv64ManagedRegister::FromFRegister(FA6), 2 * kVRegSize), in TEST_F()
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| D | assembler_riscv64_test.cc | 278 FA6, in GetFPRegisters()
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| /art/compiler/jni/quick/riscv64/ |
| D | calling_convention_riscv64.cc | 41 FA0, FA1, FA2, FA3, FA4, FA5, FA6, FA7
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| /art/compiler/optimizing/ |
| D | code_generator_riscv64.h | 37 static constexpr FRegister kParameterFpuRegisters[] = {FA0, FA1, FA2, FA3, FA4, FA5, FA6, FA7};
46 FA0, FA1, FA2, FA3, FA4, FA5, FA6, FA7
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