Searched refs:imm20 (Results 1 – 5 of 5) sorted by relevance
| /art/dex2oat/linker/riscv64/ |
| D | relative_patcher_riscv64.cc | 122 uint32_t imm20 = static_cast<uint32_t>(near_offset) >> 12; in PatchAuipc() local
124 (imm20 << 12); // Encode the immediate. in PatchAuipc()
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| D | relative_patcher_riscv64_test.cc | 89 uint32_t imm20 = (offset >> 12) + ((offset >> 11) & 1u); in GenNopsAndAuipcAndUse() local
95 (imm20 << 12); in GenNopsAndAuipcAndUse()
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| /art/compiler/utils/riscv64/ |
| D | assembler_riscv64.h | 258 void Lui(XRegister rd, uint32_t imm20);
259 void Auipc(XRegister rd, uint32_t imm20);
2463 void EmitU(uint32_t imm20, XRegister rd, uint32_t opcode) { in EmitU() argument
2464 CHECK(IsUint<20>(imm20)) << imm20; in EmitU()
2467 uint32_t encoding = imm20 << 12 | static_cast<uint32_t>(rd) << 7 | opcode; in EmitU()
2483 uint32_t imm20 = (static_cast<uint32_t>(offset) >> 1) & 0xfffffu; in EmitJ() local
2484 uint32_t encoding = (imm20 & 0x80000u) << (31 - 19) | (imm20 & 0x03ffu) << 21 | in EmitJ()
2485 (imm20 & 0x400u) << (20 - 10) | (imm20 & 0x7f800u) << (12 - 11) | in EmitJ()
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| D | assembler_riscv64.cc | 42 uint32_t imm20 = static_cast<uint32_t>(near_offset) >> 12; in SplitOffset() local
44 return std::make_pair(imm20, short_offset); in SplitOffset()
70 void Riscv64Assembler::Lui(XRegister rd, uint32_t imm20) { in Lui() argument
72 int32_t simm = static_cast<int32_t>(imm20); in Lui()
73 if (rd != Zero && rd != SP && IsImmCLuiEncodable(imm20)) { in Lui()
74 CLui(rd, imm20); in Lui()
79 EmitU(imm20, rd, 0x37); in Lui()
82 void Riscv64Assembler::Auipc(XRegister rd, uint32_t imm20) { in Auipc() argument
83 EmitU(imm20, rd, 0x17); in Auipc()
7083 auto [imm20, short_offset] = SplitOffset(offset); in EmitBranch()
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| D | assembler_riscv64_test.cc | 932 uint32_t imm20 = ((imm >> 12) + ((imm >> 11) & 1)) & 0xfffff; in RepeatLoadStoreArbitraryOffset() local
934 expected += ART_FORMAT("lui {}, {}\n", tmp_name, std::to_string(imm20)); in RepeatLoadStoreArbitraryOffset()
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