| /art/compiler/utils/x86_64/ |
| D | jni_macro_assembler_x86_64.cc | 427 X86_64ManagedRegister in_reg = min_reg.AsX86_64(); in CreateJObject() local
428 if (in_reg.IsNoRegister()) { // TODO(64): && null_allowed in CreateJObject()
430 in_reg = out_reg; in CreateJObject()
432 __ movl(in_reg.AsCpuRegister(), Address(CpuRegister(RSP), spilled_reference_offset)); in CreateJObject()
434 CHECK(in_reg.IsCpuRegister()); in CreateJObject()
436 VerifyObject(in_reg, null_allowed); in CreateJObject()
439 if (!out_reg.Equals(in_reg)) { in CreateJObject()
442 __ testl(in_reg.AsCpuRegister(), in_reg.AsCpuRegister()); in CreateJObject()
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| D | jni_macro_assembler_x86_64.h | 153 ManagedRegister in_reg,
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| /art/compiler/utils/x86/ |
| D | jni_macro_assembler_x86.cc | 360 X86ManagedRegister in_reg = min_reg.AsX86(); in CreateJObject() local
361 CHECK(in_reg.IsCpuRegister()); in CreateJObject()
363 VerifyObject(in_reg, null_allowed); in CreateJObject()
366 if (!out_reg.Equals(in_reg)) { in CreateJObject()
369 __ testl(in_reg.AsCpuRegister(), in_reg.AsCpuRegister()); in CreateJObject()
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| D | jni_macro_assembler_x86.h | 152 ManagedRegister in_reg,
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| /art/compiler/utils/arm/ |
| D | jni_macro_assembler_arm_vixl.cc | 800 vixl::aarch32::Register in_reg = in CreateJObject() local
808 if (!in_reg.IsValid()) { in CreateJObject()
810 in_reg = out_reg; in CreateJObject()
815 if (out_reg.Is(in_reg)) { in CreateJObject()
816 ___ Cmp(in_reg, 0); in CreateJObject()
818 ___ Movs(out_reg, in_reg); in CreateJObject()
825 vixl32::Register addr_reg = out_reg.Is(in_reg) ? temps.Acquire() : out_reg; in CreateJObject()
826 vixl32::Register cond_mov_src_reg = out_reg.Is(in_reg) ? addr_reg : in_reg; in CreateJObject()
827 vixl32::Condition cond = out_reg.Is(in_reg) ? ne : eq; in CreateJObject()
829 ___ Cmp(in_reg, 0); in CreateJObject()
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| D | jni_macro_assembler_arm_vixl.h | 164 ManagedRegister in_reg,
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| /art/compiler/jni/quick/ |
| D | jni_compiler.cc | 57 ManagedRegister in_reg);
734 ManagedRegister in_reg) { in SetNativeParameter() argument
737 __ StoreRawPtr(dest, in_reg); in SetNativeParameter()
739 if (!jni_conv->CurrentParamRegister().Equals(in_reg)) { in SetNativeParameter()
740 __ Move(jni_conv->CurrentParamRegister(), in_reg, jni_conv->CurrentParamSize()); in SetNativeParameter()
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| /art/compiler/utils/arm64/ |
| D | jni_macro_assembler_arm64.cc | 654 Arm64ManagedRegister in_reg = m_in_reg.AsArm64(); in CreateJObject() local
655 CHECK(in_reg.IsNoRegister() || in_reg.IsWRegister()) << in_reg; in CreateJObject()
664 if (in_reg.IsNoRegister()) { in CreateJObject()
665 in_reg = Arm64ManagedRegister::FromWRegister(out_reg.AsOverlappingWRegister()); in CreateJObject()
666 LoadWFromOffset(kLoadWord, in_reg.AsWRegister(), SP, spilled_reference_offset.Int32Value()); in CreateJObject()
669 ___ Cmp(reg_w(in_reg.AsWRegister()), 0); in CreateJObject()
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| D | jni_macro_assembler_arm64.h | 185 ManagedRegister in_reg,
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| /art/tools/dexanalyze/ |
| D | dexanalyze_bytecode.cc | 439 uint32_t in_reg = inst->VRegB_22c(); in ProcessCodeItem() local
445 ExtendPrefix(&in_reg, &local_type); in ProcessCodeItem()
446 CHECK(InstNibbles(new_opcode, {in_reg, out_reg, local_type})); in ProcessCodeItem()
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| /art/compiler/optimizing/ |
| D | code_generator_arm64.cc | 6295 Register in_reg = InputRegisterAt(abs, 0); in VisitAbs() local
6297 __ Cmp(in_reg, Operand(0)); in VisitAbs()
6298 __ Cneg(out_reg, in_reg, lt); in VisitAbs()
6303 VRegister in_reg = InputFPRegisterAt(abs, 0); in VisitAbs() local
6305 __ Fabs(out_reg, in_reg); in VisitAbs()
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| D | intrinsics_arm_vixl.cc | 380 vixl32::SRegister in_reg = InputSRegisterAt(invoke, 0); in VisitMathRoundFloat() local
388 __ Vcvta(S32, F32, temp1, in_reg); in VisitMathRoundFloat()
398 __ Vrinta(F32, temp1, in_reg); in VisitMathRoundFloat()
400 __ Vsub(F32, temp1, in_reg, temp1); in VisitMathRoundFloat()
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| D | intrinsics_arm64.cc | 565 VRegister in_reg = is_double ? DRegisterFrom(l->InAt(0)) : SRegisterFrom(l->InAt(0)); in GenMathRound() local
571 __ Fcvtas(out_reg, in_reg); in GenMathRound()
579 __ Frinta(tmp_fp, in_reg); in GenMathRound()
580 __ Fsub(tmp_fp, in_reg, tmp_fp); in GenMathRound()
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| D | code_generator_arm_vixl.cc | 5202 vixl32::Register in_reg = RegisterFrom(locations->InAt(0)); in VisitAbs() local
5205 __ Asr(mask, in_reg, 31); in VisitAbs()
5206 __ Add(out_reg, in_reg, mask); in VisitAbs()
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