| /art/compiler/optimizing/ |
| D | nodes_x86.h | 176 DCHECK(op == HInstruction::kAnd || op == HInstruction::kXor) << op; in HUnaryOperation()
183 case HInstruction::kAnd:
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| D | instruction_simplifier_x86_shared.cc | 82 type, HInstruction::kAnd, other, instruction->GetDexPc()); in TryGenerateResetLeastSetBit()
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| D | loop_analysis.cc | 200 case HInstruction::InstructionKind::kAnd: in GetMachineInstructionCount()
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| D | intrinsics_riscv64.cc | 1927 kAnd, enumerator
2010 case GetAndUpdateOp::kAnd: in GenerateGetAndUpdate()
4210 bool is_small_and = is_small && (get_and_update_op == GetAndUpdateOp::kAnd); in CreateVarHandleGetAndUpdateLocations()
4284 bool is_small_and = is_small && (get_and_update_op == GetAndUpdateOp::kAnd); in GenerateVarHandleGetAndUpdate()
4348 case GetAndUpdateOp::kAnd: in GenerateVarHandleGetAndUpdate()
4560 CreateVarHandleGetAndUpdateLocations(invoke, codegen_, GetAndUpdateOp::kAnd); in VisitVarHandleGetAndBitwiseAnd()
4564 GenerateVarHandleGetAndUpdate(invoke, codegen_, GetAndUpdateOp::kAnd, std::memory_order_seq_cst); in VisitVarHandleGetAndBitwiseAnd()
4568 CreateVarHandleGetAndUpdateLocations(invoke, codegen_, GetAndUpdateOp::kAnd); in VisitVarHandleGetAndBitwiseAndAcquire()
4572 GenerateVarHandleGetAndUpdate(invoke, codegen_, GetAndUpdateOp::kAnd, std::memory_order_acquire); in VisitVarHandleGetAndBitwiseAndAcquire()
4576 CreateVarHandleGetAndUpdateLocations(invoke, codegen_, GetAndUpdateOp::kAnd); in VisitVarHandleGetAndBitwiseAndRelease()
[all …]
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| D | intrinsics_arm_vixl.cc | 3721 kAnd, enumerator
3767 case GetAndUpdateOp::kAnd: in GenerateGetAndUpdate()
3828 case GetAndUpdateOp::kAnd: in GenerateGetAndUpdate()
5457 CreateVarHandleGetAndUpdateLocations(invoke, codegen_, GetAndUpdateOp::kAnd); in VisitVarHandleGetAndBitwiseAnd()
5461 GenerateVarHandleGetAndUpdate(invoke, codegen_, GetAndUpdateOp::kAnd, std::memory_order_seq_cst); in VisitVarHandleGetAndBitwiseAnd()
5465 CreateVarHandleGetAndUpdateLocations(invoke, codegen_, GetAndUpdateOp::kAnd); in VisitVarHandleGetAndBitwiseAndAcquire()
5469 GenerateVarHandleGetAndUpdate(invoke, codegen_, GetAndUpdateOp::kAnd, std::memory_order_acquire); in VisitVarHandleGetAndBitwiseAndAcquire()
5473 CreateVarHandleGetAndUpdateLocations(invoke, codegen_, GetAndUpdateOp::kAnd); in VisitVarHandleGetAndBitwiseAndRelease()
5477 GenerateVarHandleGetAndUpdate(invoke, codegen_, GetAndUpdateOp::kAnd, std::memory_order_release); in VisitVarHandleGetAndBitwiseAndRelease()
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| D | intrinsics_arm64.cc | 1611 kAnd, enumerator
1643 case GetAndUpdateOp::kAnd: in GenerateGetAndUpdate()
1683 case GetAndUpdateOp::kAnd: in GenerateGetAndUpdate()
5602 CreateVarHandleGetAndUpdateLocations(invoke, codegen_, GetAndUpdateOp::kAnd); in VisitVarHandleGetAndBitwiseAnd()
5606 GenerateVarHandleGetAndUpdate(invoke, codegen_, GetAndUpdateOp::kAnd, std::memory_order_seq_cst); in VisitVarHandleGetAndBitwiseAnd()
5610 CreateVarHandleGetAndUpdateLocations(invoke, codegen_, GetAndUpdateOp::kAnd); in VisitVarHandleGetAndBitwiseAndAcquire()
5614 GenerateVarHandleGetAndUpdate(invoke, codegen_, GetAndUpdateOp::kAnd, std::memory_order_acquire); in VisitVarHandleGetAndBitwiseAndAcquire()
5618 CreateVarHandleGetAndUpdateLocations(invoke, codegen_, GetAndUpdateOp::kAnd); in VisitVarHandleGetAndBitwiseAndRelease()
5622 GenerateVarHandleGetAndUpdate(invoke, codegen_, GetAndUpdateOp::kAnd, std::memory_order_release); in VisitVarHandleGetAndBitwiseAndRelease()
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| D | nodes.h | 5864 : HBinaryOperation(kAnd, result_type, left, right, SideEffects::None(), dex_pc) {
8402 DCHECK(op == HInstruction::kAnd || op == HInstruction::kOr || op == HInstruction::kXor) << op;
8411 case HInstruction::kAnd:
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| D | code_generator_arm64.cc | 2518 case HInstruction::kAnd: in VisitBitwiseNegatedRight()
2578 kind != HInstruction::kAnd && kind != HInstruction::kOr && in VisitDataProcWithShifterOp()
2584 case HInstruction::kAnd: in VisitDataProcWithShifterOp()
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| D | code_generator_arm_vixl.cc | 1128 const Operand in = kind == HInstruction::kAnd in GenerateDataProcInstruction()
1138 case HInstruction::kAnd: in GenerateDataProcInstruction()
8772 case HInstruction::kAnd: in VisitBitwiseNegatedRight()
8796 case HInstruction::kAnd: in VisitBitwiseNegatedRight()
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| D | loop_optimization.cc | 2436 case HInstruction::kAnd: in GenerateVecOp()
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| D | instruction_simplifier.cc | 3468 HInstruction::InstructionKind::kAnd, in TryMergeWithAnd()
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| D | code_generator_riscv64.cc | 5460 case HInstruction::kAnd: in VisitBitwiseNegatedRight()
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| D | code_generator_x86_64.cc | 7715 case HInstruction::kAnd: in VisitX86MaskOrResetLeastSetBit()
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| D | code_generator_x86.cc | 8377 case HInstruction::kAnd: in VisitX86MaskOrResetLeastSetBit()
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| /art/libdexfile/dex/ |
| D | dex_instruction_list.h | 171 …V(0x95, AND_INT, "and-int", k23x, kIndexNone, kContinue, kAnd, kVerifyRegA | kVerifyRegB | kVerify…
182 …V(0xA0, AND_LONG, "and-long", k23x, kIndexNone, kContinue, kAnd, kVerifyRegAWide | kVerifyRegBWide…
203 …V(0xB5, AND_INT_2ADDR, "and-int/2addr", k12x, kIndexNone, kContinue, kAnd, kVerifyRegA | kVerifyRe…
214 …V(0xC0, AND_LONG_2ADDR, "and-long/2addr", k12x, kIndexNone, kContinue, kAnd, kVerifyRegAWide | kVe…
235 …V(0xD5, AND_INT_LIT16, "and-int/lit16", k22s, kIndexNone, kContinue, kAnd | kRegCFieldOrConstant, …
243 …V(0xDD, AND_INT_LIT8, "and-int/lit8", k22b, kIndexNone, kContinue, kAnd | kRegCFieldOrConstant, kV…
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| D | dex_instruction.h | 162 kAnd = 0x0001000, // and enumerator
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