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Searched refs:low (Results 1 – 25 of 45) sorted by relevance

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/art/compiler/utils/arm/
Dmanaged_register_arm.cc29 Register low = AsRegisterPairLow(); in Overlaps() local
31 return ArmManagedRegister::FromCoreRegister(low).Overlaps(other) || in Overlaps()
37 SRegister low = AsOverlappingDRegisterLow(); in Overlaps() local
40 return (low == other_sreg) || (high == other_sreg); in Overlaps()
54 int low; in AllocIdLow() local
57 low = (r * 2) + kNumberOfCoreRegIds; // Return a SRegister. in AllocIdLow()
60 low = (r - kNumberOfDRegIds) * 2; // Return a Register. in AllocIdLow()
61 if (low > 6) { in AllocIdLow()
63 low = 1; in AllocIdLow()
66 return low; in AllocIdLow()
/art/compiler/utils/x86/
Dmanaged_register_x86.cc42 Register low; member
48 #define REGISTER_PAIR_ENUMERATION(low, high) { low##_##high, low, high }, argument
68 Register low = AsRegisterPairLow(); in Overlaps() local
70 return X86ManagedRegister::FromCpuRegister(low).Overlaps(other) || in Overlaps()
85 return kRegisterPairs[r].low; in AllocIdLow()
/art/compiler/utils/x86_64/
Dmanaged_register_x86_64.cc41 Register low; member
47 #define REGISTER_PAIR_ENUMERATION(low, high) { low##_##high, low, high }, argument
63 Register low = AsRegisterPairLow().AsRegister(); in Overlaps() local
65 return X86_64ManagedRegister::FromCpuRegister(low).Overlaps(other) || in Overlaps()
80 return kRegisterPairs[r].low; in AllocIdLow()
/art/tools/ahat/src/main/com/android/ahat/
DHtmlEscaper.java27 int low = 0; in escape() local
34 sb.append(text.substring(low, i)); in escape()
36 low = i + 1; in escape()
43 sb.append(text.substring(low)); in escape()
/art/compiler/utils/arm64/
Dmanaged_register_arm64.cc67 int low = RegNo(); in RegIdLow() local
69 low += kNumberOfXRegIds; in RegIdLow()
71 low += kNumberOfXRegIds + kNumberOfWRegIds + kNumberOfDRegIds; in RegIdLow()
73 return low; in RegIdLow()
/art/test/717-integer-value-of/src/
DMain.java95 int low = (int) lowField.get(integerCacheClass); in testValueOfConst() local
96 Integer old42 = cache[42 - low]; in testValueOfConst()
97 cache[42 - low] = new Integer(42); in testValueOfConst()
105 cache[42 - low] = old42; in testValueOfConst()
/art/compiler/optimizing/
Dintrinsics.cc85 int32_t low, in ComputeValueOfLocations() argument
98 if (static_cast<uint32_t>(value) - static_cast<uint32_t>(low) < static_cast<uint32_t>(length)) { in ComputeValueOfLocations()
118 low(0), in ValueOfInfo()
126 int32_t low, in ComputeValueOfInfo() argument
130 info.low = low; in ComputeValueOfInfo()
136 uint32_t index = static_cast<uint32_t>(input_value) - static_cast<uint32_t>(info.low); in ComputeValueOfInfo()
154 uint32_t index = static_cast<uint32_t>(input_value) - static_cast<uint32_t>(info.low); in ComputeValueOfInfo()
Dlocations.h142 static constexpr Location RegisterPairLocation(int low, int high) { in RegisterPairLocation() argument
143 return Location(kRegisterPair, low << 16 | high); in RegisterPairLocation()
146 static constexpr Location FpuRegisterPairLocation(int low, int high) { in FpuRegisterPairLocation() argument
147 return Location(kFpuRegisterPair, low << 16 | high); in FpuRegisterPairLocation()
175 int low() const { in low() function
200 return static_cast<T>(low()); in AsRegisterPairLow()
212 return static_cast<T>(low()); in AsFpuRegisterPairLow()
227 return Location::RegisterLocation(low()); in ToLow()
229 return Location::FpuRegisterLocation(low()); in ToLow()
496 return ContainsCoreRegister(out.low()) || ContainsCoreRegister(out.high()); in OverlapsRegisters()
[all …]
Dcommon_arm.h78 int reg_code = location.low(); in DRegisterFrom()
212 inline Location LocationFrom(const vixl::aarch32::Register& low, in LocationFrom() argument
214 return Location::RegisterPairLocation(low.GetCode(), high.GetCode()); in LocationFrom()
217 inline Location LocationFrom(const vixl::aarch32::SRegister& low, in LocationFrom() argument
219 return Location::FpuRegisterPairLocation(low.GetCode(), high.GetCode()); in LocationFrom()
Dintrinsic_objects.h44 #define DEFINE_BOXED_CONSTANTS(name, low, high, unused, start_index) \ argument
45 static constexpr size_t k ##name ##CacheLastIndex = start_index + (high - low + 1); \
Dintrinsic_objects.cc58 #define FILL_OBJECTS(name, low, high, type, offset) \ in FillIntrinsicObjects() argument
62 low, \ in FillIntrinsicObjects()
Dintrinsics.h112 int32_t low,
126 int32_t low; member
150 int32_t low,
Dregister_allocator.cc299 LiveInterval* low = interval->GetLowInterval()->SplitAt(position); in Split() local
300 new_interval->SetLowInterval(low); in Split()
301 low->SetHighInterval(new_interval); in Split()
Dlocations.cc110 os << location.low() << ":" << location.high(); in operator <<()
Dcode_generator.cc1424 int low = location.low(); in EmitVRegInfo() local
1426 if (slow_path != nullptr && slow_path->IsFpuRegisterSaved(low)) { in EmitVRegInfo()
1427 uint32_t offset = slow_path->GetStackOffsetOfFpuRegister(low); in EmitVRegInfo()
1430 stack_map_stream->AddDexRegisterEntry(Kind::kInFpuRegister, low); in EmitVRegInfo()
1446 int low = location.low(); in EmitVRegInfo() local
1448 if (slow_path != nullptr && slow_path->IsCoreRegisterSaved(low)) { in EmitVRegInfo()
1449 uint32_t offset = slow_path->GetStackOffsetOfCoreRegister(low); in EmitVRegInfo()
1452 stack_map_stream->AddDexRegisterEntry(Kind::kInRegister, low); in EmitVRegInfo()
Dparallel_move_resolver.cc82 return Location::RegisterLocation(location.low()); in LowOf()
84 return Location::FpuRegisterLocation(location.low()); in LowOf()
Dregister_allocator_linear_scan.cc40 static bool IsLowOfUnalignedPairInterval(LiveInterval* low) { in IsLowOfUnalignedPairInterval() argument
41 return GetHighForLowRegister(low->GetRegister()) != low->GetHighInterval()->GetRegister(); in IsLowOfUnalignedPairInterval()
434 current->SetRegister(first.low()); in CheckForFixedOutput()
448 current->SetRegister(output.low()); in CheckForFixedOutput()
Dcode_generator_x86.cc3914 Immediate low(low_value); in VisitMul() local
3921 __ imull(in1_hi, low); in VisitMul()
3925 __ movl(eax, low); in VisitMul()
4953 Register low = loc.AsRegisterPairLow<Register>(); in GenerateShlLong() local
4957 __ addl(low, low); in GenerateShlLong()
4970 __ movl(high, low); in GenerateShlLong()
4972 __ xorl(low, low); in GenerateShlLong()
4975 __ shld(high, low, Immediate(shift)); in GenerateShlLong()
4976 __ shll(low, Immediate(shift)); in GenerateShlLong()
4992 Register low = loc.AsRegisterPairLow<Register>(); in GenerateShrLong() local
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/art/test/568-checker-onebit/
Dinfo.txt1 Unit test for 32-bit and 64-bit high/low-bit operations.
/art/test/550-checker-regression-wide-store/
Dinfo.txt2 would not invalidate the low vreg. The resulting environment would generate
/art/runtime/interpreter/mterp/armng/
Dother.S7 FETCH r0, 1 @ r0<- bbbb (low)
88 FETCH r0, 1 @ r0<- bbbb (low)
89 FETCH r1, 2 @ r1<- BBBB (low middle)
91 orr r0, r0, r1, lsl #16 @ r0<- BBBBbbbb (low word)
116 FETCH r0, 1 @ r0<- 0000bbbb (low)
/art/tools/ahat/src/main/com/android/ahat/dominators/
DDominators.java208 public boolean hasIdInRange(long low, long high) { in hasIdInRange() argument
210 if (low <= ids[i] && ids[i] <= high) { in hasIdInRange()
/art/libarttools/
DAndroid.bp27 // This library contains low-level interfaces used to call dex2oat and related tools. This will
/art/build/boot/
DAndroid.bp122 max_target_o_low_priority: ["hiddenapi/hiddenapi-max-target-o-low-priority.txt"],
/art/runtime/native/
Djava_lang_Class.cc246 size_t low = 0; in FindFieldByName() local
253 while (low < high) { in FindFieldByName()
254 auto mid = (low + high) / 2; in FindFieldByName()
270 low = mid + 1; in FindFieldByName()

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