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Searched refs:second_reg (Results 1 – 6 of 6) sorted by relevance

/art/compiler/optimizing/
Dcode_generator_x86.cc4287 Register second_reg = second.AsRegister<Register>(); in GenerateDivRemIntegral() local
4292 __ cmpl(second_reg, Immediate(-1)); in GenerateDivRemIntegral()
4298 __ idivl(second_reg); in GenerateDivRemIntegral()
4895 Register second_reg = second.AsRegister<Register>(); in HandleShift() local
4896 DCHECK_EQ(ECX, second_reg); in HandleShift()
4898 __ shll(first_reg, second_reg); in HandleShift()
4900 __ sarl(first_reg, second_reg); in HandleShift()
4902 __ shrl(first_reg, second_reg); in HandleShift()
4922 Register second_reg = second.AsRegister<Register>(); in HandleShift() local
4923 DCHECK_EQ(ECX, second_reg); in HandleShift()
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Dcode_generator_x86_64.cc4503 CpuRegister second_reg = second.AsRegister<CpuRegister>(); in GenerateDivRemIntegral() local
4508 __ cmpl(second_reg, Immediate(-1)); in GenerateDivRemIntegral()
4513 __ idivl(second_reg); in GenerateDivRemIntegral()
4515 __ cmpq(second_reg, Immediate(-1)); in GenerateDivRemIntegral()
4520 __ idivq(second_reg); in GenerateDivRemIntegral()
4980 CpuRegister second_reg = second.AsRegister<CpuRegister>(); in HandleShift() local
4982 __ shll(first_reg, second_reg); in HandleShift()
4984 __ sarl(first_reg, second_reg); in HandleShift()
4986 __ shrl(first_reg, second_reg); in HandleShift()
5002 CpuRegister second_reg = second.AsRegister<CpuRegister>(); in HandleShift() local
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Dintrinsics_x86_64.cc3440 CpuRegister second_reg = second.AsRegister<CpuRegister>(); in GenerateDivideUnsigned() local
3452 __ testl(second_reg, second_reg); in GenerateDivideUnsigned()
3455 __ divl(second_reg); in GenerateDivideUnsigned()
3458 __ testq(second_reg, second_reg); in GenerateDivideUnsigned()
3461 __ divq(second_reg); in GenerateDivideUnsigned()
Dcode_generator_arm_vixl.cc5477 vixl32::Register second_reg = RegisterFrom(second); in HandleShift() local
5479 __ And(out_reg, second_reg, kMaxIntShiftDistance); in HandleShift()
5512 vixl32::Register second_reg = RegisterFrom(second); in HandleShift() local
5515 __ And(o_l, second_reg, kMaxLongShiftDistance); in HandleShift()
5534 __ And(o_h, second_reg, kMaxLongShiftDistance); in HandleShift()
5553 __ And(o_h, second_reg, kMaxLongShiftDistance); in HandleShift()
8768 vixl32::Register second_reg = RegisterFrom(second); in VisitBitwiseNegatedRight() local
8773 __ Bic(out_reg, first_reg, second_reg); in VisitBitwiseNegatedRight()
8776 __ Orn(out_reg, first_reg, second_reg); in VisitBitwiseNegatedRight()
9020 vixl32::Register second_reg = InputRegisterAt(instruction, 1); in HandleBitwiseOperation() local
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Dintrinsics_x86.cc3652 Register second_reg = second.AsRegister<Register>(); in VisitIntegerDivideUnsigned() local
3659 __ testl(second_reg, second_reg); in VisitIntegerDivideUnsigned()
3665 __ divl(second_reg); in VisitIntegerDivideUnsigned()
/art/runtime/verifier/
Dmethod_verifier.cc3998 uint32_t second_reg = arg[sig_registers + 1]; in VerifyInvocationArgsFromIterator() local
3999 if (second_reg != get_reg + 1) { in VerifyInvocationArgsFromIterator()
4002 << second_reg << "."; in VerifyInvocationArgsFromIterator()