| /art/runtime/arch/riscv64/ |
| D | asm_support_riscv64.S | 451 SAVE_GPR t4, 8*56 // x29
540 RESTORE_GPR t4, (8*56) // x29
761 xor t4, t3, t2 // Prepare the value to store if unlocked
770 or t6, t5, t4
772 LUI_VALUE t4, LOCK_WORD_THIN_LOCK_COUNT_ONE // Increment the recursive lock count.
773 addw t4, t3, t4
775 and t5, t4, t5
781 sc.w t3, t4, (t1)
802 xor t4, t3, t2 // Prepare the value to store if simply locked
806 or t6, t5, t4 // Test the non-gc bits.
[all …]
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| D | quick_entrypoints_riscv64.S | 180 lla t4, .Lreg_handlers_start\sfx // First handler for non-FP args.
181 addi t5, t4, (3 * NUM_GPRS_TO_FILL * INVOKE_STUB_LOAD_REG_SIZE) // First handler for FP args.
203 jalr x0, 0(t4)
207 jalr x0, (NUM_GPRS_TO_FILL * INVOKE_STUB_LOAD_REG_SIZE)(t4)
211 jalr x0, (2 * NUM_GPRS_TO_FILL * INVOKE_STUB_LOAD_REG_SIZE)(t4)
225 INVOKE_STUB_LOAD_REG lw, a1, t0, 4, t4, INVOKE_STUB_LOAD_REG_SIZE, .Lfill_regs, \sfx
227 INVOKE_STUB_LOAD_REG lw, a2, t0, 4, t4, INVOKE_STUB_LOAD_REG_SIZE, .Lfill_regs, \sfx
228 INVOKE_STUB_LOAD_REG lw, a3, t0, 4, t4, INVOKE_STUB_LOAD_REG_SIZE, .Lfill_regs, \sfx
229 INVOKE_STUB_LOAD_REG lw, a4, t0, 4, t4, INVOKE_STUB_LOAD_REG_SIZE, .Lfill_regs, \sfx
230 INVOKE_STUB_LOAD_REG lw, a5, t0, 4, t4, INVOKE_STUB_LOAD_REG_SIZE, .Lfill_regs, \sfx
[all …]
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| D | jni_entrypoints_riscv64.S | 192 mv t4, ra
199 ld t4, FRAME_SIZE_SAVE_REFS_AND_ARGS+8(t1)
202 sd t4, 8-16(t1)
241 sd t4, (27*8)(t1) // t4: Save return address for tail call from JNI stub.
346 ld t4, 8-16(t1)
349 sd t4, FRAME_SIZE_SAVE_REFS_AND_ARGS+8(t1)
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| /art/test/567-checker-builder-intrinsics/src/ |
| D | TestMinMax.java | 644 int t4 = (x < y) ? x : y; in minmaxCSEScalar() local
648 return t1 + t2 + t3 + t4 + t5 + t6; in minmaxCSEScalar()
680 int t4 = (x[0] < y[0]) ? x[0] : y[0]; in minmaxCSEArray() local
684 return t1 + t2 + t3 + t4 + t5 + t6; in minmaxCSEArray()
704 int t4 = (x < y) ? x : y; in minmaxCSEScalarAndCond() local
706 return t1 + t2 + t3 + t4; in minmaxCSEScalarAndCond()
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| /art/runtime/interpreter/mterp/riscv64/ |
| D | control_flow.S | 120 slt t4, t2, t1
121 sub t4, t4, t3
123 % set_vreg("t4", "t0", z0="t1") # fp[AA] := t4
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| D | arithmetic.S | 410 mv t4, t3 // t4 := A
442 mv t4, t3 // t4 := A
444 GET_VREG_WIDE t1, t4 // t1 := fp[A]
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| D | main.S | 534 add t4, t3, t0 // t4 := (callee) &FP[next]
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| /art/compiler/optimizing/ |
| D | reference_type_propagation_test.cc | 206 ReferenceTypeInfo t4(MergeTypes(ObjectType(), InvalidType())); in TEST_F() local
207 EXPECT_TRUE(t4.IsValid()); in TEST_F()
208 EXPECT_TRUE(t4.IsExact()); in TEST_F()
209 EXPECT_TRUE(t4.IsEqual(ObjectType())); in TEST_F()
238 ReferenceTypeInfo t4(MergeTypes(StringType(), ObjectType())); in TEST_F() local
239 EXPECT_TRUE(t4.IsValid()); in TEST_F()
240 EXPECT_FALSE(t4.IsExact()); in TEST_F()
241 EXPECT_TRUE(t4.IsEqual(ObjectType(false))); in TEST_F()
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| /art/test/990-field-trace/src/art/ |
| D | Test990.java | 210 TestClass1 t4 = new TestClass1(4, t2);
218 t4.tweak((int)((TestClass2)t2).baz);
219 t4.tweak((int)TestClass2.TOTAL);
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| /art/tools/ahat/src/test/com/android/ahat/ |
| D | DiffFieldsTest.java | 37 private static final Type t4 = Type.DOUBLE; field in DiffFieldsTest
126 a.add(new FieldValue("n4", t4, null)); in basicDiff()
164 a.add(new FieldValue("n4", t4, null)); in reorderedDiff()
169 b.add(new FieldValue("n4", t4, null)); in reorderedDiff()
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| /art/test/924-threads/src/art/ |
| D | Test924.java | 77 Thread t4 = new Thread("Subclass") { in doTest() local
79 printThreadInfo(t4); in doTest()
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| /art/test/dexdump/ |
| D | bytecodes.txt | 1603 0x0013 - 0x005d reg=3 t4 I
1760 0x002d - 0x00c2 reg=8 t4 J
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