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/art/runtime/arch/riscv64/
Dquick_entrypoints_riscv64.S1769 slowPathLabel, class, count, temp0, temp1, temp2
1770 andi \temp1, \temp1, OBJECT_ALIGNMENT_MASK_TOGGLED64 // Apply alignment mask
1778 bgeu \temp1, \temp2, \slowPathLabel // path.
1791 bgtu \temp1, \temp2, \slowPathLabel
1796 add \temp0, \temp0, \temp1
1832 .macro COMPUTE_ARRAY_SIZE_UNKNOWN class, count, temp0, temp1, temp2
1839 zext.w \temp1, \count // From \count we use a 32 bit value,
1841 sll \temp1, \temp1, \temp0 // Calculate data size
1843 addi \temp1, \temp1, (MIRROR_INT_ARRAY_DATA_OFFSET + OBJECT_ALIGNMENT_MASK)
1852 add \temp1, \temp1, \temp0
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/art/compiler/optimizing/
Dintrinsics_riscv64.cc398 XRegister temp1 = srs.AllocateXRegister(); in GenerateReverse() local
409 __ Li(temp1, 0x55555555); in GenerateReverse()
410 maybe_extend_mask(temp1, temp2); in GenerateReverse()
412 __ And(out, in, temp1); in GenerateReverse()
413 __ And(temp2, temp2, temp1); in GenerateReverse()
417 __ Li(temp1, 0x33333333); in GenerateReverse()
418 maybe_extend_mask(temp1, temp2); in GenerateReverse()
420 __ And(out, out, temp1); in GenerateReverse()
421 __ And(temp2, temp2, temp1); in GenerateReverse()
425 __ Li(temp1, 0x0f0f0f0f); in GenerateReverse()
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Dintrinsics_arm64.cc1859 Register temp1 = WRegisterFrom(locations->GetTemp(1)); in VisitStringCompareTo() local
1897 __ Lsr(temp1, temp2, 1u); in VisitStringCompareTo()
1901 __ Ldr(temp1, HeapOperand(arg, count_offset)); in VisitStringCompareTo()
1904 __ Subs(out, temp0, temp1); in VisitStringCompareTo()
1906 __ Csel(temp0, temp1, temp0, ge); in VisitStringCompareTo()
1919 __ Mov(temp1, value_offset); in VisitStringCompareTo()
1941 __ Ldr(temp4, MemOperand(str.X(), temp1.X())); in VisitStringCompareTo()
1942 __ Ldr(temp2, MemOperand(arg.X(), temp1.X())); in VisitStringCompareTo()
1945 __ Add(temp1, temp1, char_size * 4); in VisitStringCompareTo()
1952 temp1 = temp1.X(); in VisitStringCompareTo()
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Dintrinsics_arm_vixl.cc382 vixl32::SRegister temp1 = LowSRegisterFrom(invoke->GetLocations()->GetTemp(0)); in VisitMathRoundFloat() local
388 __ Vcvta(S32, F32, temp1, in_reg); in VisitMathRoundFloat()
389 __ Vmov(out_reg, temp1); in VisitMathRoundFloat()
398 __ Vrinta(F32, temp1, in_reg); in VisitMathRoundFloat()
400 __ Vsub(F32, temp1, in_reg, temp1); in VisitMathRoundFloat()
401 __ Vcmp(F32, temp1, temp2); in VisitMathRoundFloat()
568 const vixl32::Register temp1 = RegisterFrom(locations->GetTemp(1)); in VisitStringCompareTo() local
603 __ Lsr(temp1, temp2, 1u); in VisitStringCompareTo()
607 __ Ldr(temp1, MemOperand(arg, count_offset)); in VisitStringCompareTo()
610 __ Subs(out, temp0, temp1); in VisitStringCompareTo()
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Dintrinsics_x86_64.cc899 CpuRegister temp1 = temp1_loc.AsRegister<CpuRegister>(); in VisitSystemArrayCopy() local
973 temp1, in VisitSystemArrayCopy()
984 temp1, in VisitSystemArrayCopy()
1024 __ movl(temp1, Address(dest, class_offset)); in VisitSystemArrayCopy()
1025 __ MaybeUnpoisonHeapReference(temp1); in VisitSystemArrayCopy()
1031 __ cmpl(temp1, temp2); in VisitSystemArrayCopy()
1040 __ movl(temp1, Address(temp1, component_offset)); in VisitSystemArrayCopy()
1041 __ MaybeUnpoisonHeapReference(temp1); in VisitSystemArrayCopy()
1044 __ cmpl(Address(temp1, super_offset), Immediate(0)); in VisitSystemArrayCopy()
1067 __ movl(temp1, Address(src, class_offset)); in VisitSystemArrayCopy()
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Dcode_generator_arm_vixl.cc2345 vixl32::Register temp1 = temps.Acquire(); in GenerateFrameEntry() local
2356 __ Ldr(temp1, MemOperand(kMethodRegister, ArtMethod::DeclaringClassOffset().Int32Value())); in GenerateFrameEntry()
2357 __ Ldrb(temp2, MemOperand(temp1, kClassStatusByteOffset)); in GenerateFrameEntry()
2371 __ Ldr(temp1, MemOperand(temp1, mirror::Class::ClinitThreadIdOffset().Int32Value())); in GenerateFrameEntry()
2373 __ Cmp(temp1, temp2); in GenerateFrameEntry()
2380 __ Ldr(temp1, MemOperand(tr, entrypoint_offset.Int32Value())); in GenerateFrameEntry()
2381 __ Bx(temp1); in GenerateFrameEntry()
4593 vixl32::Register temp1 = RegisterFrom(locations->GetTemp(0)); in GenerateDivRemWithAnyConstant() local
4603 vixl32::Register temp1, in GenerateDivRemWithAnyConstant()
4606 __ Mov(temp1, static_cast<int32_t>(magic)); in GenerateDivRemWithAnyConstant()
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Dintrinsics_x86.cc191 XmmRegister temp1 = locations->GetTemp(0).AsFpuRegister<XmmRegister>(); in MoveIntToFP() local
193 __ movd(temp1, input.AsRegisterPairLow<Register>()); in MoveIntToFP()
195 __ punpckldq(temp1, temp2); in MoveIntToFP()
196 __ movsd(output.AsFpuRegister<XmmRegister>(), temp1); in MoveIntToFP()
2001 XmmRegister temp1 = locations->GetTemp(0).AsFpuRegister<XmmRegister>(); in GenUnsafePut() local
2003 __ movd(temp1, value_lo); in GenUnsafePut()
2005 __ punpckldq(temp1, temp2); in GenUnsafePut()
2006 __ movsd(Address(base, offset, ScaleFactor::TIMES_1, 0), temp1); in GenUnsafePut()
2613 Register temp1 = locations->GetTemp(0).AsRegister<Register>(); in GenUnsafeGetAndUpdate() local
2626 &temp1); in GenUnsafeGetAndUpdate()
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Dsuperblock_cloner_test.cc425 HBasicBlock* temp1 = AddNewBlock(); in TEST_F() local
428 if_block->AddSuccessor(temp1); in TEST_F()
429 temp1->AddSuccessor(header); in TEST_F()
439 temp1->AddInstruction(temp_add); in TEST_F()
440 temp1->AddInstruction(new (GetAllocator()) HGoto()); in TEST_F()
Dcode_generator_x86_64.h595 CpuRegister* temp1 = nullptr,
Dcode_generator_riscv64.cc2978 XRegister temp1 = srs.AllocateXRegister(); in VisitArraySet() local
2988 __ Loadwu(temp1, array, class_offset); in VisitArraySet()
2990 codegen_->MaybeUnpoisonHeapReference(temp1); in VisitArraySet()
2993 __ Loadwu(temp2, temp1, component_offset); in VisitArraySet()
2995 __ Loadwu(temp1, value.AsRegister<XRegister>(), class_offset); in VisitArraySet()
3000 __ Beq(temp1, temp2, &do_put); in VisitArraySet()
3006 __ Loadwu(temp1, temp2, super_offset); in VisitArraySet()
3009 __ Bnez(temp1, slow_path->GetEntryLabel()); in VisitArraySet()
3012 __ Bne(temp1, temp2, slow_path->GetEntryLabel()); in VisitArraySet()
Dcode_generator_arm64.cc1345 Register temp1 = temps.AcquireW(); in GenerateFrameEntry() local
1352 __ Ldr(temp1, MemOperand(kArtMethodRegister, ArtMethod::DeclaringClassOffset().Int32Value())); in GenerateFrameEntry()
1353 __ Ldrb(temp2, HeapOperand(temp1, kClassStatusByteOffset)); in GenerateFrameEntry()
1367 __ Ldr(temp1, HeapOperand(temp1, mirror::Class::ClinitThreadIdOffset().Int32Value())); in GenerateFrameEntry()
1369 __ Cmp(temp1, temp2); in GenerateFrameEntry()
1376 __ Ldr(temp1.X(), MemOperand(tr, entrypoint_offset.Int32Value())); in GenerateFrameEntry()
1377 __ Br(temp1.X()); in GenerateFrameEntry()
Dcode_generator_arm_vixl.h450 vixl::aarch32::Register temp1,
Dcode_generator_x86_64.cc630 CpuRegister temp1, in ReadBarrierMarkAndUpdateFieldSlowPathX86_64() argument
637 temp1_(temp1), in ReadBarrierMarkAndUpdateFieldSlowPathX86_64()
8005 CpuRegister* temp1, in GenerateReferenceLoadWithBakerReadBarrier() argument
8063 DCHECK(temp1 != nullptr); in GenerateReferenceLoadWithBakerReadBarrier()
8066 instruction, ref, obj, src, /* unpoison_ref_before_marking= */ true, *temp1, *temp2); in GenerateReferenceLoadWithBakerReadBarrier()
Dcode_generator_x86.cc6165 XmmRegister temp1 = locations->GetTemp(0).AsFpuRegister<XmmRegister>(); in HandleFieldSet() local
6167 __ movd(temp1, value.AsRegisterPairLow<Register>()); in HandleFieldSet()
6169 __ punpckldq(temp1, temp2); in HandleFieldSet()
6170 __ movsd(field_addr, temp1); in HandleFieldSet()
/art/test/623-checker-loop-regressions/src/
DMain.java829 int temp1 = (byte)(temp0) * a[i]; in testDotProdAndDotProdExtraMul0() local
830 s0 += temp1; in testDotProdAndDotProdExtraMul0()
847 int temp1 = (byte)(temp0) * a[i]; in testDotProdAndDotProdExtraMul1() local
849 s1 += temp1; in testDotProdAndDotProdExtraMul1()
881 int temp1 = Math.abs(temp0 - y[i]); in testSADAndSADExtraAbs0() local
882 s0 += temp1; in testSADAndSADExtraAbs0()
915 int temp1 = Math.abs(temp0 - y[i]); in testSADAndSADExtraAbs1() local
917 s1 += temp1; in testSADAndSADExtraAbs1()
943 int temp1 = Math.abs(temp0); in testSADAndDotProdCombined0() local
946 s0 += temp1; in testSADAndDotProdCombined0()
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/art/runtime/
Dcommon_dex_operations.h258 std::string temp1, temp2; in DoFieldPutCommon() local
261 reg->GetClass()->GetDescriptor(&temp1), in DoFieldPutCommon()
/art/test/458-checker-instruct-simplification/src/
DMain.java712 int temp1 = -arg1; in $noinline$AddNegs2() local
714 return (temp1 + temp2) | (temp1 + temp2); in $noinline$AddNegs2()
/art/runtime/interpreter/
Dinterpreter_common.cc1358 std::string temp1, temp2; in DoCallCommon() local
1362 o->GetClass()->GetDescriptor(&temp1), in DoCallCommon()
Dinterpreter_switch_impl-inl.h657 std::string temp1, temp2; in RETURN_OBJECT() local
660 obj_result->GetClass()->GetDescriptor(&temp1), in RETURN_OBJECT()
/art/runtime/mirror/
Dclass.cc505 std::string temp1, temp2; in IsInSamePackage() local
506 return IsInSamePackage(klass1->GetDescriptor(&temp1), klass2->GetDescriptor(&temp2)); in IsInSamePackage()