1 /*
2  * This file is auto-generated. Modifications will be lost.
3  *
4  * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5  * for more information.
6  */
7 #ifndef MLX5_USER_IOCTL_VERBS_H
8 #define MLX5_USER_IOCTL_VERBS_H
9 #include <linux/types.h>
10 enum mlx5_ib_uapi_flow_action_flags {
11   MLX5_IB_UAPI_FLOW_ACTION_FLAGS_REQUIRE_METADATA = 1 << 0,
12 };
13 enum mlx5_ib_uapi_flow_table_type {
14   MLX5_IB_UAPI_FLOW_TABLE_TYPE_NIC_RX = 0x0,
15   MLX5_IB_UAPI_FLOW_TABLE_TYPE_NIC_TX = 0x1,
16   MLX5_IB_UAPI_FLOW_TABLE_TYPE_FDB = 0x2,
17   MLX5_IB_UAPI_FLOW_TABLE_TYPE_RDMA_RX = 0x3,
18   MLX5_IB_UAPI_FLOW_TABLE_TYPE_RDMA_TX = 0x4,
19 };
20 enum mlx5_ib_uapi_flow_action_packet_reformat_type {
21   MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 = 0x0,
22   MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL = 0x1,
23   MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 = 0x2,
24   MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL = 0x3,
25 };
26 struct mlx5_ib_uapi_devx_async_cmd_hdr {
27   __aligned_u64 wr_id;
28   __u8 out_data[];
29 };
30 enum mlx5_ib_uapi_dm_type {
31   MLX5_IB_UAPI_DM_TYPE_MEMIC,
32   MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM,
33   MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM,
34   MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM,
35   MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM,
36 };
37 enum mlx5_ib_uapi_devx_create_event_channel_flags {
38   MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA = 1 << 0,
39 };
40 struct mlx5_ib_uapi_devx_async_event_hdr {
41   __aligned_u64 cookie;
42   __u8 out_data[];
43 };
44 enum mlx5_ib_uapi_pp_alloc_flags {
45   MLX5_IB_UAPI_PP_ALLOC_FLAGS_DEDICATED_INDEX = 1 << 0,
46 };
47 enum mlx5_ib_uapi_uar_alloc_type {
48   MLX5_IB_UAPI_UAR_ALLOC_TYPE_BF = 0x0,
49   MLX5_IB_UAPI_UAR_ALLOC_TYPE_NC = 0x1,
50 };
51 enum mlx5_ib_uapi_query_port_flags {
52   MLX5_IB_UAPI_QUERY_PORT_VPORT = 1 << 0,
53   MLX5_IB_UAPI_QUERY_PORT_VPORT_VHCA_ID = 1 << 1,
54   MLX5_IB_UAPI_QUERY_PORT_VPORT_STEERING_ICM_RX = 1 << 2,
55   MLX5_IB_UAPI_QUERY_PORT_VPORT_STEERING_ICM_TX = 1 << 3,
56   MLX5_IB_UAPI_QUERY_PORT_VPORT_REG_C0 = 1 << 4,
57   MLX5_IB_UAPI_QUERY_PORT_ESW_OWNER_VHCA_ID = 1 << 5,
58 };
59 struct mlx5_ib_uapi_reg {
60   __u32 value;
61   __u32 mask;
62 };
63 struct mlx5_ib_uapi_query_port {
64   __aligned_u64 flags;
65   __u16 vport;
66   __u16 vport_vhca_id;
67   __u16 esw_owner_vhca_id;
68   __u16 rsvd0;
69   __aligned_u64 vport_steering_icm_rx;
70   __aligned_u64 vport_steering_icm_tx;
71   struct mlx5_ib_uapi_reg reg_c0;
72 };
73 #endif
74