Home
last modified time | relevance | path

Searched refs:CID_UWB_TML (Results 1 – 2 of 2) sorted by relevance

/hardware/nxp/uwb/halimpl/tml/
DphTmlUwb.cc87 wInitStatus = PHUWBSTVAL(CID_UWB_TML, UWBSTATUS_ALREADY_INITIALISED); in phTmlUwb_Init()
92 wInitStatus = PHUWBSTVAL(CID_UWB_TML, UWBSTATUS_INVALID_PARAMETER); in phTmlUwb_Init()
99 wInitStatus = PHUWBSTVAL(CID_UWB_TML, UWBSTATUS_FAILED); in phTmlUwb_Init()
109 wInitStatus = PHUWBSTVAL(CID_UWB_TML, UWBSTATUS_INVALID_DEVICE); in phTmlUwb_Init()
126 wInitStatus = PHUWBSTVAL(CID_UWB_TML, UWBSTATUS_FAILED); in phTmlUwb_Init()
302 wStatus = PHUWBSTVAL(CID_UWB_TML, UWBSTATUS_FAILED); in phTmlUwb_TmlWriterThread()
398 return PHUWBSTVAL(CID_UWB_TML, UWBSTATUS_NOT_INITIALISED); in phTmlUwb_Shutdown()
467 wWriteStatus = PHUWBSTVAL(CID_UWB_TML, UWBSTATUS_BUSY); in phTmlUwb_Write()
470 wWriteStatus = PHUWBSTVAL(CID_UWB_TML, UWBSTATUS_INVALID_PARAMETER); in phTmlUwb_Write()
473 wWriteStatus = PHUWBSTVAL(CID_UWB_TML, UWBSTATUS_NOT_INITIALISED); in phTmlUwb_Write()
[all …]
/hardware/nxp/uwb/halimpl/inc/common/
DphUwbCompId.h44 #define CID_UWB_TML 0x01 /* Transport Mapping Layer */ macro