Home
last modified time | relevance | path

Searched refs:__u64 (Results 1 – 25 of 31) sorted by relevance

12

/hardware/google/gfxstream/guest/mesa/include/drm-uapi/
Dxe_drm.h62 __u64 next_extension;
174 __u64 total_size;
182 __u64 used;
200 __u64 cpu_visible_size;
211 __u64 cpu_visible_used;
213 __u64 reserved[6];
257 __u64 info[];
288 __u64 features;
289 __u64 native_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
290 __u64 slow_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
[all …]
Dnouveau_drm.h48 __u64 param;
49 __u64 value;
92 __u64 size;
93 __u64 offset;
94 __u64 map_handle;
109 __u64 offset;
113 __u64 user_priv;
139 __u64 offset;
140 __u64 length;
146 __u64 buffers;
[all …]
Di915_drm.h108 __u64 next_extension;
289 (((__u64)__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x)) | \
290 ((__u64)(gt) << __I915_PMU_GT_SHIFT))
548 …ne DRM_IOCTL_I915_PERF_REMOVE_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_REMOVE_CONFIG, __u64)
893 __u64 addr;
901 __u64 gtt_start;
906 __u64 gtt_end;
915 __u64 size;
930 __u64 offset;
932 __u64 size;
[all …]
Damdgpu_drm.h164 __u64 bo_size;
166 __u64 alignment;
168 __u64 domains;
170 __u64 domain_flags;
201 __u64 bo_info_ptr;
289 __u64 flags;
319 __u64 flags;
355 __u64 addr;
356 __u64 size;
398 (((__u64)(value) & AMDGPU_TILING_##field##_MASK) << AMDGPU_TILING_##field##_SHIFT)
[all …]
Ddrm_mode.h263 __u64 fb_id_ptr;
264 __u64 crtc_id_ptr;
265 __u64 connector_id_ptr;
266 __u64 encoder_id_ptr;
278 __u64 set_connectors_ptr;
357 __u64 format_type_ptr;
361 __u64 plane_id_ptr;
460 __u64 encoders_ptr;
462 __u64 modes_ptr;
464 __u64 props_ptr;
[all …]
Dvc4_drm.h99 __u64 bin_cl;
110 __u64 shader_rec;
126 __u64 uniforms;
127 __u64 bo_handles;
181 __u64 seqno;
208 __u64 seqno;
209 __u64 timeout_ns;
223 __u64 timeout_ns;
256 __u64 offset;
274 __u64 data;
[all …]
Dpanfrost_drm.h52 __u64 jc;
55 __u64 in_syncs;
64 __u64 bo_handles;
111 __u64 offset;
130 __u64 offset;
180 __u64 value;
191 __u64 offset;
204 __u64 buf_ptr;
250 __u64 jc;
254 __u64 nbos;
[all …]
Dvirtgpu_drm.h62 __u64 offset; /* use for mmap system call */
71 __u64 command; /* void* */
72 __u64 bo_handles;
88 __u64 param;
89 __u64 value;
154 __u64 addr;
172 __u64 size;
180 __u64 cmd;
181 __u64 blob_id;
188 __u64 param;
[all …]
Dtegra_drm.h27 __u64 size;
75 __u64 offset;
178 __u64 context;
191 __u64 context;
204 __u64 context;
232 __u64 context;
401 __u64 context;
457 __u64 syncpts;
467 __u64 cmdbufs;
477 __u64 relocs;
[all …]
Dv3d_drm.h70 __u64 next;
85 __u64 point; /* for timeline sem support */
86 __u64 mbz[2]; /* must be zero, rsv */
110 __u64 in_syncs;
111 __u64 out_syncs;
194 __u64 bo_handles;
208 __u64 extensions;
222 __u64 timeout_ns;
263 __u64 offset;
284 __u64 value;
[all …]
Dmsm_drm.h101 __u64 value; /* out (get_param) or in (set_param) */
124 __u64 size; /* in */
146 __u64 value; /* in or out */
196 __u64 reloc_offset; /* in, offset from start of reloc_bo */
217 __u64 relocs; /* in, ptr to array of submit_reloc's */
244 __u64 presumed; /* in/out, presumed buffer address */
273 __u64 point; /* in, timepoint for timeline syncobjs. */
285 __u64 bos; /* in, ptr to array of submit_bo's */
286 __u64 cmds; /* in, ptr to array of submit_cmd's */
289 __u64 in_syncobjs; /* in, ptr to array of drm_msm_gem_submit_syncobj */
[all …]
Detnaviv_drm.h86 __u64 value; /* out (get_param) or in (set_param) */
102 __u64 size; /* in */
110 __u64 offset; /* out, offset to pass to mmap() */
141 __u64 reloc_offset; /* in, offset from start of reloc_bo */
166 __u64 presumed; /* in/out, presumed buffer address */
204 __u64 bos; /* in, ptr to array of submit_bo's */
205 __u64 relocs; /* in, ptr to array of submit_reloc's */
206 __u64 stream; /* in, ptr to cmdstream */
209 __u64 pmrs; /* in, ptr to array of submit_pmr's */
233 __u64 user_ptr; /* in, page aligned user pointer */
[all …]
Ddrm.h56 typedef uint64_t __u64; typedef
619 __u64 size;
767 __u64 capability;
768 __u64 value;
835 __u64 capability;
836 __u64 value;
875 __u64 src_point;
876 __u64 dst_point;
885 __u64 handles;
895 __u64 handles;
[all …]
Dsync_file.h33 typedef uint64_t __u64; typedef
66 __u64 timestamp_ns;
86 __u64 sync_fence_info;
Ddma-buf.h39 typedef uint64_t __u64; typedef
93 __u64 flags;
196 #define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, __u64)
Dlima_drm.h32 __u64 value; /* out, parameter value */
58 __u64 offset; /* out, used to mmap this buffer to CPU */
121 __u64 bos; /* in, array of drm_lima_gem_submit_bo */
122 __u64 frame; /* in, GP/PP frame */
Ddrm_fourcc.h434 ((((__u64)DRM_FORMAT_MOD_VENDOR_## vendor) << 56) | ((val) & 0x00ffffffffffffffULL))
937 static __inline__ __u64
938 drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) in drm_fourcc_canonicalize_nvidia_format_mod()
992 fourcc_mod_code(BROADCOM, ((((__u64)params) << __fourcc_mod_broadcom_param_shift) | val))
1110 fourcc_mod_code(ARM, ((__u64)(__type) << 52) | ((__val) & 0x000fffffffffffffULL))
1559 ((__u64)(value) << AMD_FMT_MOD_##field##_SHIFT)
1563 (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT))
/hardware/google/gfxstream/guest/include/
Dvirtgpu_drm.h62 __u64 offset; /* use for mmap system call */
70 __u64 command; /* void* */
71 __u64 bo_handles;
87 __u64 param;
88 __u64 value;
153 __u64 addr;
171 __u64 size;
179 __u64 cmd;
180 __u64 blob_id;
187 __u64 param;
[all …]
/hardware/google/gfxstream/guest/platform/include/
Dvirtgpu_drm.h62 __u64 offset; /* use for mmap system call */
70 __u64 command; /* void* */
71 __u64 bo_handles;
89 __u64 param;
90 __u64 value;
155 __u64 addr;
174 __u64 size;
182 __u64 cmd;
183 __u64 blob_id;
191 __u64 param;
[all …]
/hardware/google/graphics/common/libion/test/
Dion_test.h24 __u64 ptr;
25 __u64 offset;
26 __u64 size;
Dion_test_fixture.cpp61 query.heaps = reinterpret_cast<__u64>(m_ionHeapData); in SetUp()
198 data.ptr = reinterpret_cast<__u64>(ptr); in ionTestMapping()
/hardware/qcom/sm7250/display/sde-drm/
Ddrm_panel_feature_mgr.h79 __u64 flags;
86 __u64 cfg_param_07;
88 __u64 cfg_param_09[RC_DATA_SIZE_MAX];
/hardware/google/graphics/common/libion/
Dion_uapi.h73 __u64 len;
98 __u64 heaps;
/hardware/google/gfxstream/guest/GoldfishAddressSpace/include/
Dgoldfish_address_space_android.impl47 __u64 size;
48 __u64 offset;
49 __u64 phys_addr;
53 __u64 offset;
54 __u64 size;
60 #define GOLDFISH_ADDRESS_SPACE_IOCTL_DEALLOCATE_BLOCK GOLDFISH_ADDRESS_SPACE_IOCTL_OP(11, __u64)
63 #define GOLDFISH_ADDRESS_SPACE_IOCTL_UNCLAIM_SHARED GOLDFISH_ADDRESS_SPACE_IOCTL_OP(14, __u64)
/hardware/invensense/6515/libsensors_iio/software/core/driver/include/
Dmltypes.h113 typedef uint64_t __u64; typedef

12