1 /* 2 * Copyright 2018-2022 NXP 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef _PHNXPUCIHAL_FW_H 18 #define _PHNXPUCIHAL_FW_H 19 20 /****************************************************************************************/ 21 /* GLOBAL FUNCTION PROTOTYPES */ 22 /****************************************************************************************/ 23 #define PHHBCI_GPIO_TIMEOUT_MS (10000U) 24 #define PHHBCI_GPIO_QBTIMEOUT_MS (5000U) 25 26 /*FW Versions*/ 27 #define PHHBCI_FW_B0_VERSION 0xB0 28 #define PHHBCI_FW_B1_VERSION 0xB1 29 #define PHHBCI_FW_B2_VERSION 0xB2 30 31 /* Place configuration switches, which overrides values from phDefaultConfig.h, 32 * here. */ 33 #if defined(PHFL_BUILD_TYPE_DEBUG) 34 #define PHFL_CONFIG_DEBUG_PRINT 1 35 //#define PHFL_LOG_HOST 1 36 #endif 37 #ifndef PHFL_CONFIG_ENABLE_ASSERTIONS 38 #define PHFL_CONFIG_ENABLE_ASSERTIONS 1 39 #endif 40 #ifndef PHFL_CONFIG_ENABLE_ASSERTIONS_DEBUG 41 #ifndef __QAC__ 42 #define PHFL_CONFIG_ENABLE_ASSERTIONS_DEBUG 0 43 #else 44 #define PHFL_CONFIG_ENABLE_ASSERTIONS_DEBUG 1 45 #endif 46 #endif 47 48 #ifndef PHFL_CONFIG_NORTOS 49 #define PHFL_CONFIG_NORTOS 1 50 #endif 51 52 #if (PHFL_CONFIG_TARGET_PLATFORM == PHFL_CONFIG_TARGET_PLATFORM_ARM) 53 #include <stdint.h> 54 #else 55 56 #ifndef __uint8_t_defined 57 #define __uint8_t_defined 58 /** 59 * \brief 8 bit unsigned integer 60 */ 61 typedef unsigned char uint8_t; 62 #endif 63 64 #ifndef __uint16_t_defined 65 #define __uint16_t_defined 66 /** 67 * \brief 16 bit unsigned integer 68 */ 69 typedef unsigned short uint16_t; 70 #endif 71 72 #ifndef __uint32_t_defined 73 #define __uint32_t_defined 74 /** 75 * \brief 32 bit unsigned integer 76 */ 77 typedef unsigned long uint32_t; 78 #endif 79 80 #ifndef __int8_t_defined 81 #define __int8_t_defined 82 /** 83 * \brief 8 bit signed integer 84 */ 85 typedef signed char int8_t; 86 #endif 87 88 #ifndef __int16_t_defined 89 #define __int16_t_defined 90 /** 91 * \brief 16 bit signed integer 92 */ 93 typedef signed short int16_t; 94 #endif 95 96 #ifndef __int32_t_defined 97 #define __int32_t_defined 98 /** 99 * \brief 32 bit signed integer 100 */ 101 typedef signed int int32_t; 102 #endif 103 #endif 104 105 #if !defined(__cplusplus) || defined(__arm__) 106 #ifndef __BOOL_DEFINED 107 #define __BOOL_DEFINED 1 108 /** 109 * \brief Boolean type 110 */ 111 #ifndef false 112 #define false 0 113 #endif 114 #ifndef true 115 #define true (!false) 116 #endif 117 // typedef uint8_t bool; 118 #endif 119 #endif 120 121 #ifndef TRUE 122 #define TRUE true 123 #endif 124 125 #ifndef FALSE 126 #define FALSE false 127 #endif 128 129 #ifndef NULL 130 #define NULL ((void*)0) /**< Value used for NULL pointers */ 131 #endif 132 133 #ifdef PHFL_ENABLE_STACK_CHECK 134 #define PH_CALL_DIRECT_FUNCTION(fct) (fct) 135 #else 136 #define PH_CALL_DIRECT_FUNCTION(fct) 137 #endif 138 139 #if (PHFL_CONFIG_TARGET_PLATFORM == PHFL_CONFIG_TARGET_PLATFORM_ARM) || \ 140 defined(__DOXYGEN) 141 /** 142 * \brief Macro used to place given variable as ZI-data to specified section. 143 * \note The section need to be defined in the scatter file. 144 * Example: 145 * \code 146 static uint32_t aBmaBuffer[PH_BOOT_BMA_BUFFER_SIZE] 147 PH_PLACE_ZI_DATA_TO_SECTION("BMA"); 148 \endcode 149 */ 150 #define PH_PLACE_ZI_DATA_TO_SECTION(SECTIONNAME) \ 151 __attribute__((section(SECTIONNAME), zero_init)) 152 153 /** 154 * \brief Macro used to place constant data to specified section. 155 * \note The section need to be defined in the scatter file. 156 * Example: 157 * \code 158 static const uint32_t dwFoo PH_PLACE_RO_DATA_TO_SECTION("FOO"); 159 \endcode 160 */ 161 #define PH_PLACE_RO_DATA_TO_SECTION(SECTIONNAME) \ 162 __attribute__((section(SECTIONNAME))) 163 #define PH_PLACE_FUNCTION_TO_SECTION(SECTIONNAME) \ 164 __attribute__((section(SECTIONNAME))) 165 166 #define STRINGIFY(a) #a 167 168 #define PH_ZI_DATA_SECTION(SECTIONNAME) \ 169 _Pragma(STRINGIFY(arm section rwdata = #SECTIONNAME)); \ 170 _Pragma(STRINGIFY(arm section zidata = #SECTIONNAME)); 171 172 #define PH_RO_DATA_SECTION(SECTIONNAME) \ 173 _Pragma(STRINGIFY(arm section rodata = #SECTIONNAME)); 174 175 #define PH_CODE_SECTION(SECTIONNAME) \ 176 _Pragma(STRINGIFY(arm section code = #SECTIONNAME)); 177 178 #define PH_PACK_STRUCT_BEGIN __packed 179 #define PH_PACK_STRUCT_END 180 #define PH_ALIGN __align 181 #define PH_USED __attribute__((used)) 182 #else 183 #ifdef __QAC__ 184 #define PH_ZI_DATA_SECTION(SECTIONNAME) static void(SECTIONNAME)() 185 #define PH_RO_DATA_SECTION(SECTIONNAME) static void(SECTIONNAME)() 186 #define PH_CODE_SECTION(SECTIONNAME) static void(SECTIONNAME)() 187 #else 188 #define PH_ZI_DATA_SECTION(SECTIONNAME) 189 #define PH_RO_DATA_SECTION(SECTIONNAME) 190 #define PH_CODE_SECTION(SECTIONNAME) 191 #endif 192 #define PH_PLACE_ZI_DATA_TO_SECTION(SECTIONNAME) 193 #define PH_PLACE_RO_DATA_TO_SECTION(SECTIONNAME) 194 #define PH_PLACE_FUNCTION_TO_SECTION(SECTIONNAME) 195 #define PH_ALIGN(a) 196 #define PH_USED 197 #define PH_PACK_STRUCT_BEGIN 198 #define PH_PACK_STRUCT_END __attribute__((__packed__)) 199 #endif 200 /*********************************************************************************************************************/ 201 /* GLOBAL DEFINES */ 202 /*********************************************************************************************************************/ 203 #define PHHBCI_LEN_HDR (4U) 204 #define PHHBCI_LEN_LRC (1U) 205 #define PHHBCI_MAX_LEN_DATA_MOSI (2048U) 206 #define PHHBCI_MAX_LEN_PAYLOAD_MOSI (PHHBCI_MAX_LEN_DATA_MOSI + PHHBCI_LEN_LRC) 207 #define PHHBCI_MAX_LEN_DATA_MISO (256U) 208 #define PHHBCI_MAX_LEN_PAYLOAD_MISO (PHHBCI_MAX_LEN_DATA_MISO + PHHBCI_LEN_LRC) 209 210 #define PHHBCI_CLASS_MASK (0xF0U) 211 #define PHHBCI_SUBCLASS_MASK (0x0FU) 212 #define PHHBCI_ERROR_STATUS_MASK (0x80U) 213 #define PHHBCI_APDU_SEG_FLAG (0x8000U) 214 215 #define PHHBCI_HELIOS_CHIP_ID_SZ (16U) 216 #define PHHBCI_HELIOS_ID_SZ (4U) 217 #define PHHBCI_HELIOS_CA_ROOT_PUB_KEY_SZ (64U) 218 #define PHHBCI_HELIOS_NXP_PUB_KEY_SZ (64U) 219 #define PHHBCI_HELIOS_ROM_VERSION_SZ (1U) 220 #define PHHBCI_HELIOS_OTP_AUTOLOAD_INFO_SZ (44U) 221 222 #define PHHBCI_MODE_LEN_MSB_OFFSET (3U) 223 #define PHHBCI_MODE_LEN_LSB_OFFSET (2U) 224 #define PHHBCI_MODE_CHIP_ID_OFFSET (8U) 225 #define PHHBCI_MODE_DEV_LIFE_CYCLE_INFO_OFFSET (39U) 226 227 #define PHHBCI_HELIOS_DEV_KEY 0x00 228 #define PHHBCI_HELIOS_PROD_KEY_1 0x0F 229 #define PHHBCI_HELIOS_PROD_KEY_2 0x3F 230 231 #define HELIOS_MAX_SRAM_SZ (256 * 1024U) 232 233 234 /* Patch ROM */ 235 #define PHHBCI_PATCHROM_SINGLE_ENTRY_SZ (sizeof(uint32_t) * 3U) 236 #define PHHBCI_PATCHROM_MAX_PATCH_TABLE_ENTRIES (48 + 1U) 237 #define PHHBCI_PATCHROM_MAX_PATCH_CODE_SZ (64 * 1024U) 238 #define PHHBCI_PATCHROM_SIGNATURE_SZ (3072U >> 3) 239 #define PHHBCI_PATCHROM_MAX_PATCH_TABLE_SZ \ 240 (PHHBCI_PATCHROM_SINGLE_ENTRY_SZ * PHHBCI_PATCHROM_MAX_PATCH_TABLE_ENTRIES) 241 242 /*#define PHHBCI_PATCHROM_MAX_IMAGE_SZ \ 243 ( sizeof(phHbci_PatchROMInfo_t) \ 244 + PHHBCI_PATCHROM_MAX_PATCH_TABLE_SZ \ 245 + PHHBCI_PATCHROM_MAX_PATCH_CODE_SZ \ 246 + PHHBCI_PATCHROM_SIGNATURE_SZ )*/ 247 #define PHHBCI_PATCHROM_MAX_IMAGE_SZ HELIOS_MAX_SRAM_SZ 248 249 typedef enum phHbci_Status { 250 phHbci_Success = 0x00, 251 phHbci_Failure = 0x01, 252 phHbci_File_Not_found = 0x14 253 254 } phHbci_Status_t; 255 /*********************************************************************************************************************/ 256 /* GLOBAL DATATYPES */ 257 /*********************************************************************************************************************/ 258 constexpr uint8_t phHbci_Class_General = 0x00; 259 constexpr uint8_t phHbci_Class_Patch_ROM = 0x20; 260 constexpr uint8_t phHbci_Class_HIF_Image = 0x50; 261 constexpr uint8_t phHbci_Class_IM4_Image = 0x60; 262 263 constexpr uint8_t phHbci_SubClass_Query = 0x01; 264 constexpr uint8_t phHbci_SubClass_Answer = 0x02; 265 constexpr uint8_t phHbci_SubClass_Command = 0x03; 266 constexpr uint8_t phHbci_SubClass_Ack = 0x04; 267 268 typedef enum phHbci_Ack { 269 phHbci_Valid_APDU = 0x01, 270 271 phHbci_Invalid_LRC = 0x81, 272 phHbci_Invlaid_Class = 0x82, 273 phHbci_Invalid_Instruction = 0x83, 274 phHbci_Invalid_Segment_Length = 0x84 275 276 } phHbci_Ack_t; 277 typedef struct phHbci_MosiApdu { 278 uint8_t cls; 279 uint8_t ins; 280 uint16_t len; 281 uint8_t payload[PHHBCI_MAX_LEN_PAYLOAD_MOSI]; 282 283 } phHbci_MosiApdu_t; 284 285 typedef struct phHbci_MisoApdu { 286 uint8_t cls; 287 uint8_t ins; 288 uint16_t len; 289 uint8_t payload[PHHBCI_MAX_LEN_PAYLOAD_MISO]; 290 291 } phHbci_MisoApdu_t; 292 293 typedef struct phPalSr100_Config { 294 int8_t* pDevName; 295 296 uint32_t dwBaudRate; 297 298 void* pDevHandle; 299 /*!< Device handle output */ 300 } phPalSr100_Config_t, *pphPalSr100_Config_t; 301 typedef enum Link { 302 Link_SPI, 303 Link_I3C, 304 305 Link_Default = Link_SPI 306 307 } Link_t; 308 309 typedef enum Mode { 310 Mode_Patch_ROM = 1, 311 Mode_HIF_Image, 312 313 Mode_Default = Mode_HIF_Image 314 315 } Mode_t; 316 317 typedef enum Capture { 318 Capture_Off, 319 Capture_Apdu, 320 Capture_Apdu_With_Dummy_Miso, 321 322 Capture_Default = Capture_Off 323 324 } Capture_t; 325 326 typedef struct Options { 327 char* imgFile; 328 FILE* fImg; 329 char* mosiFile; 330 FILE* fMosi; 331 char* misoFile; 332 FILE* fMiso; 333 Link_t link; 334 Mode_t mode; 335 Capture_t capture; 336 337 } Options_t; 338 339 /***** eClass_General *****/ 340 341 typedef enum phHbci_General_Query { 342 phHbci_General_Qry_Status = 0x21, 343 344 phHbci_General_Qry_Chip_ID = 0x31, 345 phHbci_General_Qry_Helios_ID = 0x32, 346 //phHbci_General_Qry_CA_Root_Pub_Key = 0x33, 347 phHbci_General_Qry_NXP_Pub_Key = 0x33, 348 phHbci_General_Qry_ROM_Version = 0x34, 349 phHbci_General_Qry_Fw_Dwnld_Root_Key = 0x35, 350 phHbci_General_Qry_OTP_AutoLoad_Info = 0x36, 351 352 } phHbci_General_Query_t; 353 354 typedef enum phHbci_General_Answer { 355 phHbci_General_Ans_HBCI_Ready = phHbci_General_Qry_Status, 356 phHbci_General_Ans_Mode_Patch_ROM_Ready = 0x23, 357 phHbci_General_Ans_Mode_HIF_Image_Ready = 0x24, 358 phHbci_General_Ans_Mode_IM4_Image_Ready = 0x25, 359 360 phHbci_General_Ans_Chip_ID = phHbci_General_Qry_Chip_ID, 361 phHbci_General_Ans_Helios_ID = phHbci_General_Qry_Helios_ID, 362 //phHbci_General_Ans_CA_Root_Pub_Key = phHbci_General_Qry_CA_Root_Pub_Key, 363 phHbci_General_Ans_NXP_Pub_Key = phHbci_General_Qry_NXP_Pub_Key, 364 phHbci_General_Ans_ROM_Version = phHbci_General_Qry_ROM_Version, 365 phHbci_General_Ans_Fw_Dwnld_Root_Key = phHbci_General_Qry_Fw_Dwnld_Root_Key, 366 phHbci_General_Ans_OTP_AutoLoad_Info = phHbci_General_Qry_OTP_AutoLoad_Info, 367 368 phHbci_General_Ans_Boot_Success = 0x41, 369 370 phHbci_General_Ans_Boot_Autoload_Fail = 0xD1, 371 phHbci_General_Ans_Boot_GPIOConf_CRC_Fail = 0xD2, 372 phHbci_General_Ans_Boot_TRIM_CRC_Fail = 0xD3, 373 phHbci_General_Ans_Boot_GPIOTRIM_CRC_Fail = 0xD4, 374 375 phHbci_General_Ans_HBCI_Fail = 0xE1, 376 phHbci_General_Ans_Mode_Patch_ROM_Fail = 0xE3, 377 phHbci_General_Ans_Mode_HIF_Image_Fail = 0xE4, 378 phHbci_General_Ans_Mode_IM4_Image_Fail = 0xE5 379 380 } phHbci_General_Answer_t; 381 382 typedef enum phHbci_General_Command { 383 phHbci_General_Cmd_Mode_Patch_ROM = phHbci_General_Ans_Mode_Patch_ROM_Ready, 384 phHbci_General_Cmd_Mode_HIF_Image = phHbci_General_Ans_Mode_HIF_Image_Ready, 385 phHbci_General_Cmd_Mode_IM4_Image = phHbci_General_Ans_Mode_IM4_Image_Ready 386 387 } phHbci_General_Command_t; 388 389 phHbci_MosiApdu_t gphHbci_MosiApdu; 390 phHbci_MisoApdu_t gphHbci_MisoApdu; 391 phPalSr100_Config_t tPalConfig; 392 Options_t gOpts; 393 394 uint8_t gDummyMiso[PHHBCI_MAX_LEN_PAYLOAD_MISO]; 395 396 phHbci_Status_t phHbci_GetStatus(void); 397 phHbci_Status_t phHbci_GeneralStatus(phHbci_General_Command_t mode); 398 phHbci_Status_t phHbci_QueryInfo(uint8_t* pInfo, uint32_t* pInfoSz, 399 uint32_t maxSz, bool matchMaxSz); 400 phHbci_Status_t phHbci_GetGeneralInfo(uint8_t* pInfo, uint32_t* pInfoSz); 401 phHbci_Status_t phHbci_GetInfo(uint8_t* pInfo, uint32_t* pInfoSz); 402 phHbci_Status_t phHbci_PutCommand(uint8_t* pImg, uint32_t imgSz); 403 404 uint8_t phHbci_CalcLrc(uint8_t* pBuf, uint16_t bufSz); 405 int printUsage(char* pProg); 406 int cMain(int argc, char* argv[]); 407 int cppGetApdu(uint8_t* pApdu, uint16_t sz); 408 int cppPutApdu(uint8_t* pApdu, uint16_t sz); 409 int cppWaitForGPIOEvent(uint32_t timeoutMs); 410 void cppResetGPIOEvent(void); 411 phHbci_Status_t phHbci_GetApdu(uint8_t* pApdu, uint16_t sz); 412 phHbci_Status_t phHbci_PutApdu(uint8_t* pApdu, uint16_t sz); 413 phHbci_Status_t phHbci_Master(phHbci_General_Command_t mode, uint8_t* pImg, 414 uint32_t imgSz); 415 416 typedef struct phHbci_PatchROMInfo { 417 uint32_t patchFileMarker; 418 uint32_t offsetRAM; 419 uint32_t szPatchCode; 420 uint16_t numPatchTableEntries; 421 uint16_t szSignatureBuf; 422 423 } phHbci_PatchROMInfo_t; 424 425 /* HIF Image */ 426 //#define PHHIF_MAX_IMAGE_SZ ((256-32)*1024U) 427 #define PHHIF_MAX_IMAGE_SZ HELIOS_MAX_SRAM_SZ 428 429 /*********************************************************************************************************************/ 430 /* GLOBAL MACROS */ 431 /*********************************************************************************************************************/ 432 #define PHHBCI_PEEK32(w32, w8) \ 433 do { \ 434 w32 = ((uint32_t)(w8[3]) << 24) | ((uint32_t)(w8[2]) << 16) | \ 435 ((uint32_t)(w8[1]) << 8) | w8[0]; \ 436 } while (0) 437 438 #define PHHBCI_READ32(w32, w8) \ 439 do { \ 440 PHHBCI_PEEK32(w32, w8); \ 441 w8 += sizeof(w32); \ 442 } while (0) 443 444 /***** eClass_Patch_ROM *****/ 445 446 typedef enum phHbci_Patch_ROM_Query { 447 phHbci_Patch_ROM_Qry_Patch_Status = 0x01 448 449 } phHbci_Patch_ROM_Query_t; 450 451 typedef enum phHbci_Patch_ROM_Answer { 452 phHbci_Patch_ROM_Ans_Patch_Success = phHbci_Patch_ROM_Qry_Patch_Status, 453 454 phHbci_Patch_ROM_Ans_File_Too_Large = 0x81, 455 phHbci_Patch_ROM_Ans_Invalid_Patch_File_Marker = 0x82, 456 phHbci_Patch_ROM_Ans_Too_Many_Patch_Table_Entries = 0x83, 457 phHbci_Patch_ROM_Ans_Invalid_Patch_Code_Size = 0x84, 458 phHbci_Patch_ROM_Ans_Invalid_Global_Patch_Marker = 0x85, 459 phHbci_Patch_ROM_Ans_Invalid_Signature_Size = 0x86, 460 phHbci_Patch_ROM_Ans_Invalid_Signature = 0x87 461 462 } phHbci_Patch_ROM_Answer_t; 463 464 typedef enum phHbci_Patch_ROM_Command { 465 phHbci_Patch_ROM_Cmd_Download_Patch = phHbci_Patch_ROM_Qry_Patch_Status 466 467 } phHbci_Patch_ROM_Command_t; 468 469 /***** eClass_HIF_Image *****/ 470 471 typedef enum phHbci_HIF_Image_Query { 472 phHbci_HIF_Image_Qry_Image_Status = 0x01 473 474 } phHbci_HIF_Image_Query_t; 475 476 typedef enum phHbci_HIF_Image_Answer { 477 phHbci_HIF_Image_Ans_Image_Success = phHbci_HIF_Image_Qry_Image_Status, 478 phHbci_HIF_Image_Ans_Header_Success = 0x04, 479 phHbci_HIF_Image_Ans_Quickboot_Settings_Success = 0x05, 480 phHbci_HIF_Image_Ans_Execution_Settings_Success = 0x06, 481 482 phHbci_HIF_Image_Ans_Header_Too_Large = 0x81, 483 phHbci_HIF_Image_Ans_Header_Parse_Error = 0x82, 484 phHbci_HIF_Image_Ans_Invalid_Cipher_Type_Crypto = 0x83, 485 phHbci_HIF_Image_Ans_Invalid_Cipher_Type_Mode = 0x84, 486 phHbci_HIF_Image_Ans_Invalid_Cipher_Type_Hash = 0x85, 487 phHbci_HIF_Image_Ans_Invalid_Cipher_Type_Curve = 0x86, 488 phHbci_HIF_Image_Ans_Invalid_ECC_Key_Length = 0x87, 489 phHbci_HIF_Image_Ans_Invalid_Payload_Description = 0x88, 490 phHbci_HIF_Image_Ans_Invalid_Firmware_Version = 0x89, 491 phHbci_HIF_Image_Ans_Invalid_ECID_Mask = 0x8A, 492 phHbci_HIF_Image_Ans_Invalid_ECID_Value = 0x8B, 493 phHbci_HIF_Image_Ans_Invalid_Encrypted_Payload_Hash = 0x8C, 494 phHbci_HIF_Image_Ans_Invalid_Header_Signature = 0x8D, 495 phHbci_HIF_Image_Ans_Install_Settings_Too_Large = 0x8E, 496 phHbci_HIF_Image_Ans_Install_Settings_Parse_Error = 0x8F, 497 phHbci_HIF_Image_Ans_Payload_Too_Large = 0x90, 498 phHbci_HIF_Image_Ans_Quickboot_Settings_Parse_Error = 0x91, 499 phHbci_HIF_Image_Ans_Invalid_Static_Hash = 0x92, 500 phHbci_HIF_Image_Ans_Invalid_Dynamic_Hash = 0x93, 501 phHbci_HIF_Image_Ans_Execution_Settings_Parse_Error = 0x94, 502 phHbci_HIF_Image_Ans_Key_Read_Error = 0x95 503 504 } phHbci_HIF_Image_Answer_t; 505 506 typedef enum phHbci_HIF_Image_Command { 507 phHbci_HIF_Image_Cmd_Download_Image = phHbci_HIF_Image_Qry_Image_Status 508 509 } phHbci_HIF_Image_Command_t; 510 511 /***** eClass_IM4_Image *****/ 512 513 typedef enum phHbci_IM4_Image_Query { 514 phHbci_IM4_Image_Qry_IM4_Status = 0x01, 515 phHbci_IM4_Image_Qry_IM4M_Status = 0x02, 516 phHbci_IM4_Image_Qry_IM4P_Status = 0x03, 517 phHbci_IM4_Image_Qry_File_Descriptor_Status = 0x04, 518 phHbci_IM4_Image_Qry_Payload_Status = 0x05 519 520 } phHbci_IM4_Image_Query_t; 521 522 typedef enum phHbci_IM4_Image_Answer { 523 phHbci_IM4_Image_Ans_IM4_Success = phHbci_IM4_Image_Qry_IM4_Status, 524 phHbci_IM4_Image_Ans_IM4M_Success = phHbci_IM4_Image_Qry_IM4M_Status, 525 phHbci_IM4_Image_Ans_IM4P_Success = phHbci_IM4_Image_Qry_IM4P_Status, 526 phHbci_IM4_Image_Ans_File_Descriptor_Success = 527 phHbci_IM4_Image_Qry_File_Descriptor_Status, 528 phHbci_IM4_Image_Ans_Payload_Success = phHbci_IM4_Image_Qry_Payload_Status, 529 530 phHbci_IM4_Image_Ans_IM4M_Too_Large = 0x81, 531 phHbci_IM4_Image_Ans_IM4M_Parse_Error = 0x82, 532 phHbci_IM4_Image_Ans_Invalid_Chip_ID = 0x83, 533 phHbci_IM4_Image_Ans_Invalid_Helios_ID = 0x84, 534 phHbci_IM4_Image_Ans_Invalid_IM4M_Leaf_Certificate = 0x85, 535 phHbci_IM4_Image_Ans_Invalid_IM4M_Manifest_Signature = 0x86, 536 phHbci_IM4_Image_Ans_IM4P_Too_Large = 0x87, 537 phHbci_IM4_Image_Ans_Invalid_IM4P_Hash = 0x88, 538 phHbci_IM4_Image_Ans_IM4P_Parse_Error = 0x89, 539 phHbci_IM4_Image_Ans_Invalid_IM4P_Signature = 0x8A, 540 phHbci_IM4_Image_Ans_File_Descriptor_Too_Large = 0x8B, 541 phHbci_IM4_Image_Ans_Invalid_File_Descriptor = 0x8C, 542 phHbci_IM4_Image_Ans_Payload_Too_Large = 0x8D, 543 phHbci_IM4_Image_Ans_Invalid_Encrypted_Payload_Hash = 0x8E, 544 phHbci_IM4_Image_Ans_Invalid_Download_Settings = 0x8F 545 546 } phHbci_IM4_Image_Answer_t; 547 548 typedef enum phHbci_IM4_Image_Command { 549 phHbci_IM4_Image_Cmd_Download_IM4 = phHbci_IM4_Image_Qry_IM4_Status, 550 phHbci_IM4_Image_Cmd_Download_IM4M = phHbci_IM4_Image_Qry_IM4M_Status, 551 phHbci_IM4_Image_Cmd_Download_IM4P = phHbci_IM4_Image_Qry_IM4P_Status, 552 phHbci_IM4_Image_Cmd_Download_File_Descriptor = 553 phHbci_IM4_Image_Qry_File_Descriptor_Status, 554 phHbci_IM4_Image_Cmd_Download_Payload = phHbci_IM4_Image_Qry_Payload_Status 555 556 } phHbci_IM4_Image_Command_t; 557 558 //#pragma pack(push, 1) 559 560 //#pragma pack(pop) 561 #endif /* _PHNXPUCIHAL_FW_H */ 562