| /art/runtime/interpreter/mterp/armng/ |
| D | other.S | 6 mov r3, rINST, lsr #8 @ r3<- AA
9 FETCH_ADVANCE_INST 3 @ advance rPC, load rINST
11 GET_INST_OPCODE ip @ extract opcode from rINST
18 mov r3, rINST, lsr #8 @ r3<- AA
19 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST
21 GET_INST_OPCODE ip @ extract opcode from rINST
26 sbfx r1, rINST, #12, #4 @ r1<- sssssssB (sign-extended)
27 ubfx r0, rINST, #8, #4 @ r0<- A
28 FETCH_ADVANCE_INST 1 @ advance rPC, load rINST
29 GET_INST_OPCODE ip @ ip<- opcode from rINST
[all …]
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| D | arithmetic.S | 19 mov r4, rINST, lsr #8 @ r4<- AA
29 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST
32 GET_INST_OPCODE ip @ extract opcode from rINST
53 mov r3, rINST, lsr #12 @ r3<- B
54 ubfx r4, rINST, #8, #4 @ r4<- A
61 FETCH_ADVANCE_INST 1 @ advance rPC, load rINST
65 GET_INST_OPCODE ip @ extract opcode from rINST
85 mov r2, rINST, lsr #12 @ r2<- B
86 ubfx r4, rINST, #8, #4 @ r4<- A
92 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST
[all …]
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| D | control_flow.S | 9 mov r1, rINST, lsr #12 @ r1<- B
10 ubfx r0, rINST, #8, #4 @ r0<- A
13 FETCH_S rINST, 1 @ rINST<- branch offset, in code units
20 FETCH_S rINST, 1 // rINST<- branch offset, in code units
31 mov r0, rINST, lsr #8 @ r0<- AA
33 FETCH_S rINST, 1 @ rINST<- branch offset, in code units
40 FETCH_S rINST, 1 // rINST<- branch offset, in code units
51 sbfx rINST, rINST, #8, #8 // rINST<- ssssssAA (sign-extended)
62 FETCH_S rINST, 1 // wINST<- ssssAAAA (sign-extended)
78 orrs rINST, r0, r1, lsl #16 // wINST<- AAAAaaaa
[all …]
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| D | array.S | 9 mov r4, rINST, lsr #8 @ r4<- AA
19 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST
24 GET_INST_OPCODE ip @ extract opcode from rINST
32 GET_INST_OPCODE ip @ extract opcode from rINST
39 GET_INST_OPCODE ip @ extract opcode from rINST
71 mov r4, rINST, lsr #8 @ r4<- AA
82 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST
85 GET_INST_OPCODE ip @ extract opcode from rINST
89 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST
91 GET_INST_OPCODE ip @ extract opcode from rINST
[all …]
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| D | floating_point.S | 11 mov r4, rINST, lsr #8 @ r4<- AA
19 FETCH_ADVANCE_INST 2 @ advance rPC, load rINST
21 GET_INST_OPCODE ip @ extract opcode from rINST
34 mov r3, rINST, lsr #12 @ r3<- B
35 ubfx r4, rINST, #8, #4 @ r4<- A
39 FETCH_ADVANCE_INST 1 @ advance rPC, load rINST
42 GET_INST_OPCODE ip @ extract opcode from rINST
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| D | main.S | 80 #define rINST r7 macro
105 ldrh rINST, [rPC]
121 ldrh rINST, [rPC, #((\count)*2)]!
130 ldrh rINST, [rPC, #((\count)*2)]
144 ldrh rINST, [rPC, \reg]!
174 and \reg, rINST, #255
301 add rPC, rPC, rINST, lsl #1
303 cmp rINST, #0
404 FETCH_CODE_ITEM_INFO \code_item, rINST, \refs, r4, \load_ins
408 add ip, \refs, rINST, lsl #1
[all …]
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| D | object.S | 6 lsr r2, rINST, #8 // r2<- A
78 lsr r2, rINST, #12 // r2<- B
90 ubfx r1, rINST, #8, #4 // r1<- A
167 lsr r2, rINST, #12 // r2<- B
169 ubfx r2, rINST, #8, #4 // r2<- A
207 lsr r2, rINST, #12 // r2<- B
209 ubfx r2, rINST, #8, #4 // r2<- A
255 ubfx r4, rINST, #8, #4 // r4<- A
261 lsr r1, rINST, #12 // r1<- B
266 ubfx r4, rINST, #8, #4 // r4<- A
[all …]
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| /art/runtime/interpreter/mterp/x86ng/ |
| D | control_flow.S | 10 movl rINST, %ecx # rcx <- A+
11 sarl $$4, rINST # rINST <- B
14 cmpl VREG_ADDRESS(rINST), %eax # compare (vA, vB)
16 movswl 2(rPC), rINST # Get signed branch offset
30 cmpl $$0, VREG_ADDRESS(rINST) # compare (vA, 0)
32 movswl 2(rPC), rINST # fetch signed displacement
45 movsbl rINSTbl, rINST # rINST <- ssssssAA
56 movswl 2(rPC), rINST # rINST <- ssssAAAA
67 movl 2(rPC), rINST # rINST <- AAAAAAAA
119 GET_VREG ARG1, rINST # ecx <- vAA
[all …]
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| D | other.S | 7 SET_VREG %eax, rINST # vAA<- eax
13 SET_VREG %ecx, rINST # vAA <- ssssBBBB
19 andl MACRO_LITERAL(0xf), rINST # rINST <- A
21 SET_VREG %eax, rINST
28 SET_VREG %eax, rINST # vAA <- eax
37 SET_VREG_OBJECT %eax, rINST # vAA <- value
76 movl 6(rPC), rINST # rINST <- msw
78 SET_VREG_HIGH rINST, %ecx
86 SET_VREG_HIGH rIBASE, rINST # store msw
87 SET_VREG %eax, rINST # store lsw
[all …]
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| D | arithmetic.S | 49 SET_VREG $result, rINST
63 andb $$0xf, rINSTbl # rINST <- A
64 GET_VREG %eax, rINST # eax <- vBB
72 SET_VREG $result, rINST
81 SET_VREG $result, rINST
96 andb $$0xf, rINSTbl # rINST <- A
104 SET_VREG %eax, rINST
111 SET_VREG $result, rINST
131 SET_VREG %eax, rINST
138 SET_VREG $result, rINST
[all …]
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| D | floating_point.S | 34 SET_VREG %eax, rINST
43 sarl $$4, rINST # rINST <- B
44 $load VREG_ADDRESS(rINST) # %st0 <- vB
61 SET_VREG_XMM${suff} %xmm0, rINST # vAA <- %xmm0
63 vmovs${suff} %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
66 SET_VREG_XMM${suff} %xmm0, rINST # vAA <- %xmm0
68 movs${suff} %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
76 sarl $$4, rINST # rINST<- B
78 v${instr}${suff} VREG_ADDRESS(rINST), %xmm0, %xmm0
81 vmovs${suff} %xmm0, VREG_REF_ADDRESS(rINST) # clear ref
[all …]
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| D | array.S | 19 SET_WIDE_FP_VREG %xmm0, rINST # vAA <- xmm0
27 SET_VREG_OBJECT %eax, rINST
36 SET_VREG %eax, rINST
75 GET_WIDE_FP_VREG %xmm0, rINST # xmm0 <- vAA
78 GET_VREG rINST, rINST
108 GET_VREG %edx, rINST
117 movl rINST, %eax # eax <- BA
118 sarl $$4, rINST # rINST <- B
119 GET_VREG %ecx, rINST # ecx <- vB (object ref)
123 movl MIRROR_ARRAY_LENGTH_OFFSET(%ecx), rINST
[all …]
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| D | main.S | 53 #define rINST %ebx macro
162 movzwl (rPC), rINST
166 movzbl 1(rPC), rINST
174 movzbl rINSTbh,rINST
300 leal (rPC, rINST, 2), rPC
302 testl rINST, rINST
1301 GET_VREG rINST, %ecx
1302 UPDATE_REGISTERS_FOR_STRING_INIT rINST, %eax
1498 GET_VREG rINST, %ecx
1499 UPDATE_REGISTERS_FOR_STRING_INIT rINST, %eax
[all …]
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| D | object.S | 6 GET_VREG %eax, rINST
56 andb $$0xf,rINSTbl # rINST<- A
57 SET_VREG %eax, rINST # fp[A] <- value
|
| /art/runtime/interpreter/mterp/x86_64ng/ |
| D | arithmetic.S | 66 movl rINST, %ecx # rcx <- BA
68 andb $$0xf, rINSTbl # rINST <- A
128 movl rINST, %eax # rax <- 000000BA
132 andb $$0xf, rINSTbl # rINST <- A
226 movl rINST, %ecx # rcx <- A+
227 sarl $$4, rINST # rINST <- B
245 movl rINST, %eax # rax <- 000000BA
248 andb $$0xf, rINSTbl # rINST <- A
290 movl rINST, %ecx # rcx <- A+
291 sarl $$4, rINST # rINST <- B
[all …]
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| D | floating_point.S | 42 movl rINST, %ecx # rcx <- A+
43 sarl $$4, rINST # rINST <- B
73 movl rINST, %ecx # ecx <- A+
76 sarl $$4, rINST # rINST<- B
193 sarl $$4, rINST # rINST <- B
226 sarl $$4, rINST # rINST <- B
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| D | other.S | 19 andl MACRO_LITERAL(0xf), rINST # rINST <- A
124 movl rINST, %eax # eax <- BA
126 shrl $$4, rINST # rINST <- B
197 movl rINST, %ecx # ecx <- BA
198 sarl $$4, rINST # rINST <- B
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| D | array.S | 77 GET_VREG rINST, rINSTq
115 movl rINST, %eax # eax <- BA
116 sarl $$4, rINST # rINST <- B
121 movl MIRROR_ARRAY_LENGTH_OFFSET(%rcx), rINST
122 SET_VREG rINST, %rax
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| D | control_flow.S | 10 movl rINST, %ecx # rcx <- A+
11 sarl $$4, rINST # rINST <- B
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| D | main.S | 69 #define rINST %ebx macro
122 movzbl rINSTbh,rINST
1538 GET_WIDE_VREG rINSTq, rINSTq # rINST <- v[A]
1540 GET_VREG rINST, rINSTq # rINST <- v[A]
1562 GET_WIDE_VREG rINSTq, rINSTq # rINST <- v[A]
1564 GET_VREG rINST, rINSTq # rINST <- v[A]
1625 andb $$0xf,rINSTbl # rINST <- A
1958 andb $$0xf,rINSTbl # rINST<- A
1975 movl rINST, %ebp # rbp <- BA
1978 sarl $$4, rINST
[all …]
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| D | object.S | 95 andb $$0xf,rINSTbl # rINST<- A
|