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Searched refs:InAt (Results 1 – 25 of 25) sorted by relevance

/art/compiler/optimizing/
Dcode_generator_vector_x86.cc78 __ movd(dst, locations->InAt(0).AsRegister<Register>()); in VisitVecReplicateScalar()
86 __ movd(dst, locations->InAt(0).AsRegister<Register>()); in VisitVecReplicateScalar()
92 __ movd(dst, locations->InAt(0).AsRegister<Register>()); in VisitVecReplicateScalar()
98 __ movd(dst, locations->InAt(0).AsRegisterPairLow<Register>()); in VisitVecReplicateScalar()
99 __ movd(tmp, locations->InAt(0).AsRegisterPairHigh<Register>()); in VisitVecReplicateScalar()
106 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecReplicateScalar()
111 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecReplicateScalar()
149 XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitVecExtractScalar()
175 DCHECK(locations->InAt(0).Equals(locations->Out())); // no code required in VisitVecExtractScalar()
217 XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitVecReduce()
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Dcode_generator_vector_x86_64.cc73 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ false); in VisitVecReplicateScalar()
81 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ false); in VisitVecReplicateScalar()
87 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ false); in VisitVecReplicateScalar()
92 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ true); in VisitVecReplicateScalar()
97 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecReplicateScalar()
102 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecReplicateScalar()
137 XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitVecExtractScalar()
158 DCHECK(locations->InAt(0).Equals(locations->Out())); // no code required in VisitVecExtractScalar()
200 XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitVecReduce()
246 XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitVecCnv()
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Dcode_generator_vector_arm_vixl.cc94 vixl32::DRegister src = DRegisterFrom(locations->InAt(0)); in VisitVecExtractScalar()
136 vixl32::DRegister src = DRegisterFrom(locations->InAt(0)); in VisitVecReduce()
173 vixl32::DRegister src = DRegisterFrom(locations->InAt(0)); in VisitVecNeg()
202 vixl32::DRegister src = DRegisterFrom(locations->InAt(0)); in VisitVecAbs()
229 vixl32::DRegister src = DRegisterFrom(locations->InAt(0)); in VisitVecNot()
276 vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0)); in VisitVecAdd()
277 vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1)); in VisitVecAdd()
306 vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0)); in VisitVecSaturationAdd()
307 vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1)); in VisitVecSaturationAdd()
338 vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0)); in VisitVecHalvingAdd()
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Dcode_generator_vector_arm64_neon.cc110 Location src_loc = locations->InAt(0); in VisitVecReplicateScalar()
196 VRegister src = VRegisterFrom(locations->InAt(0)); in VisitVecExtractScalar()
210 DCHECK(locations->InAt(0).Equals(locations->Out())); // no code required in VisitVecExtractScalar()
251 VRegister src = VRegisterFrom(locations->InAt(0)); in VisitVecReduce()
291 VRegister src = VRegisterFrom(locations->InAt(0)); in VisitVecCnv()
309 VRegister src = VRegisterFrom(locations->InAt(0)); in VisitVecNeg()
350 VRegister src = VRegisterFrom(locations->InAt(0)); in VisitVecAbs()
389 VRegister src = VRegisterFrom(locations->InAt(0)); in VisitVecNot()
440 VRegister lhs = VRegisterFrom(locations->InAt(0)); in VisitVecAdd()
441 VRegister rhs = VRegisterFrom(locations->InAt(1)); in VisitVecAdd()
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Dcode_generator_vector_arm64_sve.cc111 Location src_loc = locations->InAt(0); in VisitVecReplicateScalar()
193 const VRegister src = VRegisterFrom(locations->InAt(0)); in VisitVecExtractScalar()
204 DCHECK(locations->InAt(0).Equals(locations->Out())); // no code required in VisitVecExtractScalar()
246 const ZRegister src = ZRegisterFrom(locations->InAt(0)); in VisitVecReduce()
284 const ZRegister src = ZRegisterFrom(locations->InAt(0)); in VisitVecCnv()
304 const ZRegister src = ZRegisterFrom(locations->InAt(0)); in VisitVecNeg()
342 const ZRegister src = ZRegisterFrom(locations->InAt(0)); in VisitVecAbs()
378 const ZRegister src = ZRegisterFrom(locations->InAt(0)); in VisitVecNot()
437 const ZRegister lhs = ZRegisterFrom(locations->InAt(0)); in VisitVecAdd()
438 const ZRegister rhs = ZRegisterFrom(locations->InAt(1)); in VisitVecAdd()
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Dintrinsics_x86.cc107 Location length = locations->InAt(4); in EmitNativeCode()
172 Location input = locations->InAt(0); in MoveFPToInt()
187 Location input = locations->InAt(0); in MoveIntToFP()
285 Location input = locations->InAt(0); in VisitLongReverseBytes()
321 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitMathSqrt()
341 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in GenSSE41FPToFPIntrinsic()
394 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitMathRoundFloat()
409 if (locations->GetInputCount() == 2 && locations->InAt(1).IsValid()) { in VisitMathRoundFloat()
413 Register constant_area = locations->InAt(1).AsRegister<Register>(); in VisitMathRoundFloat()
500 Location src = locations->InAt(0); in GenLowestOneBit()
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Dintrinsics_x86_64.cc104 Location length = locations->InAt(4); in EmitNativeCode()
159 Location input = locations->InAt(0); in MoveFPToInt()
165 Location input = locations->InAt(0); in MoveIntToFP()
234 XmmRegister input = locations->InAt(0).AsFpuRegister<XmmRegister>(); in GenIsInfinite()
303 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitMathSqrt()
323 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in GenSSE41FPToFPIntrinsic()
376 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitMathRoundFloat()
417 XmmRegister in = locations->InAt(0).AsFpuRegister<XmmRegister>(); in VisitMathRoundDouble()
745 CpuRegister src = locations->InAt(0).AsRegister<CpuRegister>(); in SystemArrayCopyPrimitive()
746 Location src_pos = locations->InAt(1); in SystemArrayCopyPrimitive()
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Dintrinsics_riscv64.cc177 __ FMvXD(locations->Out().AsRegister<XRegister>(), locations->InAt(0).AsFpuRegister<FRegister>()); in VisitDoubleDoubleToRawLongBits()
187 __ FMvDX(locations->Out().AsFpuRegister<FRegister>(), locations->InAt(0).AsRegister<XRegister>()); in VisitDoubleLongBitsToDouble()
197 __ FMvXW(locations->Out().AsRegister<XRegister>(), locations->InAt(0).AsFpuRegister<FRegister>()); in VisitFloatFloatToRawIntBits()
207 __ FMvWX(locations->Out().AsFpuRegister<FRegister>(), locations->InAt(0).AsRegister<XRegister>()); in VisitFloatIntBitsToFloat()
218 __ FClassD(out, locations->InAt(0).AsFpuRegister<FRegister>()); in VisitDoubleIsInfinite()
231 __ FClassS(out, locations->InAt(0).AsFpuRegister<FRegister>()); in VisitFloatIsInfinite()
246 emit_op(locations->Out().AsRegister<XRegister>(), locations->InAt(0).AsRegister<XRegister>()); in EmitMemoryPeek()
304 emit_op(locations->InAt(1).AsRegister<XRegister>(), locations->InAt(0).AsRegister<XRegister>()); in EmitMemoryPoke()
388 GenerateReverseBytes(codegen, locations->Out(), locations->InAt(0).AsRegister<XRegister>(), type); in GenerateReverseBytes()
395 XRegister in = locations->InAt(0).AsRegister<XRegister>(); in GenerateReverse()
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Dintrinsics_arm64.cc189 Location input = locations->InAt(0); in MoveFPToInt()
196 Location input = locations->InAt(0); in MoveIntToFP()
289 Location in = locations->InAt(0); in GenReverseBytes()
323 Location in = locations->InAt(0); in GenNumberOfLeadingZeros()
350 Location in = locations->InAt(0); in GenNumberOfTrailingZeros()
378 Location in = locations->InAt(0); in GenReverse()
509 __ Fsqrt(DRegisterFrom(locations->Out()), DRegisterFrom(locations->InAt(0))); in VisitMathSqrt()
519 __ Frintp(DRegisterFrom(locations->Out()), DRegisterFrom(locations->InAt(0))); in VisitMathCeil()
529 __ Frintm(DRegisterFrom(locations->Out()), DRegisterFrom(locations->InAt(0))); in VisitMathFloor()
539 __ Frintn(DRegisterFrom(locations->Out()), DRegisterFrom(locations->InAt(0))); in VisitMathRint()
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Dcode_generator_x86.cc162 Location index_loc = locations->InAt(0); in EmitNativeCode()
163 Location length_loc = locations->InAt(1); in EmitNativeCode()
174 Location array_loc = array_length->GetLocations()->InAt(0); in EmitNativeCode()
333 Location source = instruction_->IsLoadClass() ? out : locations->InAt(0); in EmitNativeCode()
376 __ UnpoisonHeapReference(locations->InAt(1).AsRegister<Register>()); in EmitNativeCode()
386 x86_codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
389 locations->InAt(1), in EmitNativeCode()
462 locations->InAt(0), in EmitNativeCode()
467 locations->InAt(1), in EmitNativeCode()
472 locations->InAt(2), in EmitNativeCode()
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Dcode_generator_riscv64.cc385 codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
388 locations->InAt(1), in EmitNativeCode()
444 Location source = instruction_->IsLoadClass() ? out : locations->InAt(0); in EmitNativeCode()
585 locations->InAt(0), in EmitNativeCode()
590 locations->InAt(1), in EmitNativeCode()
595 locations->InAt(2), in EmitNativeCode()
635 codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
638 locations->InAt(1), in EmitNativeCode()
1387 Location cond_val = instruction->GetLocations()->InAt(condition_input_index); in GenerateTestAndBranch()
1432 Location second = locations->InAt(1); in DivRemOneOrMinusOne()
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Dcommon_arm.h112 return SRegisterFrom(instr->GetLocations()->InAt(input_index)); in InputSRegisterAt()
118 return DRegisterFrom(instr->GetLocations()->InAt(input_index)); in InputDRegisterAt()
141 return RegisterFrom(instr->GetLocations()->InAt(input_index), in InputRegisterAt()
200 return OperandFrom(instr->GetLocations()->InAt(input_index), in InputOperandAt()
Dcode_generator_x86_64.cc212 Location index_loc = locations->InAt(0); in EmitNativeCode()
213 Location length_loc = locations->InAt(1); in EmitNativeCode()
224 Location array_loc = array_length->GetLocations()->InAt(0); in EmitNativeCode()
342 Location source = instruction_->IsLoadClass() ? out : locations->InAt(0); in EmitNativeCode()
419 __ UnpoisonHeapReference(locations->InAt(1).AsRegister<CpuRegister>()); in EmitNativeCode()
429 codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
432 locations->InAt(1), in EmitNativeCode()
500 locations->InAt(0), in EmitNativeCode()
505 locations->InAt(1), in EmitNativeCode()
510 locations->InAt(2), in EmitNativeCode()
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Dcode_generator_arm_vixl.cc469 locations->InAt(0), in EmitNativeCode()
472 locations->InAt(1), in EmitNativeCode()
528 Location source = instruction_->IsLoadClass() ? out : locations->InAt(0); in EmitNativeCode()
608 codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
611 locations->InAt(1), in EmitNativeCode()
682 locations->InAt(0), in EmitNativeCode()
687 locations->InAt(1), in EmitNativeCode()
692 locations->InAt(2), in EmitNativeCode()
1192 const Location first = locations->InAt(0); in GenerateLongDataProc()
1193 const Location second = locations->InAt(1); in GenerateLongDataProc()
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Dssa_liveness_analysis.h144 Location location = GetUser()->GetLocations()->InAt(GetInputIndex()); in RequiresRegister()
331 } else if (!locations->InAt(input_index).IsValid()) {
962 && (locations->InAt(0).IsRegister() in DefinitionRequiresRegister()
963 || locations->InAt(0).IsRegisterPair() in DefinitionRequiresRegister()
964 || locations->InAt(0).GetPolicy() == Location::kRequiresRegister))) { in DefinitionRequiresRegister()
968 && (locations->InAt(0).IsFpuRegister() in DefinitionRequiresRegister()
969 || locations->InAt(0).IsFpuRegisterPair() in DefinitionRequiresRegister()
970 || locations->InAt(0).GetPolicy() == Location::kRequiresFpuRegister))) { in DefinitionRequiresRegister()
Dintrinsics_arm_vixl.cc179 Location input = locations->InAt(0); in MoveFPToInt()
189 Location input = locations->InAt(0); in MoveIntToFP()
261 Location in = locations->InAt(0); in GenNumberOfLeadingZeros()
309 vixl32::Register in_reg_lo = LowRegisterFrom(locations->InAt(0)); in GenNumberOfTrailingZeros()
310 vixl32::Register in_reg_hi = HighRegisterFrom(locations->InAt(0)); in GenNumberOfTrailingZeros()
323 vixl32::Register in = RegisterFrom(locations->InAt(0)); in GenNumberOfTrailingZeros()
424 __ Ldrsb(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0)))); in VisitMemoryPeekByte()
434 __ Ldr(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0)))); in VisitMemoryPeekIntNative()
444 vixl32::Register addr = LowRegisterFrom(invoke->GetLocations()->InAt(0)); in VisitMemoryPeekLongNative()
465 __ Ldrsh(OutputRegister(invoke), MemOperand(LowRegisterFrom(invoke->GetLocations()->InAt(0)))); in VisitMemoryPeekShortNative()
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Dcommon_arm64.h87 return RegisterFrom(instr->GetLocations()->InAt(input_index), in InputRegisterAt()
131 return FPRegisterFrom(instr->GetLocations()->InAt(input_index), in InputFPRegisterAt()
178 return OperandFrom(instr->GetLocations()->InAt(input_index), in InputOperandAt()
Dssa_liveness_analysis.cc112 bool has_in_location = current->GetLocations()->InAt(i).IsValid(); in RecursivelyProcessInputs()
225 DCHECK(!user->GetLocations()->InAt(index).IsValid()); in ComputeLiveRanges()
418 Location expected = locations->InAt(use.GetInputIndex()); in FindFirstRegisterHint()
Dcode_generator_arm64.cc229 codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
232 locations->InAt(1), in EmitNativeCode()
307 Location source = instruction_->IsLoadClass() ? out : locations->InAt(0); in EmitNativeCode()
457 codegen->EmitParallelMoves(locations->InAt(0), in EmitNativeCode()
460 locations->InAt(1), in EmitNativeCode()
525 locations->InAt(0), in EmitNativeCode()
530 locations->InAt(1), in EmitNativeCode()
535 locations->InAt(2), in EmitNativeCode()
2257 Location base_loc = locations->InAt(receiver_input); in HandleFieldGet()
2397 __ Ror(dst, lhs, RegisterFrom(instr->GetLocations()->InAt(1), type)); in HandleBinaryOp()
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Dregister_allocation_resolver.cc133 if (locations->InAt(0).IsUnallocated()) { in Resolve()
136 DCHECK(locations->InAt(0).Equals(source)); in Resolve()
342 Location expected_location = locations->InAt(use.GetInputIndex()); in ConnectSiblings()
Dintrinsics.h102 Location actual_loc = locations->InAt(i); in ART_INTRINSICS_WITH_HINVOKE_LIST()
Dcode_generator.cc116 DCHECK(CheckType(instruction->GetType(), locations->InAt(0))) in CheckTypeConsistency()
118 << " " << locations->InAt(0); in CheckTypeConsistency()
127 DCHECK(CheckType(inputs[i]->GetType(), locations->InAt(i))) in CheckTypeConsistency()
128 << inputs[i]->GetType() << " " << locations->InAt(i); in CheckTypeConsistency()
463 Location in_location = locations->InAt(i); in PrepareCriticalNativeArgumentMoves()
700 locations->InAt(is_instance ? 1 : 0), in GenerateUnresolvedFieldAccess()
Dregister_allocator_linear_scan.cc374 Location input = locations->InAt(i); in CheckForFixedInputs()
428 Location first = locations->InAt(0); in CheckForFixedOutput()
731 if (locations->InAt(i).IsValid()) { in TryAllocateFreeReg()
Dlocations.h552 Location InAt(uint32_t at) const { in InAt() function
Dgraph_visualizer.cc722 DumpLocation(input_list.NewEntryStream(), locations->InAt(i)); in PrintInstruction()