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Searched refs:clock (Results 1 – 25 of 114) sorted by relevance

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/device/google/contexthub/firmware/os/platform/stm32/
Di2c.c169 uint32_t clock; member
192 .clock = PERIPH_APB1_I2C1,
200 .clock = PERIPH_APB1_I2C2,
208 .clock = PERIPH_APB1_I2C3,
860 pwrUnitClock(PERIPH_BUS_APB1, cfg->clock, true); in i2cMasterRequest()
864 pwrUnitReset(PERIPH_BUS_APB1, cfg->clock, true); in i2cMasterRequest()
865 pwrUnitReset(PERIPH_BUS_APB1, cfg->clock, false); in i2cMasterRequest()
895 pwrUnitClock(PERIPH_BUS_APB1, cfg->clock, false); in i2cMasterRelease()
1021 pwrUnitClock(PERIPH_BUS_APB1, cfg->clock, false); in i2cSlaveRelease()
1048 pwrUnitClock(PERIPH_BUS_APB1, cfg->clock, true); in i2cSlaveEnableRx()
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/device/google/cuttlefish/host/commands/secure_env/rust/
Dlib.rs39 mod clock; module
97 let clock = clock::StdClock; in ta_main() localVariable
108 clock: Some(Box::new(clock)), in ta_main()
/device/generic/goldfish/gnss/
DGnssMeasurementInterface.cpp38 data.clock.gnssClockFlags = GnssClock::HAS_FULL_BIAS; in initGnssData()
39 data.clock.timeNs = timeNs; in initGnssData()
40 data.clock.fullBiasNs = fullBiasNs; in initGnssData()
41 data.clock.biasUncertaintyNs = biasUncertaintyNs; in initGnssData()
/device/generic/goldfish-opengl/system/hwc3/
DDrmMode.h38 const uint32_t clock; variable
58 : clock(info.clock), in DrmMode()
DDrmConnector.cpp181 return 1000.0f * mode->clock / ((float)mode->vtotal * (float)mode->htotal); in getRefreshRate()
/device/google/cuttlefish/tools/gigabyte-ampere-cuttlefish-installer/preseed/
Dpreseed.cfg38 # Controls whether or not the hardware clock is set to UTC.
39 d-i clock-setup/utc boolean true
45 # Controls whether to use NTP to set the clock during the install
46 d-i clock-setup/ntp boolean true
/device/google/gs-common/sensors/sepolicy/
Dhal_sensors_default.te24 # Allow access to the AoC clock and kernel boot time sys FS node. This is needed
25 # to synchronize the AP and AoC clock timestamps.
/device/google/sunfish/
Dinit.hardware.power_debug.rc.userdebug2 # Enable suspend clock reporting
/device/google/zuma-sepolicy/vendor/
Dchre.te8 # Allow CHRE to determine AoC's current clock
Dhal_camera_default.te64 # Allow camera HAL to query current device clock frequencies.
/device/google/zumapro-sepolicy/vendor/
Dchre.te8 # Allow CHRE to determine AoC's current clock
Dhal_camera_default.te65 # Allow camera HAL to query current device clock frequencies.
/device/google/gs101-sepolicy/whitechapel/vendor/google/
Dchre.te8 # Allow CHRE to determine AoC's current clock
Dhal_contexthub.te8 # Allow CHRE to determine AoC's current clock
Dhal_camera_default.te88 # Allow camera HAL to query current device clock frequencies.
/device/google/gs201-sepolicy/whitechapel_pro/
Dchre.te8 # Allow CHRE to determine AoC's current clock
Dhal_camera_default.te85 # Allow camera HAL to query current device clock frequencies.
/device/google/gs-common/chre/sepolicy/
Dhal_contexthub_default.te8 # Allow context hub HAL to determine AoC's current clock
/device/google/trout/tools/tracing/proto/
Dperfetto_trace.proto412 // Fix gpu clock rate during trace session.
1528 // Disable emitting clock timestamps into the trace.
1541 // The authoritative clock domain for the trace. Defaults to BOOTTIME. See
1545 // various data sources (and their chosen clock domains) to this domain
1549 // Time interval in between snapshotting of sync markers, clock snapshots,
1556 // clock should be used for periodic snapshots of service-emitted events.
1560 // Choosing a clock like this is done on best-effort basis; not all
1561 // platforms (e.g. Windows) expose a clock which can be used for periodic
1562 // tasks counting suspend. If such a clock is not available, the service
2052 // Timestamp [ns]. The clock source is CLOCK_REALTIME, unlike many other
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/device/google/coral-kernel/sm8150/original-kernel-headers/drm/
Ddrm_mode.h184 __u32 clock; member
/device/google/sunfish-kernel/sm7150/original-kernel-headers/drm/
Ddrm_mode.h184 __u32 clock; member
/device/google/coral-kernel/sm8150/kernel-headers/drm/
Ddrm_mode.h97 __u32 clock; member
/device/google/akita/location/gnssd/release/
Dgps.cfg60 # set shared reference clock for freq aiding (0x20)
/device/google/sunfish-kernel/sm7150/kernel-headers/drm/
Ddrm_mode.h97 __u32 clock; member
/device/google/caimito/location/ripcurrent24/userdebug/
Dgps.cfg65 # set shared reference clock for freq aiding (0x20)

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