1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _DRM_MODE_H 20 #define _DRM_MODE_H 21 #include "drm.h" 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 #define DRM_DISPLAY_INFO_LEN 32 26 #define DRM_CONNECTOR_NAME_LEN 32 27 #define DRM_DISPLAY_MODE_LEN 32 28 #define DRM_PROP_NAME_LEN 32 29 #define DRM_MODE_TYPE_BUILTIN (1 << 0) 30 #define DRM_MODE_TYPE_CLOCK_C ((1 << 1) | DRM_MODE_TYPE_BUILTIN) 31 #define DRM_MODE_TYPE_CRTC_C ((1 << 2) | DRM_MODE_TYPE_BUILTIN) 32 #define DRM_MODE_TYPE_PREFERRED (1 << 3) 33 #define DRM_MODE_TYPE_DEFAULT (1 << 4) 34 #define DRM_MODE_TYPE_USERDEF (1 << 5) 35 #define DRM_MODE_TYPE_DRIVER (1 << 6) 36 #define DRM_MODE_FLAG_PHSYNC (1 << 0) 37 #define DRM_MODE_FLAG_NHSYNC (1 << 1) 38 #define DRM_MODE_FLAG_PVSYNC (1 << 2) 39 #define DRM_MODE_FLAG_NVSYNC (1 << 3) 40 #define DRM_MODE_FLAG_INTERLACE (1 << 4) 41 #define DRM_MODE_FLAG_DBLSCAN (1 << 5) 42 #define DRM_MODE_FLAG_CSYNC (1 << 6) 43 #define DRM_MODE_FLAG_PCSYNC (1 << 7) 44 #define DRM_MODE_FLAG_NCSYNC (1 << 8) 45 #define DRM_MODE_FLAG_HSKEW (1 << 9) 46 #define DRM_MODE_FLAG_BCAST (1 << 10) 47 #define DRM_MODE_FLAG_PIXMUX (1 << 11) 48 #define DRM_MODE_FLAG_DBLCLK (1 << 12) 49 #define DRM_MODE_FLAG_CLKDIV2 (1 << 13) 50 #define DRM_MODE_FLAG_3D_MASK (0x1f << 14) 51 #define DRM_MODE_FLAG_3D_NONE (0 << 14) 52 #define DRM_MODE_FLAG_3D_FRAME_PACKING (1 << 14) 53 #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2 << 14) 54 #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3 << 14) 55 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4 << 14) 56 #define DRM_MODE_FLAG_3D_L_DEPTH (5 << 14) 57 #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6 << 14) 58 #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7 << 14) 59 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8 << 14) 60 #define DRM_MODE_PICTURE_ASPECT_NONE 0 61 #define DRM_MODE_PICTURE_ASPECT_4_3 1 62 #define DRM_MODE_PICTURE_ASPECT_16_9 2 63 #define DRM_MODE_FLAG_PIC_AR_MASK (0x0F << 19) 64 #define DRM_MODE_FLAG_PIC_AR_NONE (DRM_MODE_PICTURE_ASPECT_NONE << 19) 65 #define DRM_MODE_FLAG_PIC_AR_4_3 (DRM_MODE_PICTURE_ASPECT_4_3 << 19) 66 #define DRM_MODE_FLAG_PIC_AR_16_9 (DRM_MODE_PICTURE_ASPECT_16_9 << 19) 67 #define DRM_MODE_FLAG_SUPPORTS_RGB (1 << 23) 68 #define DRM_MODE_FLAG_SUPPORTS_YUV (1 << 24) 69 #define DRM_MODE_FLAG_VID_MODE_PANEL (1 << 29) 70 #define DRM_MODE_FLAG_CMD_MODE_PANEL (1 << 30) 71 #define DRM_MODE_FLAG_SEAMLESS (1 << 31) 72 #define DRM_MODE_DPMS_ON 0 73 #define DRM_MODE_DPMS_STANDBY 1 74 #define DRM_MODE_DPMS_SUSPEND 2 75 #define DRM_MODE_DPMS_OFF 3 76 #define DRM_MODE_SCALE_NONE 0 77 #define DRM_MODE_SCALE_FULLSCREEN 1 78 #define DRM_MODE_SCALE_CENTER 2 79 #define DRM_MODE_SCALE_ASPECT 3 80 #define DRM_MODE_DITHERING_OFF 0 81 #define DRM_MODE_DITHERING_ON 1 82 #define DRM_MODE_DITHERING_AUTO 2 83 #define DRM_MODE_DIRTY_OFF 0 84 #define DRM_MODE_DIRTY_ON 1 85 #define DRM_MODE_DIRTY_ANNOTATE 2 86 #define DRM_MODE_LINK_STATUS_GOOD 0 87 #define DRM_MODE_LINK_STATUS_BAD 1 88 #define DRM_MODE_ROTATE_0 (1 << 0) 89 #define DRM_MODE_ROTATE_90 (1 << 1) 90 #define DRM_MODE_ROTATE_180 (1 << 2) 91 #define DRM_MODE_ROTATE_270 (1 << 3) 92 #define DRM_MODE_ROTATE_MASK (DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270) 93 #define DRM_MODE_REFLECT_X (1 << 4) 94 #define DRM_MODE_REFLECT_Y (1 << 5) 95 #define DRM_MODE_REFLECT_MASK (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y) 96 struct drm_mode_modeinfo { 97 __u32 clock; 98 __u16 hdisplay; 99 __u16 hsync_start; 100 __u16 hsync_end; 101 __u16 htotal; 102 __u16 hskew; 103 __u16 vdisplay; 104 __u16 vsync_start; 105 __u16 vsync_end; 106 __u16 vtotal; 107 __u16 vscan; 108 __u32 vrefresh; 109 __u32 flags; 110 __u32 type; 111 char name[DRM_DISPLAY_MODE_LEN]; 112 }; 113 struct drm_mode_card_res { 114 __u64 fb_id_ptr; 115 __u64 crtc_id_ptr; 116 __u64 connector_id_ptr; 117 __u64 encoder_id_ptr; 118 __u32 count_fbs; 119 __u32 count_crtcs; 120 __u32 count_connectors; 121 __u32 count_encoders; 122 __u32 min_width; 123 __u32 max_width; 124 __u32 min_height; 125 __u32 max_height; 126 }; 127 struct drm_mode_crtc { 128 __u64 set_connectors_ptr; 129 __u32 count_connectors; 130 __u32 crtc_id; 131 __u32 fb_id; 132 __u32 x; 133 __u32 y; 134 __u32 gamma_size; 135 __u32 mode_valid; 136 struct drm_mode_modeinfo mode; 137 }; 138 #define DRM_MODE_PRESENT_TOP_FIELD (1 << 0) 139 #define DRM_MODE_PRESENT_BOTTOM_FIELD (1 << 1) 140 struct drm_mode_set_plane { 141 __u32 plane_id; 142 __u32 crtc_id; 143 __u32 fb_id; 144 __u32 flags; 145 __s32 crtc_x; 146 __s32 crtc_y; 147 __u32 crtc_w; 148 __u32 crtc_h; 149 __u32 src_x; 150 __u32 src_y; 151 __u32 src_h; 152 __u32 src_w; 153 }; 154 struct drm_mode_get_plane { 155 __u32 plane_id; 156 __u32 crtc_id; 157 __u32 fb_id; 158 __u32 possible_crtcs; 159 __u32 gamma_size; 160 __u32 count_format_types; 161 __u64 format_type_ptr; 162 }; 163 struct drm_mode_get_plane_res { 164 __u64 plane_id_ptr; 165 __u32 count_planes; 166 }; 167 #define DRM_MODE_ENCODER_NONE 0 168 #define DRM_MODE_ENCODER_DAC 1 169 #define DRM_MODE_ENCODER_TMDS 2 170 #define DRM_MODE_ENCODER_LVDS 3 171 #define DRM_MODE_ENCODER_TVDAC 4 172 #define DRM_MODE_ENCODER_VIRTUAL 5 173 #define DRM_MODE_ENCODER_DSI 6 174 #define DRM_MODE_ENCODER_DPMST 7 175 #define DRM_MODE_ENCODER_DPI 8 176 struct drm_mode_get_encoder { 177 __u32 encoder_id; 178 __u32 encoder_type; 179 __u32 crtc_id; 180 __u32 possible_crtcs; 181 __u32 possible_clones; 182 }; 183 enum drm_mode_subconnector { 184 DRM_MODE_SUBCONNECTOR_Automatic = 0, 185 DRM_MODE_SUBCONNECTOR_Unknown = 0, 186 DRM_MODE_SUBCONNECTOR_DVID = 3, 187 DRM_MODE_SUBCONNECTOR_DVIA = 4, 188 DRM_MODE_SUBCONNECTOR_Composite = 5, 189 DRM_MODE_SUBCONNECTOR_SVIDEO = 6, 190 DRM_MODE_SUBCONNECTOR_Component = 8, 191 DRM_MODE_SUBCONNECTOR_SCART = 9, 192 }; 193 #define DRM_MODE_CONNECTOR_Unknown 0 194 #define DRM_MODE_CONNECTOR_VGA 1 195 #define DRM_MODE_CONNECTOR_DVII 2 196 #define DRM_MODE_CONNECTOR_DVID 3 197 #define DRM_MODE_CONNECTOR_DVIA 4 198 #define DRM_MODE_CONNECTOR_Composite 5 199 #define DRM_MODE_CONNECTOR_SVIDEO 6 200 #define DRM_MODE_CONNECTOR_LVDS 7 201 #define DRM_MODE_CONNECTOR_Component 8 202 #define DRM_MODE_CONNECTOR_9PinDIN 9 203 #define DRM_MODE_CONNECTOR_DisplayPort 10 204 #define DRM_MODE_CONNECTOR_HDMIA 11 205 #define DRM_MODE_CONNECTOR_HDMIB 12 206 #define DRM_MODE_CONNECTOR_TV 13 207 #define DRM_MODE_CONNECTOR_eDP 14 208 #define DRM_MODE_CONNECTOR_VIRTUAL 15 209 #define DRM_MODE_CONNECTOR_DSI 16 210 #define DRM_MODE_CONNECTOR_DPI 17 211 #define DRM_MODE_CONNECTOR_WRITEBACK 18 212 struct drm_mode_get_connector { 213 __u64 encoders_ptr; 214 __u64 modes_ptr; 215 __u64 props_ptr; 216 __u64 prop_values_ptr; 217 __u32 count_modes; 218 __u32 count_props; 219 __u32 count_encoders; 220 __u32 encoder_id; 221 __u32 connector_id; 222 __u32 connector_type; 223 __u32 connector_type_id; 224 __u32 connection; 225 __u32 mm_width; 226 __u32 mm_height; 227 __u32 subpixel; 228 __u32 pad; 229 }; 230 #define DRM_MODE_PROP_PENDING (1 << 0) 231 #define DRM_MODE_PROP_RANGE (1 << 1) 232 #define DRM_MODE_PROP_IMMUTABLE (1 << 2) 233 #define DRM_MODE_PROP_ENUM (1 << 3) 234 #define DRM_MODE_PROP_BLOB (1 << 4) 235 #define DRM_MODE_PROP_BITMASK (1 << 5) 236 #define DRM_MODE_PROP_LEGACY_TYPE (DRM_MODE_PROP_RANGE | DRM_MODE_PROP_ENUM | DRM_MODE_PROP_BLOB | DRM_MODE_PROP_BITMASK) 237 #define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0 238 #define DRM_MODE_PROP_TYPE(n) ((n) << 6) 239 #define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1) 240 #define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2) 241 #define DRM_MODE_PROP_ATOMIC 0x80000000 242 struct drm_mode_property_enum { 243 __u64 value; 244 char name[DRM_PROP_NAME_LEN]; 245 }; 246 struct drm_mode_get_property { 247 __u64 values_ptr; 248 __u64 enum_blob_ptr; 249 __u32 prop_id; 250 __u32 flags; 251 char name[DRM_PROP_NAME_LEN]; 252 __u32 count_values; 253 __u32 count_enum_blobs; 254 }; 255 struct drm_mode_connector_set_property { 256 __u64 value; 257 __u32 prop_id; 258 __u32 connector_id; 259 }; 260 #define DRM_MODE_OBJECT_CRTC 0xcccccccc 261 #define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0 262 #define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0 263 #define DRM_MODE_OBJECT_MODE 0xdededede 264 #define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0 265 #define DRM_MODE_OBJECT_FB 0xfbfbfbfb 266 #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb 267 #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee 268 #define DRM_MODE_OBJECT_ANY 0 269 struct drm_mode_obj_get_properties { 270 __u64 props_ptr; 271 __u64 prop_values_ptr; 272 __u32 count_props; 273 __u32 obj_id; 274 __u32 obj_type; 275 }; 276 struct drm_mode_obj_set_property { 277 __u64 value; 278 __u32 prop_id; 279 __u32 obj_id; 280 __u32 obj_type; 281 }; 282 struct drm_mode_get_blob { 283 __u32 blob_id; 284 __u32 length; 285 __u64 data; 286 }; 287 struct drm_mode_fb_cmd { 288 __u32 fb_id; 289 __u32 width; 290 __u32 height; 291 __u32 pitch; 292 __u32 bpp; 293 __u32 depth; 294 __u32 handle; 295 }; 296 #define DRM_MODE_FB_INTERLACED (1 << 0) 297 #define DRM_MODE_FB_MODIFIERS (1 << 1) 298 #define DRM_MODE_FB_SECURE (1 << 2) 299 struct drm_mode_fb_cmd2 { 300 __u32 fb_id; 301 __u32 width; 302 __u32 height; 303 __u32 pixel_format; 304 __u32 flags; 305 __u32 handles[4]; 306 __u32 pitches[4]; 307 __u32 offsets[4]; 308 __u64 modifier[4]; 309 }; 310 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 311 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 312 #define DRM_MODE_FB_DIRTY_FLAGS 0x03 313 #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 314 struct drm_mode_fb_dirty_cmd { 315 __u32 fb_id; 316 __u32 flags; 317 __u32 color; 318 __u32 num_clips; 319 __u64 clips_ptr; 320 }; 321 struct drm_mode_mode_cmd { 322 __u32 connector_id; 323 struct drm_mode_modeinfo mode; 324 }; 325 #define DRM_MODE_CURSOR_BO 0x01 326 #define DRM_MODE_CURSOR_MOVE 0x02 327 #define DRM_MODE_CURSOR_FLAGS 0x03 328 struct drm_mode_cursor { 329 __u32 flags; 330 __u32 crtc_id; 331 __s32 x; 332 __s32 y; 333 __u32 width; 334 __u32 height; 335 __u32 handle; 336 }; 337 struct drm_mode_cursor2 { 338 __u32 flags; 339 __u32 crtc_id; 340 __s32 x; 341 __s32 y; 342 __u32 width; 343 __u32 height; 344 __u32 handle; 345 __s32 hot_x; 346 __s32 hot_y; 347 }; 348 struct drm_mode_crtc_lut { 349 __u32 crtc_id; 350 __u32 gamma_size; 351 __u64 red; 352 __u64 green; 353 __u64 blue; 354 }; 355 struct drm_color_ctm { 356 __s64 matrix[9]; 357 }; 358 struct drm_color_lut { 359 __u16 red; 360 __u16 green; 361 __u16 blue; 362 __u16 reserved; 363 }; 364 #define DRM_MODE_PAGE_FLIP_EVENT 0x01 365 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02 366 #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4 367 #define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8 368 #define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | DRM_MODE_PAGE_FLIP_TARGET_RELATIVE) 369 #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_PAGE_FLIP_TARGET) 370 struct drm_mode_crtc_page_flip { 371 __u32 crtc_id; 372 __u32 fb_id; 373 __u32 flags; 374 __u32 reserved; 375 __u64 user_data; 376 }; 377 struct drm_mode_crtc_page_flip_target { 378 __u32 crtc_id; 379 __u32 fb_id; 380 __u32 flags; 381 __u32 sequence; 382 __u64 user_data; 383 }; 384 struct drm_mode_create_dumb { 385 __u32 height; 386 __u32 width; 387 __u32 bpp; 388 __u32 flags; 389 __u32 handle; 390 __u32 pitch; 391 __u64 size; 392 }; 393 struct drm_mode_map_dumb { 394 __u32 handle; 395 __u32 pad; 396 __u64 offset; 397 }; 398 struct drm_mode_destroy_dumb { 399 __u32 handle; 400 }; 401 #define DRM_MODE_ATOMIC_TEST_ONLY 0x0100 402 #define DRM_MODE_ATOMIC_NONBLOCK 0x0200 403 #define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400 404 #define DRM_MODE_ATOMIC_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_NONBLOCK | DRM_MODE_ATOMIC_ALLOW_MODESET) 405 struct drm_mode_atomic { 406 __u32 flags; 407 __u32 count_objs; 408 __u64 objs_ptr; 409 __u64 count_props_ptr; 410 __u64 props_ptr; 411 __u64 prop_values_ptr; 412 __u64 reserved; 413 __u64 user_data; 414 }; 415 struct drm_format_modifier_blob { 416 #define FORMAT_BLOB_CURRENT 1 417 __u32 version; 418 __u32 flags; 419 __u32 count_formats; 420 __u32 formats_offset; 421 __u32 count_modifiers; 422 __u32 modifiers_offset; 423 }; 424 struct drm_format_modifier { 425 __u64 formats; 426 __u32 offset; 427 __u32 pad; 428 __u64 modifier; 429 }; 430 struct drm_mode_create_blob { 431 __u64 data; 432 __u32 length; 433 __u32 blob_id; 434 }; 435 struct drm_mode_destroy_blob { 436 __u32 blob_id; 437 }; 438 struct drm_mode_create_lease { 439 __u64 object_ids; 440 __u32 object_count; 441 __u32 flags; 442 __u32 lessee_id; 443 __u32 fd; 444 }; 445 struct drm_mode_list_lessees { 446 __u32 count_lessees; 447 __u32 pad; 448 __u64 lessees_ptr; 449 }; 450 struct drm_mode_get_lease { 451 __u32 count_objects; 452 __u32 pad; 453 __u64 objects_ptr; 454 }; 455 struct drm_mode_revoke_lease { 456 __u32 lessee_id; 457 }; 458 #ifdef __cplusplus 459 } 460 #endif 461 #endif 462