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Searched refs:HWC_RESERVE_DISPLAY_MAIN_BIT (Results 1 – 5 of 5) sorted by relevance

/hardware/google/graphics/gs101/libhwc2.1/
DExynosHWCModule.h98 HWC_RESERVE_DISPLAY_MAIN_BIT = 1, enumerator
121 {MPP_DPP_GF, MPP_LOGICAL_DPP_GF, "DPP_GF0", 0, 0, HWC_RESERVE_DISPLAY_MAIN_BIT, 0, 0},
122 {MPP_DPP_GF, MPP_LOGICAL_DPP_GF, "DPP_GF1", 1, 0, HWC_RESERVE_DISPLAY_MAIN_BIT, 0, 0},
124 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS0", 0, 0, HWC_RESERVE_DISPLAY_MAIN_BIT, 0, 0},
125 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS1", 1, 0, HWC_RESERVE_DISPLAY_MAIN_BIT, 0, 0},
126 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS2", 2, 0, HWC_RESERVE_DISPLAY_MAIN_BIT, 0, 0}};
137 {MPP_G2D, MPP_LOGICAL_G2D_YUV, "G2D0-YUV_PRI", 0, 0, HWC_RESERVE_DISPLAY_MAIN_BIT, 0, 0},
138 {MPP_G2D, MPP_LOGICAL_G2D_YUV, "G2D0-YUV_PRI", 0, 1, HWC_RESERVE_DISPLAY_MAIN_BIT, 0, 0},
140 {MPP_G2D, MPP_LOGICAL_G2D_RGB, "G2D0-RGB_PRI", 0, 3, HWC_RESERVE_DISPLAY_MAIN_BIT, 0, 0},
/hardware/google/graphics/gs201/libhwc2.1/
DExynosHWCModule.h41 {MPP_DPP_GF, MPP_LOGICAL_DPP_GF, "DPP_GF0", 0, 0, HWC_RESERVE_DISPLAY_MAIN_BIT, 0, 0},
42 {MPP_DPP_GF, MPP_LOGICAL_DPP_GF, "DPP_GF1", 1, 0, HWC_RESERVE_DISPLAY_MAIN_BIT, 0, 0},
43 {MPP_DPP_GF, MPP_LOGICAL_DPP_GF, "DPP_GF2", 2, 0, HWC_RESERVE_DISPLAY_MAIN_BIT, 0, 0},
44 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS0", 0, 0, HWC_RESERVE_DISPLAY_MAIN_BIT, 0, 0},
45 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS1", 1, 0, HWC_RESERVE_DISPLAY_MAIN_BIT, 0, 0},
/hardware/google/graphics/zuma/libhwc2.1/
DExynosHWCModule.h91 {MPP_DPP_GFS, MPP_LOGICAL_DPP_GFS, "DPP_GFS0", 0, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
94 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS0", 0, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
97 {MPP_DPP_GFS, MPP_LOGICAL_DPP_GFS, "DPP_GFS1", 1, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
100 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS1", 1, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
107 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS2", 2, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
114 {MPP_DPP_GFS, MPP_LOGICAL_DPP_GFS, "DPP_GFS4", 4, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
117 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS3", 3, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
123 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS4", 4, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
/hardware/google/graphics/zumapro/libhwc2.1/
DExynosHWCModule.h88 {MPP_DPP_GFS, MPP_LOGICAL_DPP_GFS, "DPP_GFS0", 0, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
91 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS0", 0, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
94 {MPP_DPP_GFS, MPP_LOGICAL_DPP_GFS, "DPP_GFS1", 1, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
97 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS1", 1, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
104 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS2", 2, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
111 {MPP_DPP_GFS, MPP_LOGICAL_DPP_GFS, "DPP_GFS4", 4, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
114 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS3", 3, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
120 {MPP_DPP_VGRFS, MPP_LOGICAL_DPP_VGRFS, "DPP_VGRFS4", 4, 0, HWC_RESERVE_DISPLAY_MAIN_BIT,
/hardware/google/graphics/common/libhwc2.1/libresource/
DExynosResourceManager.cpp1987 if (mpp->mPreAssignDisplayInfo == HWC_RESERVE_DISPLAY_MAIN_BIT) { in updatePreAssignDisplayList()