1 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ 2 /* 3 * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef _MSM_DRM_PP_H_ 7 #define _MSM_DRM_PP_H_ 8 9 #include <linux/types.h> 10 /** 11 * struct drm_msm_pcc_coeff - PCC coefficient structure for each color 12 * component. 13 * @c: constant coefficient. 14 * @r: red coefficient. 15 * @g: green coefficient. 16 * @b: blue coefficient. 17 * @rg: red green coefficient. 18 * @gb: green blue coefficient. 19 * @rb: red blue coefficient. 20 * @rgb: red blue green coefficient. 21 */ 22 23 struct drm_msm_pcc_coeff { 24 __u32 c; 25 __u32 r; 26 __u32 g; 27 __u32 b; 28 __u32 rg; 29 __u32 gb; 30 __u32 rb; 31 __u32 rgb; 32 }; 33 34 /** 35 * struct drm_msm_pcc - pcc feature structure 36 * @flags: for customizing operations 37 * @r: red coefficients. 38 * @g: green coefficients. 39 * @b: blue coefficients. 40 * @r_rr: second order coefficients 41 * @r_gg: second order coefficients 42 * @r_bb: second order coefficients 43 * @g_rr: second order coefficients 44 * @g_gg: second order coefficients 45 * @g_bb: second order coefficients 46 * @b_rr: second order coefficients 47 * @b_gg: second order coefficients 48 * @b_bb: second order coefficients 49 */ 50 #define DRM_MSM_PCC3 51 #define NUM_STRUCT_MASK (0xFUL << 60) 52 struct drm_msm_pcc { 53 __u64 flags; 54 struct drm_msm_pcc_coeff r; 55 struct drm_msm_pcc_coeff g; 56 struct drm_msm_pcc_coeff b; 57 __u32 r_rr; 58 __u32 r_gg; 59 __u32 r_bb; 60 __u32 g_rr; 61 __u32 g_gg; 62 __u32 g_bb; 63 __u32 b_rr; 64 __u32 b_gg; 65 __u32 b_bb; 66 }; 67 68 /* struct drm_msm_pa_vlut - picture adjustment vLUT structure 69 * flags: for customizing vlut operation 70 * val: vLUT values 71 */ 72 #define PA_VLUT_SIZE 256 73 struct drm_msm_pa_vlut { 74 __u64 flags; 75 __u32 val[PA_VLUT_SIZE]; 76 }; 77 78 #define PA_HSIC_HUE_ENABLE (1 << 0) 79 #define PA_HSIC_SAT_ENABLE (1 << 1) 80 #define PA_HSIC_VAL_ENABLE (1 << 2) 81 #define PA_HSIC_CONT_ENABLE (1 << 3) 82 /** 83 * struct drm_msm_pa_hsic - pa hsic feature structure 84 * @flags: flags for the feature customization, values can be: 85 * - PA_HSIC_HUE_ENABLE: Enable hue adjustment 86 * - PA_HSIC_SAT_ENABLE: Enable saturation adjustment 87 * - PA_HSIC_VAL_ENABLE: Enable value adjustment 88 * - PA_HSIC_CONT_ENABLE: Enable contrast adjustment 89 * 90 * @hue: hue setting 91 * @saturation: saturation setting 92 * @value: value setting 93 * @contrast: contrast setting 94 */ 95 #define DRM_MSM_PA_HSIC 96 struct drm_msm_pa_hsic { 97 __u64 flags; 98 __u32 hue; 99 __u32 saturation; 100 __u32 value; 101 __u32 contrast; 102 }; 103 104 #define MEMCOL_PROT_HUE (1 << 0) 105 #define MEMCOL_PROT_SAT (1 << 1) 106 #define MEMCOL_PROT_VAL (1 << 2) 107 #define MEMCOL_PROT_CONT (1 << 3) 108 #define MEMCOL_PROT_SIXZONE (1 << 4) 109 #define MEMCOL_PROT_BLEND (1 << 5) 110 /* struct drm_msm_memcol - Memory color feature structure. 111 * Skin, sky, foliage features are supported. 112 * @prot_flags: Bit mask for enabling protection feature. 113 * @color_adjust_p0: Adjustment curve. 114 * @color_adjust_p1: Adjustment curve. 115 * @color_adjust_p2: Adjustment curve. 116 * @blend_gain: Blend gain weightage from othe PA features. 117 * @sat_hold: Saturation hold value. 118 * @val_hold: Value hold info. 119 * @hue_region: Hue qualifier. 120 * @sat_region: Saturation qualifier. 121 * @val_region: Value qualifier. 122 * @flags: for customizing operations. 123 */ 124 #define DRM_MSM_MEMCOL 125 struct drm_msm_memcol { 126 __u64 prot_flags; 127 __u32 color_adjust_p0; 128 __u32 color_adjust_p1; 129 __u32 color_adjust_p2; 130 __u32 blend_gain; 131 __u32 sat_hold; 132 __u32 val_hold; 133 __u32 hue_region; 134 __u32 sat_region; 135 __u32 val_region; 136 __u64 flags; 137 }; 138 139 #define DRM_MSM_SIXZONE 140 #define SIXZONE_LUT_SIZE 384 141 #define SIXZONE_HUE_ENABLE (1 << 0) 142 #define SIXZONE_SAT_ENABLE (1 << 1) 143 #define SIXZONE_VAL_ENABLE (1 << 2) 144 /* struct drm_msm_sixzone_curve - Sixzone HSV adjustment curve structure. 145 * @p0: Hue adjustment. 146 * @p1: Saturation/Value adjustment. 147 */ 148 struct drm_msm_sixzone_curve { 149 __u32 p1; 150 __u32 p0; 151 }; 152 153 /* struct drm_msm_sixzone - Sixzone feature structure. 154 * @flags: for feature customization, values can be: 155 * - SIXZONE_HUE_ENABLE: Enable hue adjustment 156 * - SIXZONE_SAT_ENABLE: Enable saturation adjustment 157 * - SIXZONE_VAL_ENABLE: Enable value adjustment 158 * @threshold: threshold qualifier. 159 * @adjust_p0: Adjustment curve. 160 * @adjust_p1: Adjustment curve. 161 * @sat_hold: Saturation hold info. 162 * @val_hold: Value hold info. 163 * @curve: HSV adjustment curve lut. 164 */ 165 struct drm_msm_sixzone { 166 __u64 flags; 167 __u32 threshold; 168 __u32 adjust_p0; 169 __u32 adjust_p1; 170 __u32 sat_hold; 171 __u32 val_hold; 172 struct drm_msm_sixzone_curve curve[SIXZONE_LUT_SIZE]; 173 }; 174 175 #define GAMUT_3D_MODE_17 1 176 #define GAMUT_3D_MODE_5 2 177 #define GAMUT_3D_MODE_13 3 178 179 #define GAMUT_3D_MODE17_TBL_SZ 1229 180 #define GAMUT_3D_MODE5_TBL_SZ 32 181 #define GAMUT_3D_MODE13_TBL_SZ 550 182 #define GAMUT_3D_SCALE_OFF_SZ 16 183 #define GAMUT_3D_SCALEB_OFF_SZ 12 184 #define GAMUT_3D_TBL_NUM 4 185 #define GAMUT_3D_SCALE_OFF_TBL_NUM 3 186 #define GAMUT_3D_MAP_EN (1 << 0) 187 188 /** 189 * struct drm_msm_3d_col - 3d gamut color component structure 190 * @c0: Holds c0 value 191 * @c2_c1: Holds c2/c1 values 192 */ 193 struct drm_msm_3d_col { 194 __u32 c2_c1; 195 __u32 c0; 196 }; 197 /** 198 * struct drm_msm_3d_gamut - 3d gamut feature structure 199 * @flags: flags for the feature values are: 200 * 0 - no map 201 * GAMUT_3D_MAP_EN - enable map 202 * @mode: lut mode can take following values: 203 * - GAMUT_3D_MODE_17 204 * - GAMUT_3D_MODE_5 205 * - GAMUT_3D_MODE_13 206 * @scale_off: Scale offset table 207 * @col: Color component tables 208 */ 209 struct drm_msm_3d_gamut { 210 __u64 flags; 211 __u32 mode; 212 __u32 scale_off[GAMUT_3D_SCALE_OFF_TBL_NUM][GAMUT_3D_SCALE_OFF_SZ]; 213 struct drm_msm_3d_col col[GAMUT_3D_TBL_NUM][GAMUT_3D_MODE17_TBL_SZ]; 214 }; 215 216 #define PGC_TBL_LEN 512 217 #define PGC_8B_ROUND (1 << 0) 218 /** 219 * struct drm_msm_pgc_lut - pgc lut feature structure 220 * @flags: flags for the featue values can be: 221 * - PGC_8B_ROUND 222 * @c0: color0 component lut 223 * @c1: color1 component lut 224 * @c2: color2 component lut 225 */ 226 struct drm_msm_pgc_lut { 227 __u64 flags; 228 __u32 c0[PGC_TBL_LEN]; 229 __u32 c1[PGC_TBL_LEN]; 230 __u32 c2[PGC_TBL_LEN]; 231 }; 232 233 #define IGC_TBL_LEN 256 234 #define IGC_DITHER_ENABLE (1 << 0) 235 /** 236 * struct drm_msm_igc_lut - igc lut feature structure 237 * @flags: flags for the feature customization, values can be: 238 * - IGC_DITHER_ENABLE: Enable dither functionality 239 * @c0: color0 component lut 240 * @c1: color1 component lut 241 * @c2: color2 component lut 242 * @strength: dither strength, considered valid when IGC_DITHER_ENABLE 243 * is set in flags. Strength value based on source bit width. 244 * @c0_last: color0 lut_last component 245 * @c1_last: color1 lut_last component 246 * @c2_last: color2 lut_last component 247 */ 248 struct drm_msm_igc_lut { 249 __u64 flags; 250 __u32 c0[IGC_TBL_LEN]; 251 __u32 c1[IGC_TBL_LEN]; 252 __u32 c2[IGC_TBL_LEN]; 253 __u32 strength; 254 __u32 c0_last; 255 __u32 c1_last; 256 __u32 c2_last; 257 }; 258 #define LAST_LUT 2 259 260 #define HIST_V_SIZE 256 261 /** 262 * struct drm_msm_hist - histogram feature structure 263 * @flags: for customizing operations 264 * @data: histogram data 265 */ 266 struct drm_msm_hist { 267 __u64 flags; 268 __u32 data[HIST_V_SIZE]; 269 }; 270 271 #define AD4_LUT_GRP0_SIZE 33 272 #define AD4_LUT_GRP1_SIZE 32 273 /* 274 * struct drm_msm_ad4_init - ad4 init structure set by user-space client. 275 * Init param values can change based on tuning 276 * hence it is passed by user-space clients. 277 */ 278 struct drm_msm_ad4_init { 279 __u32 init_param_001[AD4_LUT_GRP0_SIZE]; 280 __u32 init_param_002[AD4_LUT_GRP0_SIZE]; 281 __u32 init_param_003[AD4_LUT_GRP0_SIZE]; 282 __u32 init_param_004[AD4_LUT_GRP0_SIZE]; 283 __u32 init_param_005[AD4_LUT_GRP1_SIZE]; 284 __u32 init_param_006[AD4_LUT_GRP1_SIZE]; 285 __u32 init_param_007[AD4_LUT_GRP0_SIZE]; 286 __u32 init_param_008[AD4_LUT_GRP0_SIZE]; 287 __u32 init_param_009; 288 __u32 init_param_010; 289 __u32 init_param_011; 290 __u32 init_param_012; 291 __u32 init_param_013; 292 __u32 init_param_014; 293 __u32 init_param_015; 294 __u32 init_param_016; 295 __u32 init_param_017; 296 __u32 init_param_018; 297 __u32 init_param_019; 298 __u32 init_param_020; 299 __u32 init_param_021; 300 __u32 init_param_022; 301 __u32 init_param_023; 302 __u32 init_param_024; 303 __u32 init_param_025; 304 __u32 init_param_026; 305 __u32 init_param_027; 306 __u32 init_param_028; 307 __u32 init_param_029; 308 __u32 init_param_030; 309 __u32 init_param_031; 310 __u32 init_param_032; 311 __u32 init_param_033; 312 __u32 init_param_034; 313 __u32 init_param_035; 314 __u32 init_param_036; 315 __u32 init_param_037; 316 __u32 init_param_038; 317 __u32 init_param_039; 318 __u32 init_param_040; 319 __u32 init_param_041; 320 __u32 init_param_042; 321 __u32 init_param_043; 322 __u32 init_param_044; 323 __u32 init_param_045; 324 __u32 init_param_046; 325 __u32 init_param_047; 326 __u32 init_param_048; 327 __u32 init_param_049; 328 __u32 init_param_050; 329 __u32 init_param_051; 330 __u32 init_param_052; 331 __u32 init_param_053; 332 __u32 init_param_054; 333 __u32 init_param_055; 334 __u32 init_param_056; 335 __u32 init_param_057; 336 __u32 init_param_058; 337 __u32 init_param_059; 338 __u32 init_param_060; 339 __u32 init_param_061; 340 __u32 init_param_062; 341 __u32 init_param_063; 342 __u32 init_param_064; 343 __u32 init_param_065; 344 __u32 init_param_066; 345 __u32 init_param_067; 346 __u32 init_param_068; 347 __u32 init_param_069; 348 __u32 init_param_070; 349 __u32 init_param_071; 350 __u32 init_param_072; 351 __u32 init_param_073; 352 __u32 init_param_074; 353 __u32 init_param_075; 354 }; 355 356 /* 357 * struct drm_msm_ad4_cfg - ad4 config structure set by user-space client. 358 * Config param values can vary based on tuning, 359 * hence it is passed by user-space clients. 360 */ 361 struct drm_msm_ad4_cfg { 362 __u32 cfg_param_001; 363 __u32 cfg_param_002; 364 __u32 cfg_param_003; 365 __u32 cfg_param_004; 366 __u32 cfg_param_005; 367 __u32 cfg_param_006; 368 __u32 cfg_param_007; 369 __u32 cfg_param_008; 370 __u32 cfg_param_009; 371 __u32 cfg_param_010; 372 __u32 cfg_param_011; 373 __u32 cfg_param_012; 374 __u32 cfg_param_013; 375 __u32 cfg_param_014; 376 __u32 cfg_param_015; 377 __u32 cfg_param_016; 378 __u32 cfg_param_017; 379 __u32 cfg_param_018; 380 __u32 cfg_param_019; 381 __u32 cfg_param_020; 382 __u32 cfg_param_021; 383 __u32 cfg_param_022; 384 __u32 cfg_param_023; 385 __u32 cfg_param_024; 386 __u32 cfg_param_025; 387 __u32 cfg_param_026; 388 __u32 cfg_param_027; 389 __u32 cfg_param_028; 390 __u32 cfg_param_029; 391 __u32 cfg_param_030; 392 __u32 cfg_param_031; 393 __u32 cfg_param_032; 394 __u32 cfg_param_033; 395 __u32 cfg_param_034; 396 __u32 cfg_param_035; 397 __u32 cfg_param_036; 398 __u32 cfg_param_037; 399 __u32 cfg_param_038; 400 __u32 cfg_param_039; 401 __u32 cfg_param_040; 402 __u32 cfg_param_041; 403 __u32 cfg_param_042; 404 __u32 cfg_param_043; 405 __u32 cfg_param_044; 406 __u32 cfg_param_045; 407 __u32 cfg_param_046; 408 __u32 cfg_param_047; 409 __u32 cfg_param_048; 410 __u32 cfg_param_049; 411 __u32 cfg_param_050; 412 __u32 cfg_param_051; 413 __u32 cfg_param_052; 414 __u32 cfg_param_053; 415 }; 416 417 #define DITHER_MATRIX_SZ 16 418 419 /** 420 * struct drm_msm_dither - dither feature structure 421 * @flags: for customizing operations 422 * @temporal_en: temperal dither enable 423 * @c0_bitdepth: c0 component bit depth 424 * @c1_bitdepth: c1 component bit depth 425 * @c2_bitdepth: c2 component bit depth 426 * @c3_bitdepth: c2 component bit depth 427 * @matrix: dither strength matrix 428 */ 429 struct drm_msm_dither { 430 __u64 flags; 431 __u32 temporal_en; 432 __u32 c0_bitdepth; 433 __u32 c1_bitdepth; 434 __u32 c2_bitdepth; 435 __u32 c3_bitdepth; 436 __u32 matrix[DITHER_MATRIX_SZ]; 437 }; 438 439 /** 440 * struct drm_msm_pa_dither - dspp dither feature structure 441 * @flags: for customizing operations 442 * @strength: dither strength 443 * @offset_en: offset enable bit 444 * @matrix: dither data matrix 445 */ 446 #define DRM_MSM_PA_DITHER 447 struct drm_msm_pa_dither { 448 __u64 flags; 449 __u32 strength; 450 __u32 offset_en; 451 __u32 matrix[DITHER_MATRIX_SZ]; 452 }; 453 454 /** 455 * struct drm_msm_ad4_roi_cfg - ad4 roi params config set 456 * by user-space client. 457 * @h_x - hotizontal direction start 458 * @h_y - hotizontal direction end 459 * @v_x - vertical direction start 460 * @v_y - vertical direction end 461 * @factor_in - the alpha value for inside roi region 462 * @factor_out - the alpha value for outside roi region 463 */ 464 #define DRM_MSM_AD4_ROI 465 struct drm_msm_ad4_roi_cfg { 466 __u32 h_x; 467 __u32 h_y; 468 __u32 v_x; 469 __u32 v_y; 470 __u32 factor_in; 471 __u32 factor_out; 472 }; 473 474 #define LTM_FEATURE_DEF 1 475 #define LTM_DATA_SIZE_0 32 476 #define LTM_DATA_SIZE_1 128 477 #define LTM_DATA_SIZE_2 256 478 #define LTM_DATA_SIZE_3 33 479 #define LTM_BUFFER_SIZE 5 480 #define LTM_GUARD_BYTES 255 481 #define LTM_BLOCK_SIZE 2 482 483 #define LTM_STATS_SAT (1 << 1) 484 #define LTM_STATS_MERGE_SAT (1 << 2) 485 486 /* 487 * struct drm_msm_ltm_stats_data - LTM stats data structure 488 */ 489 struct drm_msm_ltm_stats_data { 490 __u32 stats_01[LTM_DATA_SIZE_0][LTM_DATA_SIZE_1]; 491 __u32 stats_02[LTM_DATA_SIZE_2]; 492 __u32 stats_03[LTM_DATA_SIZE_0]; 493 __u32 stats_04[LTM_DATA_SIZE_0]; 494 __u32 stats_05[LTM_DATA_SIZE_0]; 495 __u32 status_flag; 496 __u32 display_h; 497 __u32 display_v; 498 __u32 init_h[LTM_BLOCK_SIZE]; 499 __u32 init_v; 500 __u32 inc_h; 501 __u32 inc_v; 502 __u32 portrait_en; 503 __u32 merge_en; 504 __u32 cfg_param_01; 505 __u32 cfg_param_02; 506 __u32 cfg_param_03; 507 __u32 cfg_param_04; 508 }; 509 510 /* 511 * struct drm_msm_ltm_init_param - LTM init param structure 512 */ 513 struct drm_msm_ltm_init_param { 514 __u32 init_param_01; 515 __u32 init_param_02; 516 __u32 init_param_03; 517 __u32 init_param_04; 518 }; 519 520 /* 521 * struct drm_msm_ltm_cfg_param - LTM config param structure 522 */ 523 struct drm_msm_ltm_cfg_param { 524 __u32 cfg_param_01; 525 __u32 cfg_param_02; 526 __u32 cfg_param_03; 527 __u32 cfg_param_04; 528 __u32 cfg_param_05; 529 __u32 cfg_param_06; 530 }; 531 532 /* 533 * struct drm_msm_ltm_data - LTM data structure 534 */ 535 struct drm_msm_ltm_data { 536 __u32 data[LTM_DATA_SIZE_0][LTM_DATA_SIZE_3]; 537 }; 538 539 /* 540 * struct drm_msm_ltm_buffers_crtl - LTM buffer control structure. 541 * This struct will be used to init and 542 * de-init the LTM buffers in driver. 543 * @num_of_buffers: valid number of buffers used 544 * @fds: fd array to for all the valid buffers 545 */ 546 struct drm_msm_ltm_buffers_ctrl { 547 __u32 num_of_buffers; 548 __u32 fds[LTM_BUFFER_SIZE]; 549 }; 550 551 /* 552 * struct drm_msm_ltm_buffer - LTM buffer structure. 553 * This struct will be passed from driver to user 554 * space for LTM stats data notification. 555 * @fd: fd assicated with the buffer that has LTM stats data 556 * @offset: offset from base address that used for alignment 557 * @status status flag for error indication 558 */ 559 struct drm_msm_ltm_buffer { 560 __u32 fd; 561 __u32 offset; 562 __u32 status; 563 }; 564 565 /** 566 * struct drm_msm_ad4_manual_str_cfg - ad4 manual strength config set 567 * by user-space client. 568 * @in_str - strength for inside roi region 569 * @out_str - strength for outside roi region 570 */ 571 #define DRM_MSM_AD4_MANUAL_STRENGTH 572 struct drm_msm_ad4_manual_str_cfg { 573 __u32 in_str; 574 __u32 out_str; 575 }; 576 577 #define RC_DATA_SIZE_MAX 2720 578 #define RC_CFG_SIZE_MAX 4 579 580 struct drm_msm_rc_mask_cfg { 581 __u64 flags; 582 __u32 cfg_param_01; 583 __u32 cfg_param_02; 584 __u32 cfg_param_03; 585 __u32 cfg_param_04[RC_CFG_SIZE_MAX]; 586 __u32 cfg_param_05[RC_CFG_SIZE_MAX]; 587 __u32 cfg_param_06[RC_CFG_SIZE_MAX]; 588 __u64 cfg_param_07; 589 __u32 cfg_param_08; 590 __u64 cfg_param_09[RC_DATA_SIZE_MAX]; 591 }; 592 593 #endif /* _MSM_DRM_PP_H_ */ 594