1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /*
3  * Copyright 2011 Intel Corporation
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
25 #ifndef DRM_FOURCC_GS101_H
26 #define DRM_FOURCC_GS101_H
27 
28 #include <drm/drm_fourcc.h>
29 
30 #if defined(__cplusplus)
31 extern "C" {
32 #endif
33 
34 /*
35  * 2 plane packed YCbCr
36  * 2x2 subsampled Cr:Cb plane 10 bits per channel
37  * index 0 = Y plane, [9:0] Y [10] little endian
38  * index 1 = Cr:Cb plane, [19:0] Cr:Cb [10:10] little endian
39  */
40 #define DRM_FORMAT_Y010		fourcc_code('Y', '0', '1', '0')
41 
42 /*
43  * Set to access the secure buffer
44  *
45  * The secure buffer is used to store DRM(Digital Right Management) contents.
46  * DMA needs special authority to access the secure buffer. This modifier can
47  * be set to allow the DMA to access the secure buffer. This can be used in
48  * combination with another modifier.
49  */
50 #define DRM_FORMAT_MOD_PROTECTION	fourcc_mod_code(NONE, (1ULL << 51))
51 
52 /*
53  * 4 plane YCbCr 4:2:0 10 bits per channel
54  * index 0: Y8 plane, [7:0] Y little endian
55  * index 1: Cr8:Cb8 plane, [15:0] CrCb little endian
56  * index 2: Y2 plane, [1:0] Y little endian
57  * index 3: Cr2:Cb2 plane, [3:0] CrCb little endian
58  */
59 #define DRM_FORMAT_MOD_SAMSUNG_YUV_8_2_SPLIT	fourcc_mod_code(SAMSUNG, 3)
60 
61 /*
62  * The colormap uses the color data generated by hardware instead of reading
63  * the data from the memory.
64  *
65  * It supports only solid color in BGRA8888 format. When it is used as
66  * a modifier, BGRA8888 format should be used and color value is passed through
67  * first handles[0].
68  */
69 #define DRM_FORMAT_MOD_SAMSUNG_COLORMAP		fourcc_mod_code(SAMSUNG, 4)
70 
71 /*
72  * Samsung Band Width Compression (SBWC) modifier
73  *
74  * SBWC is a specific lossless or lossy image compression protocol and format.
75  * It supports video image (YUV) compression to reduce the amount of data
76  * transferred between IP blocks. This modifier is used when to decode data or
77  * when to encode data through writeback.
78  */
79 #define SBWC_IDENTIFIER				(1 << 4)
80 #define SBWC_FORMAT_MOD_BLOCK_SIZE_MASK		(0xfULL << 5)
81 #define SBWC_BLOCK_SIZE_SET(blk_size)		\
82 		(((blk_size) << 5) & SBWC_FORMAT_MOD_BLOCK_SIZE_MASK)
83 #define SBWC_BLOCK_SIZE_GET(modifier)		\
84 		(((modifier) & SBWC_FORMAT_MOD_BLOCK_SIZE_MASK) >> 5)
85 #define SBWC_FORMAT_MOD_BLOCK_SIZE_32x2		(2ULL)
86 #define SBWC_FORMAT_MOD_BLOCK_SIZE_32x3		(3ULL)
87 #define SBWC_FORMAT_MOD_BLOCK_SIZE_32x4		(4ULL)
88 #define SBWC_FORMAT_MOD_BLOCK_SIZE_32x5		(5ULL)
89 #define SBWC_FORMAT_MOD_BLOCK_SIZE_32x6		(6ULL)
90 
91 #define SBWC_FORMAT_MOD_LOSSY			(1 << 12)
92 
93 #define DRM_FORMAT_MOD_SAMSUNG_SBWC(blk_size)	\
94 		fourcc_mod_code(SAMSUNG,	\
95 		(SBWC_BLOCK_SIZE_SET(blk_size) | SBWC_IDENTIFIER))
96 
97 /* from 52 to 55 bit are reserved for AFBC encoder source informaton */
98 #define AFBC_FORMAT_MOD_SOURCE_MASK	(0xfULL << 52)
99 #define AFBC_FORMAT_MOD_SOURCE_GPU	(1ULL << 52)
100 #define AFBC_FORMAT_MOD_SOURCE_G2D	(2ULL << 52)
101 #define AFBC_BLOCK_SIZE_GET(modifier)	(modifier & AFBC_FORMAT_MOD_BLOCK_SIZE_MASK)
102 
103 #if defined(__cplusplus)
104 }
105 #endif
106 
107 #endif /* DRM_FOURCC_GS101_H */
108